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    • 12. 发明授权
    • Methods and apparatus for improving read/modify/write operations
    • 改进读/写/写操作的方法和装置
    • US06226017B1
    • 2001-05-01
    • US09364363
    • 1999-07-30
    • J. Andrew GoossenAndrew C. Godfrey
    • J. Andrew GoossenAndrew C. Godfrey
    • G06F1316
    • G06T1/60
    • Improving a process in which information is read, modified, and written, and in which reading information is more costly (e.g., slower) than writing information. The information may be pixel information from a second (or remote) image and the modification may be a blending operation with a first (or local) image. The pixel information of the second (or remote) image may be stored in a video display frame buffer at a display adapter. The display adapter may be coupled via a bus, such as a PCI bus for example, with a CPU (or other machine) which performs the modification, such as image blending for example. This process is improved by limiting the number of reads of the pixel information of the second (or remote) image. Further, reads may be combined when doing so improves read performance and when alignment conditions are met. All modify and all or some write steps may be performed after all read steps have been performed, rather than performing all three (3) steps on a pixel-by-pixel, or pixel vector-by-pixel vector basis.
    • 改进读取,修改和写入信息的过程,并且读取信息比写入信息更昂贵(例如,更慢)。 信息可以是来自第二(或远程)图像的像素信息,并且修改可以是与第一(或局部)图像的混合操作。 第二(或远程)图像的像素信息可以存储在显示适配器的视频显示帧缓冲器中。 显示适配器可以经由诸如PCI总线的总线与执行修改的CPU(或其他机器)耦合,例如图像混合。 通过限制第二(或远程)图像的像素信息的读取次数来改善该过程。 此外,当这样做时,可以组合读取可以提高读取性能并且当对齐条件被满足时。 所有修改和所有或某些写入步骤可以在执行所有读取步骤之后执行,而不是以逐个像素为单位执行所有三(3)个步骤,或者以逐像素向量为单位。
    • 17. 发明授权
    • System and method for parallel execution of data generation tasks
    • 并行执行数据生成任务的系统和方法
    • US06862027B2
    • 2005-03-01
    • US10611415
    • 2003-06-30
    • Jeffrey A. AndrewsNicholas R. BakerJ. Andrew GoossenMichael Abrash
    • Jeffrey A. AndrewsNicholas R. BakerJ. Andrew GoossenMichael Abrash
    • G06F12/08G06F9/46G06F9/50G06F13/28G06F15/16G06F15/78G06F15/80G06T1/60G06T15/00G09G5/36
    • G06F15/7846
    • A CPU module includes a host element configured to perform a high-level host-related task, and one or more data-generating processing elements configured to perform a data-generating task associated with the high-level host-related task. Each data-generating processing element includes logic configured to receive input data, and logic configured to process the input data to produce output data. The amount of output data is greater than an amount of input data, and the ratio of the amount of input data to the amount of output data defines a decompression ratio. In one implementation, the high-level host-related task performed by the host element pertains to a high-level graphics processing task, and the data-generating task pertains to the generation of geometry data (such as triangle vertices) for use within the high-level graphics processing task. The CPU module can transfer the output data to a GPU module via at least one locked set of a cache memory. The GPU retrieves the output data from the locked set, and periodically forwards a tail pointer to a cacheable location within the data-generating elements that informs the data-generating elements of its progress in retrieving the output data.
    • CPU模块包括被配置为执行高级主机相关任务的主机元件,以及被配置为执行与高级主机相关任务相关联的数据生成任务的一个或多个数据生成处理元件。 每个数据生成处理元件包括被配置为接收输入数据的逻辑和被配置为处理输入数据以产生输出数据的逻辑。 输出数据量大于输入数据量,并且输入数据量与输出数据量的比率定义了解压比。 在一个实现中,由主机元件执行的与主机相关的高级别任务涉及高级图形处理任务,并且数据生成任务涉及生成几何数据(例如三角形顶点),用于在 高级图形处理任务。 CPU模块可以经由至少一个锁定的高速缓存存储器将输出数据传送到GPU模块。 GPU从锁定的集合中检索输出数据,并周期性地将尾部指针转发到数据生成元素内的可缓存位置,以向数据生成元素通知其在检索输出数据时的进度。