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11. 发明授权

US06831013B2 Method of forming a dual damascene via by using a metal hard mask layer 有权
标题翻译：通过使用金属硬掩模层形成双镶嵌过孔的方法
公开(公告)号：US06831013B2
公开(公告)日：2004-12-14
申请号：US09986929
申请日：2001-11-13
申请人： Teng-Chun Tsai , Chia-Lin Hsu
发明人： Teng-Chun Tsai , Chia-Lin Hsu
IPC分类号： H01L21302
CPC分类号： H01L21/76811 , H01L21/0332 , H01L21/31144 , H01L21/76813
摘要： This invention relates to a method of forming a dual damascene via, in particular to a method of forming a dual damascene via by using a metal hard mask layer. The present invention uses a metal layer to be a hard mask layer to make the surface of the isolation layer become a level and smooth surface and not become a rounding convex and to prevent the via being connected with others vias to cause the leakage defects after forming the shape of the via.
摘要翻译：本发明涉及一种形成双镶嵌层的方法，特别涉及通过使用金属硬掩模层形成双镶嵌过孔的方法。本发明使用金属层作为硬掩模层，使得隔离层的表面变得水平和光滑的表面，并且不变成圆形凸起，并且防止通孔与其它通孔连接，以在成形之后引起泄漏缺陷通孔的形状。

12. 发明授权

US06696361B2 Post-CMP removal of surface contaminants from silicon wafer 有权
标题翻译： CMP后移除表面污染物
公开(公告)号：US06696361B2
公开(公告)日：2004-02-24
申请号：US09854006
申请日：2001-05-10
申请人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
发明人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
IPC分类号： H01L214763
CPC分类号： H01L21/02074 , H01L21/3212
摘要： A method of removing contaminants from a silicon wafer after chemical-mechanical polishing (CMP). After a copper chemical-mechanical polishing and a subsequent barrier chemical-mechanical polishing operation, an aqueous solution of ozone in de-ionized water is applied to clean the silicon wafer so that contaminants on the wafer are removed. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after copper and barrier CMP and then the wafer is cleaned using a chemical solution or de-ionized water. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after both copper-CMP and barrier-CMP and then the wafer is cleaned using a chemical solution or de-ionized water.
摘要翻译：化学机械抛光（CMP）后从硅晶片去除污染物的方法。在铜化学机械抛光和随后的屏障化学 - 机械抛光操作之后，施加去离子水中的臭氧水溶液以清洁硅晶片，从而去除晶片上的污染物。或者，在铜和阻挡CMP之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。或者，在铜CMP和阻挡CMP两者之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。

13. 发明授权

US06616510B2 Chemical mechanical polishing method for copper 有权
公开(公告)号：US06616510B2
公开(公告)日：2003-09-09
申请号：US09735323
申请日：2000-12-12
申请人： Chia-Lin Hsu , Teng-Chun Tsai , Yung-Tsung Wei , Ming-Sheng Yang
发明人： Chia-Lin Hsu , Teng-Chun Tsai , Yung-Tsung Wei , Ming-Sheng Yang
IPC分类号： H01L21465
CPC分类号： H01L21/3212 , B24B37/044 , C09G1/02
摘要： A chemical-mechanical polishing method for polishing a copper oxide layer and a copper layer. The copper oxide layer above the copper layer is first polished using an aqueous solution having a high concentration of polishing particles/chelating agent. The copper layer is then polished using a polishing slurry having a low concentration of polishing particles/chelating agent or the polishing slurry free of polishing particles/chelating agent. Alternatively, the copper oxide layer is polished using a mixture of the aqueous solution and the polishing slurry. After the copper oxide layer is removed, the copper layer is polished using the polishing slurry alone.

14. 发明授权

US08674433B2 Semiconductor process 有权
标题翻译：半导体工艺
公开(公告)号：US08674433B2
公开(公告)日：2014-03-18
申请号：US13216259
申请日：2011-08-24
申请人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
发明人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
IPC分类号： H01L29/66
CPC分类号： H01L29/66795 , H01L29/66628
摘要： A semiconductor process includes the following steps. A substrate is provided. At least a fin-shaped structure is formed on the substrate. An oxide layer is formed on the substrate without the fin-shaped structure being formed thereon. A gate is formed to cover a part of the oxide layer and a part of the fin-shaped structure. An etching process is performed to etch a part of the fin-shaped structure beside the gate, therefore at least a recess is formed in the fin-shaped structure. An epitaxial process is performed to form an epitaxial layer in the recess, wherein the epitaxial layer has a hexagon-shaped profile structure.
摘要翻译：半导体工艺包括以下步骤。提供基板。在基板上形成至少一个鳍状结构。在基板上形成氧化层，而不形成鳍状结构。形成栅极以覆盖氧化物层的一部分和鳍状结构的一部分。进行蚀刻处理以蚀刻栅极旁边的鳍状结构的一部分，因此在鳍状结构中至少形成凹部。执行外延工艺以在凹部中形成外延层，其中外延层具有六边形轮廓结构。

15. 发明申请

US20130122698A1 METHOD FOR MANUFACTURING MULTI-GATE TRANSISTOR DEVICE 有权
标题翻译：制造多栅极晶体管器件的方法
公开(公告)号：US20130122698A1
公开(公告)日：2013-05-16
申请号：US13298264
申请日：2011-11-16
申请人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Min-Ying Hsu , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
发明人： Chin-I Liao , Chia-Lin Hsu , Ming-Yen Li , Min-Ying Hsu , Hsin-Huei Wu , Yung-Lun Hsieh , Chien-Hao Chen , Bo-Syuan Lee
IPC分类号： H01L21/28
CPC分类号： H01L21/306 , H01L29/66795 , H01L29/7854
摘要： A method for manufacturing multi-gate transistor device includes providing a semiconductor substrate having a patterned semiconductor layer and a patterned hard mask sequentially formed thereon, removing the patterned hard mask, performing a thermal treatment to rounding the patterned semiconductor layer with a process temperature lower than 800° C., and sequentially forming a gate dielectric layer and a gate layer covering a portion of the patterned semiconductor layer on the semiconductor substrate.
摘要翻译：一种用于制造多栅极晶体管器件的方法包括：提供具有图案化半导体层的半导体衬底和在其上依次形成的图案化硬掩模，去除图案化的硬掩模，进行热处理以使处理温度低于 800℃，并顺序地形成覆盖半导体衬底上的图案化半导体层的一部分的栅极电介质层和栅极层。

16. 发明申请

US20120048296A1 Cleaning Method for Wafer 审中-公开
标题翻译：晶圆清洗方法
公开(公告)号：US20120048296A1
公开(公告)日：2012-03-01
申请号：US12868726
申请日：2010-08-26
申请人： Wen-Chin Lin , Kai-Chun Yang , Jen-Chieh Lin , Jeng-Yu Fang , Chia-Lin Hsu , Teng-Chun Tsai , Wei-Che Tsao
发明人： Wen-Chin Lin , Kai-Chun Yang , Jen-Chieh Lin , Jeng-Yu Fang , Chia-Lin Hsu , Teng-Chun Tsai , Wei-Che Tsao
IPC分类号： B08B7/00 , B08B3/00
CPC分类号： C11D11/0047 , C11D11/0064 , H01L21/02074
摘要： A cleaning method for a wafer is provided. First, a first cleaning process is performed wherein the first cleaning process includes providing a cleaning solution having a first concentration. Next, a second cleaning process is performed, wherein the second cleaning process includes providing the cleaning solution having a second concentration. The second concentration is substantially greater than the first concentration. Next, a post-cleaning process is performed to provide dilute water.
摘要翻译：提供了一种用于晶片的清洁方法。首先，进行第一清洗处理，其中第一清洗过程包括提供具有第一浓度的清洗溶液。接下来，执行第二清洁处理，其中第二清洁处理包括提供具有第二浓度的清洁溶液。第二浓度显着大于第一浓度。接下来，进行后清洗处理以提供稀释水。

17. 发明申请

US20100184293A1 PLANARIZATION PROCESS FOR PRE-DAMASCENE STRUCTURE INCLUDING METAL HARD MASK 有权
标题翻译：包括金属硬掩模的预结晶结构的平面化方法
公开(公告)号：US20100184293A1
公开(公告)日：2010-07-22
申请号：US12726347
申请日：2010-03-18
申请人： Chia-Lin Hsu
发明人： Chia-Lin Hsu
IPC分类号： H01L21/306
CPC分类号： H01L21/3212
摘要： A planarization process for a pre-damascene structure is described, wherein the pre-damascene structure includes a metal hard mask that is disposed on a first material layer with a damascene opening therein and a second material layer that fills the damascene opening and covers the metal hard mask. A first CMP step is conducted using a first slurry to remove the second material layer outside the damascene opening. A second CMP step is conducted using a second slurry to remove the metal hard mask.
摘要翻译：描述了一种预镶嵌结构的平面化方法，其中预镶嵌结构包括设置在其中具有镶嵌开口的第一材料层上的金属硬掩模和填充镶嵌开口并覆盖金属的第二材料层硬面膜使用第一浆料进行第一CMP步骤以除去镶嵌开口外部的第二材料层。使用第二浆料进行第二CMP步骤以除去金属硬掩模。

18. 发明申请

US20060057945A1 CHEMICAL MECHANICAL POLISHING PROCESS 审中-公开
标题翻译：化学机械抛光工艺
公开(公告)号：US20060057945A1
公开(公告)日：2006-03-16
申请号：US10904251
申请日：2004-11-01
申请人： Chia-Lin Hsu , Teng-Chun Tsai
发明人： Chia-Lin Hsu , Teng-Chun Tsai
IPC分类号： B24B1/00
CPC分类号： C09G1/02 , B24B37/042 , H01L21/3212 , H01L21/7684 , H01L21/76843
摘要： A first substrate and second substrate both having thereon a top bulk metal layer and a lower barrier layer are prepared. The first substrate is first loaded onto a first platen of a CMP tool, and then an upper portion of the top bulk metal layer of the first substrate is removed by first platen and first slurry. The first substrate is then transferred to a second platen having second slurry. The second substrate is loaded onto the first platen. Simultaneously, the remaining top bulk metal layer of the first substrate and an upper portion of top bulk metal layer of the second substrate are removed at substantially the same copper removal rate until the lower barrier layer of the first substrate is exposed. The first substrate is transferred to a third platen having third slurry for polishing the exposed barrier layer.
摘要翻译：制备其上具有顶部本体金属层和下部阻挡层的第一基板和第二基板。首先将第一衬底装载到CMP工具的第一压板上，然后通过第一压板和第一浆料除去第一衬底的顶部本体金属层的上部。然后将第一衬底转移到具有第二浆料的第二压板。将第二基板装载到第一压板上。同时，以基本相同的铜去除速率除去第一基板的剩余顶部本体金属层和第二基板的顶部本体金属层的上部，直到暴露第一基板的下部阻挡层。将第一衬底转移到具有第三浆料的第三压板上，用于抛光暴露的阻挡层。

19. 发明申请

US20050085163A1 Method for preventing edge peeling defect 审中-公开
标题翻译：防止边缘剥落缺陷的方法
公开(公告)号：US20050085163A1
公开(公告)日：2005-04-21
申请号：US10685588
申请日：2003-10-16
申请人： Chia-Lin Hsu , Shu-Hsien Lee , Chien-Chien Tsai , Hsiao-Ling Lu
发明人： Chia-Lin Hsu , Shu-Hsien Lee , Chien-Chien Tsai , Hsiao-Ling Lu
IPC分类号： B24B49/00 , B24B51/00 , H01L21/02
CPC分类号： H01L21/0209 , H01L21/02087
摘要： A method for improving edge peeling defect is disclosed in this invention. According to this invention, a wafer can be kept from the edge peeling defect of the prior art by introducing a step for removing the weakly adhesive films and the metal structures at the wafer edge after forming a metal interconnect layer on the wafer. Thus, this invention can raise the yield of semiconductor manufacturing, and reduce the pollution chance of the chamber of the semiconductor manufacture.
摘要翻译：本发明公开了一种改善边缘剥离缺陷的方法。根据本发明，通过在晶片上形成金属互连层之后，通过引入在晶片边缘处去除弱粘合膜和金属结构的步骤，可以保持晶片免受现有技术的边缘剥离缺陷的影响。因此，本发明可以提高半导体制造的产量，并且减少半导体制造室的污染机会。

20. 发明授权

US06660627B2 Method for planarization of wafers with high selectivities 有权
标题翻译：具有高选择性的晶片平面化方法
公开(公告)号：US06660627B2
公开(公告)日：2003-12-09
申请号：US10063133
申请日：2002-03-25
申请人： Shao-Chung Hu , Hsueh-Chung Chen , Shih-Hsun Hsu , Chia-Lin Hsu
发明人： Shao-Chung Hu , Hsueh-Chung Chen , Shih-Hsun Hsu , Chia-Lin Hsu
IPC分类号： H01L214763
CPC分类号： H01L21/7684 , H01L21/31051
摘要： A method for planarization of a semiconductor wafer with a high selectivity is describe. The semiconductor wafer has a hard mask, a stop layer disposed on the hard mask, and a barrier layer disposed on the stop layer. The method includes performing a chemical mechanical polishing (CMP) process on the barrier layer so as to expose the stop layer, and removing the stop layer. The polishing selectivity of the barrier layer relative to the stop layer is greater than 50. Since the material of stop layer is different from the material of barrier layer, the high selectivity is easily achieved. Thus, the surface of semiconductor wafer can be highly planarized.
摘要翻译：描述了一种以高选择性平坦化半导体晶片的方法。半导体晶片具有硬掩模，设置在硬掩模上的阻挡层和设置在阻挡层上的阻挡层。该方法包括在阻挡层上进行化学机械抛光（CMP）处理，以露出停止层，并除去停止层。阻挡层相对于停止层的抛光选择性大于50.由于阻挡层的材料与阻挡层的材料不同，因此容易实现高选择性。因此，半导体晶片的表面可以被高度平坦化。

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