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1. 发明授权

US06616510B2 Chemical mechanical polishing method for copper 有权
公开(公告)号：US06616510B2
公开(公告)日：2003-09-09
申请号：US09735323
申请日：2000-12-12
申请人： Chia-Lin Hsu , Teng-Chun Tsai , Yung-Tsung Wei , Ming-Sheng Yang
发明人： Chia-Lin Hsu , Teng-Chun Tsai , Yung-Tsung Wei , Ming-Sheng Yang
IPC分类号： H01L21465
CPC分类号： H01L21/3212 , B24B37/044 , C09G1/02
摘要： A chemical-mechanical polishing method for polishing a copper oxide layer and a copper layer. The copper oxide layer above the copper layer is first polished using an aqueous solution having a high concentration of polishing particles/chelating agent. The copper layer is then polished using a polishing slurry having a low concentration of polishing particles/chelating agent or the polishing slurry free of polishing particles/chelating agent. Alternatively, the copper oxide layer is polished using a mixture of the aqueous solution and the polishing slurry. After the copper oxide layer is removed, the copper layer is polished using the polishing slurry alone.

2. 发明授权

US06455432B1 Method for removing carbon-rich particles adhered on a copper surface 有权
标题翻译：去除附着在铜表面上的富碳颗粒的方法
公开(公告)号：US06455432B1
公开(公告)日：2002-09-24
申请号：US09729220
申请日：2000-12-05
申请人： Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei , Ming-Sheng Yang
发明人： Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei , Ming-Sheng Yang
IPC分类号： H01L21461
CPC分类号： H01L21/7684 , H01L21/02074 , H01L21/31053 , Y10S438/906
摘要： A method for removing carbon-rich particles adhered on a copper surface, especially on a copper surface of a copper/low k dielectric dual damascene structure is provided. A barrier layer and a barrier-CMP stopping layer are formed between the copper layer and the low k dielectric layer of the dual damascene structure. After a Cu-CMP process and a barrier CMP process, a chemical buffing polishing process using an acidic aqueous solution under a downward force of about 0.5 to 3 psi is performed to remove carbon-rich particles adhered on the exposed copper surface, which is due to the low k dielectric layer having at least 90% carbon element being exposed and then polished during the Cu-CMP process and the barrier CMP process, resulting from a dishing phenomenon of the copper layer occurring during the two CMP processes. Alternately, a first chemical buffing polishing process is followed after the Cu-CMP process, and a second chemical buffing polishing process is followed after the barrier CMP process.
摘要翻译：提供了一种去除附着在铜表面上的富碳颗粒的方法，特别是在铜/低k电介质双镶嵌结构的铜表面上。在双镶嵌结构的铜层和低k电介质层之间形成阻挡层和阻挡CMP阻挡层。在Cu-CMP工艺和阻挡CMP工艺之后，进行在约0.5至3psi的向下的力下使用酸性水溶液的化学抛光抛光工艺，以除去粘附在暴露的铜表面上的富碳颗粒，这是由于到具有至少90％的碳元素的低k电介质层被暴露，然后在Cu-CMP工艺和阻挡CMP工艺期间被抛光，这是由于在两个CMP工艺期间发生的铜层的凹陷现象引起的。或者，在Cu-CMP工艺之后进行第一次化学抛光抛光工艺，并且在阻挡CMP工艺之后遵循第二次化学抛光抛光工艺。

3. 发明授权

US06696361B2 Post-CMP removal of surface contaminants from silicon wafer 有权
标题翻译： CMP后移除表面污染物
公开(公告)号：US06696361B2
公开(公告)日：2004-02-24
申请号：US09854006
申请日：2001-05-10
申请人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
发明人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
IPC分类号： H01L214763
CPC分类号： H01L21/02074 , H01L21/3212
摘要： A method of removing contaminants from a silicon wafer after chemical-mechanical polishing (CMP). After a copper chemical-mechanical polishing and a subsequent barrier chemical-mechanical polishing operation, an aqueous solution of ozone in de-ionized water is applied to clean the silicon wafer so that contaminants on the wafer are removed. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after copper and barrier CMP and then the wafer is cleaned using a chemical solution or de-ionized water. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after both copper-CMP and barrier-CMP and then the wafer is cleaned using a chemical solution or de-ionized water.
摘要翻译：化学机械抛光（CMP）后从硅晶片去除污染物的方法。在铜化学机械抛光和随后的屏障化学 - 机械抛光操作之后，施加去离子水中的臭氧水溶液以清洁硅晶片，从而去除晶片上的污染物。或者，在铜和阻挡CMP之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。或者，在铜CMP和阻挡CMP两者之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。

4. 发明授权

US07232752B2 Method of removing contaminants from a silicon wafer after chemical-mechanical polishing operation 有权
标题翻译：在化学机械抛光操作后从硅晶片去除污染物的方法
公开(公告)号：US07232752B2
公开(公告)日：2007-06-19
申请号：US10603924
申请日：2003-06-24
申请人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
发明人： Shao-Chung Hu , Teng-Chun Tsai , Chia-Lin Hsu , Yung-Tsung Wei
IPC分类号： H01L21/4763 , H01L21/302
CPC分类号： H01L21/3212 , H01L21/02074
摘要： A method of removing contaminants from a silicon wafer after chemical-mechanical polishing (CMP). After a copper chemical-mechanical polishing and a subsequent barrier chemical-mechanical polishing operation, an aqueous solution of ozone in de-ionized water is applied to clean the silicon wafer so that contaminants on the wafer are removed. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after copper and barrier CMP and then the wafer is cleaned using a chemical solution or de-ionized water. Alternatively, an ozone/de-ionized water buffer-polishing process is conducted after both copper-CMP and barrier-CMP and then the wafer is cleaned using a chemical solution or de-ionized water.
摘要翻译：化学机械抛光（CMP）后从硅晶片去除污染物的方法。在铜化学机械抛光和随后的屏障化学 - 机械抛光操作之后，施加去离子水中的臭氧水溶液以清洁硅晶片，从而去除晶片上的污染物。或者，在铜和阻挡CMP之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。或者，在铜CMP和阻挡CMP两者之后进行臭氧/去离子水缓冲抛光工艺，然后使用化学溶液或去离子水清洁晶片。

5. 发明授权

US08828745B2 Method for manufacturing through-silicon via 有权
标题翻译：硅通孔制造方法
公开(公告)号：US08828745B2
公开(公告)日：2014-09-09
申请号：US13176790
申请日：2011-07-06
申请人： Wei-Che Tsao , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
发明人： Wei-Che Tsao , Chia-Lin Hsu , Jen-Chieh Lin , Teng-Chun Tsai , Hsin-Kuo Hsu , Ya-Hsueh Hsieh , Ren-Peng Huang , Chih-Hsien Chen , Wen-Chin Lin , Yung-Lun Hsieh
IPC分类号： H01L21/66 , H01L21/306 , H01L21/304 , H01L21/768 , H01L21/3105 , H01L21/321
CPC分类号： H01L21/31053 , H01L21/3212 , H01L21/76898 , H01L22/12 , H01L22/26 , H01L2924/0002 , H01L2924/00
摘要： A method for manufacturing TSVs, wherein the method comprises several steps as follows: A stack structure having a substrate and an ILD layer (inter layer dielectric layer) is provided, in which an opening penetrating through the ILD layer and further extending into the substrate is formed. After an insulator layer and a metal barrier layer are formed on the stack structure and the sidewalls of the opening, a top metal layer is then formed on the stack structure to fulfill the opening. A first planarization process stopping on the barrier layer is conducted to remove a portion of the top metal layer. A second planarization process stopping on the ILD layer is subsequently conducted to remove a portion of the metal barrier layer, a portion of the insulator layer and a portion of the top metal layer, wherein the second planarization process has a polishing endpoint determined by a light interferometry or a motor current.
摘要翻译：一种制造TSV的方法，其中该方法包括以下几个步骤：提供具有基板和ILD层（层间电介质层）的堆叠结构，其中穿透ILD层并进一步延伸到基板中的开口是形成。在堆叠结构和开口的侧壁上形成绝缘体层和金属阻挡层之后，在堆叠结构上形成顶部金属层以实现开口。进行停止在阻挡层上的第一平面化处理以去除顶部金属层的一部分。随后进行停止在ILD层上的第二平坦化处理以去除金属阻挡层的一部分，绝缘体层的一部分和顶部金属层的一部分，其中第二平坦化工艺具有由光线确定的抛光终点干涉测量或电机电流。

6. 发明授权

US08779526B2 Semiconductor device 有权
标题翻译：半导体器件
公开(公告)号：US08779526B2
公开(公告)日：2014-07-15
申请号：US13283603
申请日：2011-10-28
申请人： Chun-Wei Hsu , Po-Cheng Huang , Ren-Peng Huang , Jie-Ning Yang , Chia-Lin Hsu , Teng-Chun Tsai , Chih-Hsun Lin , Chang-Hung Kung , Yen-Ming Chen , Yu-Ting Li
发明人： Chun-Wei Hsu , Po-Cheng Huang , Ren-Peng Huang , Jie-Ning Yang , Chia-Lin Hsu , Teng-Chun Tsai , Chih-Hsun Lin , Chang-Hung Kung , Yen-Ming Chen , Yu-Ting Li
IPC分类号： H01L29/78
CPC分类号： H01L27/0629
摘要： A method for fabricating semiconductor device is disclosed. The method includes the steps of: providing a substrate having a transistor region and a resistor region; forming a shallow trench isolation (STI) on the substrate of the resistor region; forming a tank in the STI of the resistor region; and forming a resistor in the tank and on the surface of the STI adjacent to two sides of the tank.
摘要翻译：公开了半导体器件的制造方法。该方法包括以下步骤：提供具有晶体管区域和电阻器区域的衬底; 在电阻器区域的衬底上形成浅沟槽隔离（STI）; 在电阻区域的STI中形成槽; 并且在罐中形成电阻器，并且在与槽的两侧相邻的STI的表面上形成电阻器。

7. 发明授权

US08513128B2 Poly opening polish process 有权
标题翻译：多开口抛光工艺
公开(公告)号：US08513128B2
公开(公告)日：2013-08-20
申请号：US13162776
申请日：2011-06-17
申请人： Chun-Wei Hsu , Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chih-Hsun Lin , Chang-Hung Kung , Chia-His Chen , Yen-Ming Chen
发明人： Chun-Wei Hsu , Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chih-Hsun Lin , Chang-Hung Kung , Chia-His Chen , Yen-Ming Chen
IPC分类号： H01L21/304 , H01L21/306 , B44C1/22
CPC分类号： H01L21/31053 , H01L21/02065 , H01L29/517 , H01L29/66545
摘要： A poly opening polish process includes the following steps. A semi-finished semiconductor component is provided. The semi-finished semiconductor component includes a substrate, a gate disposed on the substrate, and a dielectric layer disposed on the substrate and covering the gate. A first polishing process is applied onto the dielectric layer. A second polishing process is applied to the gate. The second polishing process utilizes a wetting solution including a water soluble polymer surfactant, an alkaline compound and water. The poly opening polish process can effectively remove an oxide residue formed in the chemical mechanical polish, thereby improving the performance of the integrated circuit and reducing the production cost of the integrated circuit.
摘要翻译：多孔抛光工艺包括以下步骤。提供半成品半导体元件。半成品半导体部件包括基板，设置在基板上的栅极和设置在基板上并覆盖栅极的电介质层。将第一抛光工艺施加到电介质层上。第二次抛光工艺应用于浇口。第二抛光工艺利用包含水溶性聚合物表面活性剂，碱性化合物和水的润湿溶液。多孔抛光工艺可有效去除化学机械抛光中形成的氧化物残留物，从而提高集成电路的性能，降低集成电路的生产成本。

8. 发明申请

US20130052825A1 SEMICONDUCTOR PROCESS 有权
标题翻译：半导体工艺
公开(公告)号：US20130052825A1
公开(公告)日：2013-02-28
申请号：US13220692
申请日：2011-08-30
申请人： Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chun-Wei Hsu , Yen-Ming Chen , Chih-Hsun Lin , Chang-Hung Kung
发明人： Po-Cheng Huang , Teng-Chun Tsai , Chia-Lin Hsu , Chun-Wei Hsu , Yen-Ming Chen , Chih-Hsun Lin , Chang-Hung Kung
IPC分类号： H01L21/306
CPC分类号： H01L21/3212 , H01L21/3105 , H01L21/31051 , H01L21/31053 , H01L21/7684 , H01L21/823835 , H01L29/665
摘要： A semiconductor process includes the following steps. A first gate structure and a second gate structure are formed on a substrate, wherein the top of the first gate structure includes a cap layer, so that the vertical height of the first gate structure is higher than the vertical height of the second gate structure. An interdielectric layer is formed on the substrate. A first chemical mechanical polishing process is performed to expose the top surface of the cap layer. A second chemical mechanical polishing process is performed to expose the top surface of the second gate structure or an etching process is performed to remove the interdielectric layer located on the second gate structure. A second chemical mechanical polishing process is then performed to remove the cap layer.
摘要翻译：半导体工艺包括以下步骤。第一栅极结构和第二栅极结构形成在基板上，其中第一栅极结构的顶部包括盖层，使得第一栅极结构的垂直高度高于第二栅极结构的垂直高度。在基板上形成介电层。执行第一化学机械抛光工艺以暴露盖层的顶表面。执行第二化学机械抛光工艺以暴露第二栅极结构的顶表面，或执行蚀刻工艺以去除位于第二栅极结构上的介电层。然后执行第二化学机械抛光工艺以除去盖层。

9. 发明申请

US20060057944A1 CHEMICAL MECHANICAL POLISHING PROCESS 有权
标题翻译：化学机械抛光工艺
公开(公告)号：US20060057944A1
公开(公告)日：2006-03-16
申请号：US10711392
申请日：2004-09-16
申请人： Chia-Lin Hsu , Teng-Chun Tsai
发明人： Chia-Lin Hsu , Teng-Chun Tsai
IPC分类号： B24B1/00
CPC分类号： H01L21/7684 , C09G1/02 , H01L21/3212 , H01L21/76843
摘要： A high throughput chemical mechanical polishing process is disclosed. A substrate having thereon a top bulk metal layer and a lower barrier layer is prepared. The top bulk metal layer is polished at a substantial constant removal rate to expose the barrier layer by utilizing a first platen and first slurry being selective to the barrier layer. The exposed barrier layer is then polished by using a second platen and second slurry. The first slurry has a copper to barrier polishing selectivity of greater than 30.
摘要翻译：公开了高通量化学机械抛光工艺。制备其上具有顶部本体金属层和下部阻挡层的基板。顶部本体金属层以基本恒定的去除速率被抛光，以通过利用第一压板和对阻挡层有选择性的第一浆料来暴露阻挡层。然后通过使用第二压板和第二浆料来抛光暴露的阻挡层。第一种浆料具有大于30的铜屏障抛光选择性。

10. 发明授权

US06831013B2 Method of forming a dual damascene via by using a metal hard mask layer 有权
标题翻译：通过使用金属硬掩模层形成双镶嵌过孔的方法
公开(公告)号：US06831013B2
公开(公告)日：2004-12-14
申请号：US09986929
申请日：2001-11-13
申请人： Teng-Chun Tsai , Chia-Lin Hsu
发明人： Teng-Chun Tsai , Chia-Lin Hsu
IPC分类号： H01L21302
CPC分类号： H01L21/76811 , H01L21/0332 , H01L21/31144 , H01L21/76813
摘要： This invention relates to a method of forming a dual damascene via, in particular to a method of forming a dual damascene via by using a metal hard mask layer. The present invention uses a metal layer to be a hard mask layer to make the surface of the isolation layer become a level and smooth surface and not become a rounding convex and to prevent the via being connected with others vias to cause the leakage defects after forming the shape of the via.
摘要翻译：本发明涉及一种形成双镶嵌层的方法，特别涉及通过使用金属硬掩模层形成双镶嵌过孔的方法。本发明使用金属层作为硬掩模层，使得隔离层的表面变得水平和光滑的表面，并且不变成圆形凸起，并且防止通孔与其它通孔连接，以在成形之后引起泄漏缺陷通孔的形状。

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