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11. 发明授权

US06197455B1 Lithographic mask repair using a scanning tunneling microscope 失效
标题翻译：使用扫描隧道显微镜进行平版印刷修复
公开(公告)号：US06197455B1
公开(公告)日：2001-03-06
申请号：US09231679
申请日：1999-01-14
申请人： Sanjay K. Yedur , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Kathleen R. Early
发明人： Sanjay K. Yedur , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Kathleen R. Early
IPC分类号： G03F900
CPC分类号： G03F1/74 , Y10S977/856 , Y10S977/859
摘要： A method of repairing defects in a photomask used in the formation of a semiconductor wafer includes the use of a scanning tunneling microscope. The scanning tunneling microscope includes a very sharp tip having a diameter on the order of 100 Å or less. In order to remove excess material from a mask layer in the photomask, the tip is placed into contact with those regions having such excess material and the tip is used to scrape the excess material away. In order to add material to voids in a mask layer of the photomask, the tip is placed in proximity to those areas in need of the excess material and caused to deposit such material upon, for example, application of a bias voltage to the tip.
摘要翻译：修复用于形成半导体晶片的光掩模中的缺陷的方法包括使用扫描隧道显微镜。扫描隧道显微镜包括具有大约等于或小于100埃的直径的非常锋利的尖端。为了从光掩模中的掩模层去除多余的材料，将尖端放置成与具有这种多余材料的那些区域接触，并且尖端用于刮除多余的材料。为了向光掩模的掩模层中的空隙添加材料，将尖端放置在需要多余材料的那些区域附近，并且使得将这种材料沉积在例如向尖端施加偏置电压。

12. 发明授权

US06592932B2 Nozzle arm movement for resist development 失效
标题翻译：喷嘴臂运动用于抗蚀剂开发
公开(公告)号：US06592932B2
公开(公告)日：2003-07-15
申请号：US09814131
申请日：2001-03-21
申请人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
发明人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
IPC分类号： B05D312
CPC分类号： H01L21/6715 , G03F7/3021
摘要： A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a nozzle adapted to apply a predetermined volume of developer material on a photoresist material layer along a linear path having a length approximately equal to the diameter of the photoresist material layer. A movement system moves the nozzle to a first position offset from a central region of the photoresist material layer for applying a first predetermined volume of developer material to the photoresist material layer while the developer material is spin coated. The movement system also moves the nozzle to a second position offset from the central region for applying a second predetermined volume of developer material to the photoresist material layer while the developer is spin coated. The first position is located on an opposite side of the central region with respect to the second position. A method of adjusting the offset position and/or volume of developer material applied at the first and second position is also provided. The method utilizes developed photoresist material layer thickness data provided by a measurement system to adjust the offset position and/or volume of the developer.
摘要翻译：提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。该系统包括适于沿着具有大致等于光致抗蚀剂材料层的直径的直线路径的光致抗蚀剂材料层上施加预定体积的显影剂材料的喷嘴。移动系统将喷嘴移动到偏离光致抗蚀剂材料层的中心区域的第一位置，以在旋转涂覆显影剂材料的同时将第一预定体积的显影剂材料施加到光致抗蚀剂材料层。移动系统还将喷嘴移动到偏离中心区域的第二位置，以在旋涂涂覆显影剂的同时将第二预定体积的显影剂材料施加到光致抗蚀剂材料层。第一位置相对于第二位置位于中心区域的相反侧。还提供了一种调节在第一和第二位置施加的显影剂材料的偏移位置和/或体积的方法。该方法利用由测量系统提供的显影的光致抗蚀剂材料层厚度数据来调节显影剂的偏移位置和/或体积。

13. 发明授权

US06270579B1 Nozzle arm movement for resist development 有权
标题翻译：喷嘴臂运动用于抗蚀剂开发
公开(公告)号：US06270579B1
公开(公告)日：2001-08-07
申请号：US09429995
申请日：1999-10-29
申请人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
发明人： Ramkumar Subramanian , Khoi A. Phan , Bharath Rangarajan , Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur
IPC分类号： B05C1102
CPC分类号： H01L21/6715 , G03F7/3028
摘要： A system and method is provided that facilitates the application of a uniform layer of developer material on a photoresist material layer. The system includes a multiple tip nozzle and a movement system that moves the nozzle to an operating position above a central region of a photoresist material layer located on a substrate, and applies a volume of developer as the nozzle scan moves across a predetermined path. The movement system moves the nozzle in two dimensions by providing an arm that has a first arm member that is pivotable about a first rotational axis and a second arm member that is pivotable about a second rotational axis or is movable along a translational axis. The system also provides a measurement system that measures the thickness uniformity of the developed photoresist material layer disposed on a test wafer. The thickness uniformity data is used to reconfigure the predetermined path of the nozzle as the developer is applied. The thickness uniformity data can also be used to adjust the volume of developer applied along the path and/or the volume flow rate.
摘要翻译：提供了一种有助于在光致抗蚀剂材料层上施加均匀的显影剂材料层的系统和方法。该系统包括多个尖端喷嘴和运动系统，该运动系统将喷嘴移动到位于基板上的光致抗蚀剂材料层的中心区域上方的操作位置，并且当喷嘴扫描移动穿过预定路径时施加一定体积的显影剂。移动系统通过提供具有第一臂构件的臂来移动喷嘴，该臂具有可围绕第一旋转轴线枢转的第一臂构件和可围绕第二旋转轴线枢转或可沿着平移轴线移动的第二臂构件。该系统还提供了测量设置在测试晶片上的显影的光致抗蚀剂材料层的厚度均匀性的测量系统。当施加显影剂时，厚度均匀性数据用于重新配置喷嘴的预定路径。厚度均匀性数据也可用于调节沿路径施加的显影剂的体积和/或体积流量。

14. 发明授权

US06187666B1 CVD plasma process to fill contact hole in damascene process 有权
标题翻译： CVD等离子体工艺在镶嵌工艺中填充接触孔
公开(公告)号：US06187666B1
公开(公告)日：2001-02-13
申请号：US09328148
申请日：1999-06-08
申请人： Bhanwar Singh , Michael K. Templeton , Bharath Rangarajan , Christopher F. Lyons , Sanjay K. Yedur , Ramkumar Subramanian
发明人： Bhanwar Singh , Michael K. Templeton , Bharath Rangarajan , Christopher F. Lyons , Sanjay K. Yedur , Ramkumar Subramanian
IPC分类号： H01L214763
CPC分类号： H01L21/76808 , H01L21/31144 , H01L21/312 , H01L21/76831 , H01L2221/1063
摘要： The present invention relates to a method for fabricating interconnecting lines and vias in a layer of insulating material. A via is formed in the layer of insulating material. A protective material is formed so as to be conformal to at least edges and sidewalls of the via, the protective material facilitating shielding of at least the edges and sidewalls of the via from a trench etch step. The trench etch step is performed to form a trench opening in the insulating material. The via and trench are filled with a conductive metal.
摘要翻译：本发明涉及在绝缘材料层中制造互连线和通孔的方法。在绝缘材料层中形成通孔。形成保护材料以至少与通孔的边缘和侧壁共形，所述保护材料有助于屏蔽通孔的至少边缘和侧壁至沟槽蚀刻步骤。执行沟槽蚀刻步骤以在绝缘材料中形成沟槽开口。通孔和沟槽填充有导电金属。

15. 发明授权

US06354133B1 Use of carbon nanotubes to calibrate conventional tips used in AFM 失效
标题翻译：使用碳纳米管校准AFM中使用的常规提示
公开(公告)号：US06354133B1
公开(公告)日：2002-03-12
申请号：US09729293
申请日：2000-12-04
申请人： Sanjay K. Yedur , Bhanwar Singh , Bryan K. Choo , Michael K. Templeton , Ramkumar Subramanian
发明人： Sanjay K. Yedur , Bhanwar Singh , Bryan K. Choo , Michael K. Templeton , Ramkumar Subramanian
IPC分类号： G01B528
CPC分类号： G01Q40/02 , G01Q40/00 , Y10S977/742 , Y10S977/842 , Y10S977/849 , Y10S977/85 , Y10S977/876 , Y10S977/901
摘要： The present invention provides systems, methods, and standards for calibrating nano-measuring devices. Calibration standards of the invention include carbon nanotubes and methods of the invention involve scanning carbon nanotubes using nano-scale measuring devices. The widths of the carbon nanotube calibration standards are known with a high degree of accuracy. The invention allows calibration of a wide variety of nano-scale measuring devices, taking into account many, and in some cases all, of the systematic errors that may affect a nano-scale measurement. The invention may be used to accurately calibrate line width, line height, and trench width measurements and may be used to precisely characterize both scanning probe microscope tips and electron microscope beams.
摘要翻译：本发明提供了用于校准纳米测量装置的系统，方法和标准。本发明的校准标准包括碳纳米管，本发明的方法涉及使用纳米级测量装置扫描碳纳米管。碳纳米管校准标准品的宽度以高精度已知。考虑到可能影响纳米尺度测量的许多系统误差以及在所有这些系统误差中，本发明允许校准各种各样的纳米尺度的测量装置。本发明可以用于精确校准线宽，线高度和沟槽宽度测量，并且可以用于精确地表征扫描探针显微镜尖端和电子显微镜束。

16. 发明授权

US06635874B1 Self-cleaning technique for contamination on calibration sample in SEM 失效
标题翻译：扫描电镜校准样品污染自清洁技术
公开(公告)号：US06635874B1
公开(公告)日：2003-10-21
申请号：US09729290
申请日：2000-12-04
申请人： Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur , Bryan K. Choo
发明人： Bhanwar Singh , Michael K. Templeton , Sanjay K. Yedur , Bryan K. Choo
IPC分类号： G21K700
CPC分类号： G01N23/22 , G01N2001/2893
摘要： The present invention provides SEM calibration standards, and associated SEM systems and SEM calibration methods, that are self-cleaning with respect to electron beam deposited carbon. The calibration standards have coatings containing a transition metal oxide. The coatings facilitate oxidation of deposited carbon, whereby carbon buildup can be stopped or reversed. By providing a mechanism to mitigate carbon buildup, calibration standards provided by the present invention achieve high accuracy, high durability, and low cost.
摘要翻译：本发明提供了SEM校准标准，以及相关的SEM系统和SEM校准方法，它们是相对于电子束沉积碳进行自清洁的。校准标准品含有过渡金属氧化物的涂层。涂层促进沉积碳的氧化，从而可以停止或反转碳积累。通过提供减轻碳积累的机制，本发明提供的校准标准实现高精度，高耐久性和低成本。

17. 发明授权

US06591658B1 Carbon nanotubes as linewidth standards for SEM & AFM 失效
标题翻译：碳纳米管作为SEM和AFM的线宽标准
公开(公告)号：US06591658B1
公开(公告)日：2003-07-15
申请号：US09729297
申请日：2000-12-04
申请人： Sanjay K. Yedur , Bhanwar Singh , Bryan K. Choo , Michael K. Templeton , Ramkumar Subramanian
发明人： Sanjay K. Yedur , Bhanwar Singh , Bryan K. Choo , Michael K. Templeton , Ramkumar Subramanian
IPC分类号： G01B1508
CPC分类号： G01Q40/02 , H01J2237/2816 , H01J2237/2826 , Y10S977/742 , Y10S977/86 , Y10S977/863 , Y10S977/869 , Y10S977/875 , Y10S977/881 , Y10T29/53004
摘要： The present invention provides systems, methods, and standards for calibrating nano-measuring devices. Calibration standards of the invention include carbon nanotubes and methods of the invention involve scanning carbon nanotubes using nano-scale measuring devices. The widths of the carbon nanotube calibration standards are known with a high degree of accuracy. The invention allows calibration of a wide variety of nano-scale measuring devices, taking into account many, and in some cases all, of the systematic errors that may affect a nano-scale measurement. The invention may be used to accurately calibrate line width, line height, and trench width measurements and may be used to precisely characterize both scanning probe microscope tips and electron microscope beams.
摘要翻译：本发明提供了用于校准纳米测量装置的系统，方法和标准。本发明的校准标准包括碳纳米管，本发明的方法涉及使用纳米级测量装置扫描碳纳米管。碳纳米管校准标准品的宽度以高精度已知。考虑到可能影响纳米尺度测量的许多系统误差以及在所有这些系统误差中，本发明允许校准各种各样的纳米尺度的测量装置。本发明可以用于精确校准线宽，线高度和沟槽宽度测量，并且可以用于精确地表征扫描探针显微镜尖端和电子显微镜束。

18. 发明授权

US07078348B1 Dual layer patterning scheme to make dual damascene 失效
标题翻译：双层图案方案制作双镶嵌
公开(公告)号：US07078348B1
公开(公告)日：2006-07-18
申请号：US09893188
申请日：2001-06-27
申请人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton
发明人： Bhanwar Singh , Ramkumar Subramanian , Bharath Rangarajan , Michael K. Templeton
IPC分类号： H01L21/302 , H01L21/3065
CPC分类号： H01L21/31144 , H01L21/76807 , H01L21/76811 , H01L21/76813
摘要： One aspect of the present invention relates to a method for making a dual damascene pattern in an insulative layer in a single etch process involving providing a wafer having at least one insulative layer formed thereon; depositing a first photoresist layer over the at least one insulative layer; patterning a first image into the first photoresist layer; curing the first patterned photoresist layer; depositing a second photoresist layer over the first patterned photoresist layer; patterning a second image into the second photoresist layer; and etching the at least one insulative layer through the first patterned photoresist layer and the second patterned photoresist layer simultaneously in the single etch process.
摘要翻译：本发明的一个方面涉及在单一蚀刻工艺中在绝缘层中制造双镶嵌图案的方法，该方法包括提供其上形成有至少一个绝缘层的晶片; 在所述至少一个绝缘层上沉积第一光致抗蚀剂层; 将第一图像图案化成第一光致抗蚀剂层; 固化第一图案化光致抗蚀剂层; 在所述第一图案化光致抗蚀剂层上沉积第二光致抗蚀剂层; 将第二图像图案化成第二光致抗蚀剂层; 以及在单次蚀刻工艺中同时蚀刻通过第一图案化光致抗蚀剂层和第二图案化光致抗蚀剂层的至少一个绝缘层。

19. 发明授权

US06746822B1 Use of surface coupling agent to improve adhesion 有权
标题翻译：使用表面偶联剂改善附着力
公开(公告)号：US06746822B1
公开(公告)日：2004-06-08
申请号：US10050484
申请日：2002-01-16
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh
IPC分类号： G03F720
CPC分类号： G03F7/265 , H01L21/0273 , H01L21/31144 , H01L21/32139
摘要： Disclosed are methods of processing a semiconductor structure, involving the steps of depositing a light-degradable surface coupling agent on a semiconductor substrate; depositing a resist over the light-degradable surface coupling agent; irradiating portions of the resist, wherein the light-degradable surface coupling agent under the irradiated portions of the resist at least partially decomposes; and developing the resist.
摘要翻译：公开了处理半导体结构的方法，包括在半导体衬底上沉积可光降解的表面偶联剂的步骤; 在光可降解表面偶联剂上沉积抗蚀剂; 照射抗蚀剂的部分，其中抗蚀剂照射部分下的可光降解表面偶联剂至少部分分解; 并开发抗蚀剂。

20. 发明授权

US06629786B1 Active control of developer time and temperature 失效
标题翻译：主动控制显影时间和温度
公开(公告)号：US06629786B1
公开(公告)日：2003-10-07
申请号：US09845232
申请日：2001-04-30
申请人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
发明人： Bharath Rangarajan , Michael K. Templeton , Bhanwar Singh , Ramkumar Subramanian
IPC分类号： G03D500
CPC分类号： G03D5/00
摘要： A system for regulating the time and temperature of a development process is provided. The system includes one or more light sources, each light source directing light to one or more gratings being developed on a wafer. Light reflected from the gratings is collected by a measuring system, which processes the collected light. Light passing through the gratings may similarly be collected by the measuring system, which processes the collected light. The collected light is indicative of the progress of development of the respective portions of the wafer. The measuring system provides progress of development related data to a processor that determines the progress of development of the respective portions of the wafer. The system also includes a plurality of heating devices, each heating device corresponds to a respective portion of the developer and provides for the heating thereof. The processor selectively controls the heating devices so as to regulate temperature of the respective portions of the wafer.
摘要翻译：提供了一种用于调节开发过程的时间和温度的系统。该系统包括一个或多个光源，每个光源将光引导到在晶片上显影的一个或多个光栅。从光栅反射的光被测量系统收集，该系统处理收集的光。通过光栅的光可以类似地由处理所收集的光的测量系统收集。所收集的光表示晶片的各个部分的显影进展。该测量系统提供开发相关数据的进展到处理器，该处理器确定晶片的相应部分的开发进度。该系统还包括多个加热装置，每个加热装置对应于显影剂的相应部分并提供其加热。处理器选择性地控制加热装置，以调节晶片各部分的温度。

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