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11. 发明授权

US08174077B2 High-voltage variable breakdown voltage (BV) diode for electrostatic discharge (ESD) applications 有权
标题翻译：用于静电放电（ESD）应用的高压可变击穿电压（BV）二极管
公开(公告)号：US08174077B2
公开(公告)日：2012-05-08
申请号：US13190993
申请日：2011-07-26
申请人： Martin B. Mollat , Tony Thanh Phan
发明人： Martin B. Mollat , Tony Thanh Phan
IPC分类号： H01L23/62
CPC分类号： H01L29/8611 , H01L29/0649
摘要： Formation of an electrostatic discharge (ESD) protection device having a desired breakdown voltage (BV) is disclosed. The breakdown voltage (BV) of the device can be set, at least in part, by varying the degree to which a surface junction between two doped areas is covered. This junction can be covered in one embodiment by a dielectric material and/or a semiconductor material. Moreover, a variable breakdown voltage can be established by concurrently forming, in a single process flow, multiple diodes that have different breakdown voltages, where the diodes are also formed concurrently with circuitry that is to be protected. To generate the variable or different breakdown voltages, respective edges of isolation regions can be extended to cover more of the surface junctions of different diodes. In this manner, a first diode can have a first breakdown voltage (BV1), a second diode can have a second breakdown voltage (BV2), a third diode can have a third breakdown voltage (BV3), etc. This can provide substantial efficiency and cost savings where there may be varying ESD requirements.
摘要翻译：公开了具有期望的击穿电压（BV）的静电放电（ESD）保护装置的形成。器件的击穿电压（BV）可以至少部分地通过改变覆盖两个掺杂区域之间的表面结的程度来设定。在一个实施例中，可以通过介电材料和/或半导体材料来覆盖该结。此外，可以通过在单个工艺流程中同时形成具有不同击穿电压的多个二极管来建立可变击穿电压，其中二极管也与要保护的电路同时形成。为了产生可变的或不同的击穿电压，隔离区域的各个边缘可以被扩展以覆盖不同二极管的更多的表面结。以这种方式，第一二极管可以具有第一击穿电压（BV1），第二二极管可以具有第二击穿电压（BV2），第三二极管可以具有第三击穿电压（BV3）等。这可以提供显着的效率以及可能存在不同ESD要求的成本节约。

12. 发明申请

US20110278693A1 HIGH-VOLTAGE VARIABLE BREAKDOWN VOLTAGE (BV) DIODE FOR ELECTROSTATIC DISCHARGE (ESD) APPLICATIONS 有权
标题翻译：用于静电放电（ESD）应用的高电压可变电压（BV）二极管
公开(公告)号：US20110278693A1
公开(公告)日：2011-11-17
申请号：US13190993
申请日：2011-07-26
申请人： Martin B. Mollat , Tony Thanh Phan
发明人： Martin B. Mollat , Tony Thanh Phan
IPC分类号： H01L29/861
CPC分类号： H01L29/8611 , H01L29/0649
摘要： Formation of an electrostatic discharge (ESD) protection device having a desired breakdown voltage (BV) is disclosed. The breakdown voltage (BV) of the device can be set, at least in part, by varying the degree to which a surface junction between two doped areas is covered. This junction can be covered in one embodiment by a dielectric material and/or a semiconductor material. Moreover, a variable breakdown voltage can be established by concurrently forming, in a single process flow, multiple diodes that have different breakdown voltages, where the diodes are also formed concurrently with circuitry that is to be protected. To generate the variable or different breakdown voltages, respective edges of isolation regions can be extended to cover more of the surface junctions of different diodes. In this manner, a first diode can have a first breakdown voltage (BV1), a second diode can have a second breakdown voltage (BV2), a third diode can have a third breakdown voltage (BV3), etc. This can provide substantial efficiency and cost savings where there may be varying ESD requirements.
摘要翻译：公开了具有期望的击穿电压（BV）的静电放电（ESD）保护装置的形成。器件的击穿电压（BV）可以至少部分地通过改变覆盖两个掺杂区域之间的表面结的程度来设定。在一个实施例中，可以通过介电材料和/或半导体材料来覆盖该结。此外，可以通过在单个工艺流程中同时形成具有不同击穿电压的多个二极管来建立可变击穿电压，其中二极管也与要保护的电路同时形成。为了产生可变的或不同的击穿电压，隔离区域的各个边缘可以被扩展以覆盖不同二极管的更多的表面结。以这种方式，第一二极管可以具有第一击穿电压（BV1），第二二极管可以具有第二击穿电压（BV2），第三二极管可以具有第三击穿电压（BV3）等。这可以提供显着的效率以及可能存在不同ESD要求的成本节约。

13. 发明授权

US07838429B2 Method to manufacture a thin film resistor 有权
标题翻译：制造薄膜电阻的方法
公开(公告)号：US07838429B2
公开(公告)日：2010-11-23
申请号：US11779465
申请日：2007-07-18
申请人： Tony Phan , Kyle M. Flessner , Martin B. Mollat , Connie Wang , Arthur Pan , Eric William Beach , Michelle R. Keramidas , Karen Elizabeth Burks
发明人： Tony Phan , Kyle M. Flessner , Martin B. Mollat , Connie Wang , Arthur Pan , Eric William Beach , Michelle R. Keramidas , Karen Elizabeth Burks
IPC分类号： H01L21/302
CPC分类号： H01L28/20 , H01L21/8221 , H01L27/0688
摘要： A method for manufacturing a semiconductor device that method comprises forming a thin film resistor by a process that includes depositing a resistive material layer on a semiconductor substrate. The process also includes depositing an insulating layer on the resistive material layer, and performing a first dry etch process on the insulating layer to form an insulative body. The process further includes performing a second dry etch process on the resistive material layer to form a resistive body. The resistive body and the insulative body have substantially identical perimeters.
摘要翻译：一种用于制造半导体器件的方法，该方法包括通过包括在半导体衬底上沉积电阻材料层的工艺来形成薄膜电阻器。该方法还包括在电阻材料层上沉积绝缘层，以及在绝缘层上进行第一干蚀刻工艺以形成绝缘体。该方法还包括在电阻材料层上执行第二干蚀刻工艺以形成电阻体。电阻体和绝缘体具有基本相同的周长。

14. 发明授权

US07415378B2 Methods for analyzing critical defects in analog integrated circuits 有权
标题翻译：分析模拟集成电路中的关键缺陷的方法
公开(公告)号：US07415378B2
公开(公告)日：2008-08-19
申请号：US11048027
申请日：2005-01-31
申请人： Martin B. Mollat , Milind V. Khandekar , Tony T. Phan , Kyle M. Flessner
发明人： Martin B. Mollat , Milind V. Khandekar , Tony T. Phan , Kyle M. Flessner
IPC分类号： G06F19/00
CPC分类号： G01R31/2894 , G01R31/311
摘要： The present invention provides a method for analyzing critical defects in analog integrated circuits. The method for analyzing critical defects, among other possible steps, may include fault testing a power field effect transistor (120) portion of an analog integrated circuit (115) to obtain electrical failure data. The method may further include performing an in-line optical inspection of the analog integrated circuit (115) to obtain physical defect data, and correlating the electrical failure data and physical defect data to analyze critical defects.
摘要翻译：本发明提供了一种用于分析模拟集成电路中的关键缺陷的方法。用于分析关键缺陷的方法以及其他可能的步骤可以包括对模拟集成电路（115）的功率场效应晶体管（120）部分进行故障测试以获得电气故障数据。该方法还可以包括执行模拟集成电路（115）的在线光学检查以获得物理缺陷数据，以及将电故障数据和物理缺陷数据相关联以分析关键缺陷。

15. 发明申请

US20070287204A1 A METHOD FOR LOCATING A SUB-SURFACE FEATURE USING A SCATTEROMETER 有权
标题翻译：使用扫描仪定位子表面特征的方法
公开(公告)号：US20070287204A1
公开(公告)日：2007-12-13
申请号：US11423209
申请日：2006-06-09
申请人： Martin B. Mollat , Christopher C. Baum , Jonathan W. VanBuskirk
发明人： Martin B. Mollat , Christopher C. Baum , Jonathan W. VanBuskirk
IPC分类号： H01L21/00 , H01L21/66 , G01R31/26
CPC分类号： G01N21/9505 , G01N21/4788
摘要： The present invention provides a method for manufacturing a semiconductor device. The method for manufacturing the semiconductor device, without limitation, may include providing a substrate having a sub-surface feature and a surface feature, and determining a location of the sub-surface feature relative to the surface feature using a scatterometer.
摘要翻译：本发明提供一种制造半导体器件的方法。制造半导体器件的方法，但不限于，可以包括提供具有子表面特征和表面特征的衬底，以及使用散射仪来确定子表面特征相对于表面特征的位置。

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