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11. 发明申请

US20090227068A1 Method and Apparatus for Packaging Circuit Devices 有权
标题翻译：包装电路器件的方法和装置
公开(公告)号：US20090227068A1
公开(公告)日：2009-09-10
申请号：US12468520
申请日：2009-05-19
申请人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
发明人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
IPC分类号： H01L21/50
CPC分类号： H01L23/04 , B81B2207/07 , B81C1/00095 , B81C1/00301 , H01L23/66 , H01L2223/6622 , H01L2924/0002 , H01L2924/01079 , H01L2924/16153 , H01L2924/00
摘要： A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.
摘要翻译：气密密封的包装件包括密封地结合到晶片或基底（12）上的盖子（14），其中腔室由盖子中的凹槽（16）限定。诸如MEMS器件的电路器件（26）设置在衬底上的腔室内。多个通孔（41-46）设置穿过衬底，并且每个通孔具有促进在衬底的相对侧之间的适当水平的气密密封的结构。通孔提供从组件外部到设置在腔室中的装置的电连通。

12. 发明授权

US06391675B1 Method and apparatus for switching high frequency signals 有权
标题翻译：用于切换高频信号的方法和装置
公开(公告)号：US06391675B1
公开(公告)日：2002-05-21
申请号：US09394997
申请日：1999-09-13
申请人： John C. Ehmke , Charles L. Goldsmith , Zhimin J. Yao , Susan M. Eshelman
发明人： John C. Ehmke , Charles L. Goldsmith , Zhimin J. Yao , Susan M. Eshelman
IPC分类号： H01L2100
CPC分类号： H01P1/127 , H01G5/16 , H01G5/40 , H01H59/0009 , H01H2059/0018
摘要： A switch includes a conductive region, a membrane, and a dielectric region. The dielectric region is formed from a dielectric material and is disposed between the membrane and the conductive region. When a sufficient voltage is applied between the conductive region and the membrane, a capacitive coupling between the membrane and the conductive region is effected. The dielectric material has a resistivity sufficiently low to inhibit charge accumulation in the dielectric region during operation of the switch.
摘要翻译：开关包括导电区域，膜和电介质区域。电介质区域由电介质材料形成，并且设置在膜与导电区域之间。当在导电区域和膜之间施加足够的电压时，实现膜与导电区域之间的电容耦合。电介质材料具有足够低的电阻以在开关的操作期间阻止电介质区域中的电荷累积。

13. 发明授权

US07535093B1 Method and apparatus for packaging circuit devices 有权
标题翻译：封装电路装置的方法和装置
公开(公告)号：US07535093B1
公开(公告)日：2009-05-19
申请号：US10094174
申请日：2002-03-08
申请人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
发明人： Billy D. Ables , John C. Ehmke , Roland W. Gooch
IPC分类号： H01L23/04
CPC分类号： H01L23/04 , B81B2207/07 , B81C1/00095 , B81C1/00301 , H01L23/66 , H01L2223/6622 , H01L2924/0002 , H01L2924/01079 , H01L2924/16153 , H01L2924/00
摘要： A hermetically sealed package includes a lid (14) hermetically bonded to a wafer or substrate (12), with a chamber therebetween defined by a recess (16) in the lid. A circuit device (26) such as MEMS device is provided within the chamber on the substrate. A plurality of vias (41-46) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.
摘要翻译：气密密封的包装件包括密封地结合到晶片或基底（12）上的盖子（14），其中腔室由盖子中的凹槽（16）限定。诸如MEMS器件的电路器件（26）设置在衬底上的腔室内。多个通孔（41-46）设置穿过衬底，并且每个通孔具有促进在衬底的相对侧之间的适当水平的气密密封的结构。通孔提供从组件外部到设置在腔室中的装置的电连通。

14. 发明授权

US06633079B2 Wafer level interconnection 有权
标题翻译：晶圆级互连
公开(公告)号：US06633079B2
公开(公告)日：2003-10-14
申请号：US10241062
申请日：2002-09-10
申请人： James L. Cheever , Charles L. Goldsmith , John C. Ehmke , Billy D. Ables
发明人： James L. Cheever , Charles L. Goldsmith , John C. Ehmke , Billy D. Ables
IPC分类号： H01L2314
CPC分类号： B81B7/0006 , H01L23/04 , H01L25/0657 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H01L2225/06586 , H01L2924/0002 , H01L2924/00
摘要： RF MicroElectroMechanical Systems (MEMS) circuitry (15) on a first high resistivity substrate (17) is combined with circuitry (11) on a second low resistivity substrate (13) by overlapping the first high resistivity substrate (17) and MEMS circuitry (15) with the low resistivity substrate (13) and circuitry (11) with the MEMS circuitry (15) facing the second circuitry (11). A dielectric lid (19) is placed over the MEMS circuitry (15) and between the first substrate (17) and second substrate (13) with an inert gas in a gap (21) over the MEMS circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17) and through the dielectric lid (19) to make electrical connection with the low resistivity substrate (13).
摘要翻译：在第一高电阻率衬底（ 17 ）上的RF微电子机械系统（MEMS）电路（ 15 ）与电路通过重叠第一高电阻率衬底（），在第二低电阻率衬底（ 13 ）上 11 ）和具有低电阻率衬底（ 13 ）的MEMS电路（ 15 ）以及面向第二电路（ 11）的MEMS电路（ 15 ）的电路（ 11 ））。将电介质盖（ 19 ）置于MEMS电路（ 15 ）之间，并在第一衬底（和<第二衬底（ 13 ）与间隙中的惰性气体（ 21 ）通过MEMS电路（ 15 ）。互连导体（ 25,31,35,37,39,41 ）垂直延伸并穿过高电阻率衬底（ 17 ）并通过电介质盖（ 19 ）与低电阻率基板（ 13 ）进行电连接。 / PTEXT>

15. 发明授权

US06512300B2 Water level interconnection 有权
标题翻译：晶圆级互连
公开(公告)号：US06512300B2
公开(公告)日：2003-01-28
申请号：US09756801
申请日：2001-01-10
申请人： James L. Cheever , Charles L. Goldsmith , John C. Ehmke , Billy D. Ables
发明人： James L. Cheever , Charles L. Goldsmith , John C. Ehmke , Billy D. Ables
IPC分类号： H01L2348
CPC分类号： B81B7/0006 , H01L23/04 , H01L25/0657 , H01L2225/06517 , H01L2225/0652 , H01L2225/06572 , H01L2225/06586 , H01L2924/0002 , H01L2924/00
摘要： RF MicroElectroMechanical Systems (MEMs) circuitry(15) on a first high resistivity substrate (17)is combined with circuitry (11) onsecond low-resisitivity substrate (13) by overlapping the first high resisitivity substrate (17)and MEMs circuitry (15) with the low resisitivity substrate(13) and circuitry (11) with the MEMs circuitry (15)facing the second circuitry (11). A dielectric lid (19) is placed over the MEMs circuitry (15)and between the first substrate (17)and second substrate (13)with an inert gas in a gap (21)over the MEMs circuitry (15). Interconnecting conductors (25,31,35,37,39,41) extend perpendicular and through the high resistivity substrate (17)and through the dielectric lid (19) to make electrical connection with the low resisitivity substrate (13).
摘要翻译：第一高电阻率衬底（17）上的RF微电子机械系统（MEM）电路（15）通过与第一高电阻衬底（17）和MEM电路（15）重叠而与第二低电阻衬底（13）上的电路（11）组合，其中低电阻衬底（13）和电路（11）与MEM电路（15）面对第二电路（11）。电介质盖（19）通过MEMs电路（15）上的间隙（21）中的惰性气体放置在MEMs电路（15）上并且在第一衬底（17）和第二衬底（13）之间。互连导体（25,31,35,37,39,41）垂直延伸穿过高电阻率基板（17）并穿过电介质盖（19）以与低电阻基板（13）电连接。

16. 发明授权

US5834775A Integral slot shield for infrared focal plane arrays 失效
标题翻译：用于红外焦平面阵列的积分插槽屏蔽
公开(公告)号：US5834775A
公开(公告)日：1998-11-10
申请号：US768254
申请日：1996-12-17
申请人： Mark R. Skokan , John C. Ehmke , Charles A. Franda , Stephen L. Whicker
发明人： Mark R. Skokan , John C. Ehmke , Charles A. Franda , Stephen L. Whicker
IPC分类号： G01J5/08 , H01L27/14 , G01J5/10
CPC分类号： G01J5/02 , G01J5/022 , G01J5/024 , G01J5/08 , G01J5/0853 , G01J5/046
摘要： A method of fabricating a focal plane array and the array having a integral slot shield which comprises fabricating a focal plane array having a plurality of detector elements. A layer of electrically insulating material having a planar top surface is then formed over the array. A reflective layer is then formed over the layer of electrically insulating material and the electrically insulating layer and reflective layer are etched only in the regions thereof over the detector elements to form slots over the detector elements. An absorbing layer is formed over the reflective layer. The absorbing layer is preferably an infrared-transparent dielectric having an optical thickness of about one quarter wavelength of the light frequency of interest with a metallic flash layer thereover having a thickness of from about 50 to about 60 Angstroms. The infrared dielectric is preferably one of zinc sulfide, zinc selenide, polyethylene and paraxylilene.
摘要翻译：一种制造焦平面阵列的方法，该阵列具有整体槽屏蔽，其包括制造具有多个检测器元件的焦平面阵列。然后在阵列上形成具有平坦顶表面的电绝缘材料层。然后在电绝缘材料层上形成反射层，并且电绝缘层和反射层仅在其检测器元件的区域中被蚀刻，以在检测器元件上方形成槽。在反射层上形成吸收层。吸收层优选为红外透明电介质，其光学厚度为感兴趣的光频的约四分之一波长，金属闪光层的厚度为约50至约60埃。红外线电介质优选为硫化锌，硒化锌，聚乙烯和对二甲苯之一。

17. 发明授权

US5536680A Self-aligned bump bond infrared focal plane array architecture 失效
公开(公告)号：US5536680A
公开(公告)日：1996-07-16
申请号：US437614
申请日：1995-05-08
申请人： John C. Ehmke
发明人： John C. Ehmke
IPC分类号： H01L21/60 , H01L21/68 , H01L27/146 , H01L21/44
CPC分类号： H01L24/32 , H01L21/6835 , H01L24/90 , H01L27/1465 , H01L2221/68354 , H01L2224/13019 , H01L2224/24051 , H01L2224/24998 , H01L2224/81192 , H01L2224/82007 , H01L24/82 , H01L2924/01005 , H01L2924/01006 , H01L2924/01019 , H01L2924/01033 , H01L2924/01042 , H01L2924/0105 , H01L2924/01074 , H01L2924/01079 , H01L2924/14
摘要： A method of making a diode and the diode wherein there is provided a substrate of p-type group II-VI semiconductor material and an electrically conductive material capable of forming an ohmic contact with the substrate is forced into the lattice of the substrate to create an n-type region in the substrate in contact with the material and forming an electrical contact to the p-type region of said substrate. The substrate is preferably HgCdTe and the electrically conductive material is preferably tungsten or tin coated tungsten or tungsten coated with a mercury amalgam. Also a method of making an infrared focal plane array and the array wherein there is provided a semiconductor integrated circuit having electrically conductive pads on a surface thereof, forming bumps of an electrically conductive material on predetermined ones of the pads, providing a substrate of p-type group II-VI semiconductor material, disposing a layer of bonding material over one of the surface of the integrated circuit containing the pads or a surface of the substrate, forcing the bumps into the lattice of the substrate to create an n-type region in the substrate in contact with the material, bonding the substrate to the integrated circuit and forming an electrical connection between the p-type region of the substrate and one of the pads. The process is otherwise the same as the diode fabrication.

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