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171. 发明申请

US20060163631A1 Vertical MOSFET with dual work function materials 失效
标题翻译：具有双功能材料的垂直MOSFET
公开(公告)号：US20060163631A1
公开(公告)日：2006-07-27
申请号：US10622477
申请日：2003-07-18
申请人： Xiangdong Chen , Geng Wang , Yujun Li , Qiqing Ouyang
发明人： Xiangdong Chen , Geng Wang , Yujun Li , Qiqing Ouyang
IPC分类号： H01L29/94
CPC分类号： H01L29/66181 , H01L27/10864
摘要： A vertical pass transistor used in a DRAM cell for maintaining a low total leakage current and providing adequate drive current is described together with a method of fabricating such a device. The transistor gate is engineered in lieu of the channel. The vertical pass transistor for the DRAM cell incorporates two gate materials having different work functions. The gate material near the storage node is n-type doped polysilicon. The gate material near the bit line diffusion is made of silicide or metal having a higher work function than the n-polysilicon. The novel device structure shows several advantages: the channel doping is reduced while maintaining a high Vt and a low sub-threshold leakage current; the carrier mobility improves with the reduced channel doping; the body effect of the device is reduced which improves the write back current; and the sub-threshold swing is reduced because of the low channel doping.
摘要翻译：在DRAM单元中使用的用于保持低总漏电流并提供足够的驱动电流的垂直传输晶体管与制造这种器件的方法一起被描述。晶体管栅极被设计代替通道。用于DRAM单元的垂直传输晶体管包括具有不同功函数的两个栅极材料。存储节点附近的栅极材料为n型掺杂多晶硅。位线扩散附近的栅极材料由具有比n-多晶硅更高的功函数的硅化物或金属制成。该新颖的器件结构显示出几个优点：沟道掺杂减少，同时保持高Vt和低的亚阈值漏电流; 载流子迁移率随着沟道掺杂的降低而提高; 减少了器件的体效，提高了回写电流; 并且由于低通道掺杂，子阈值摆幅减小。

172. 发明授权

US07045873B2 Dynamic threshold voltage MOSFET on SOI 有权
标题翻译： SOI上的动态阈值电压MOSFET
公开(公告)号：US07045873B2
公开(公告)日：2006-05-16
申请号：US10728750
申请日：2003-12-08
申请人： Xiangdong Chen , Dureseti Chidambarrao , Geng Wang
发明人： Xiangdong Chen , Dureseti Chidambarrao , Geng Wang
IPC分类号： H01L29/00
CPC分类号： H01L29/783
摘要： Provision of a body control contact adjacent a transistor and between the transistor and a contact to the substrate or well in which the transistor is formed allows connection and disconnection of the substrate of the transistor to and from a zero (ground) or substantially arbitrary low voltage in accordance with control signals applied to the gate of the transistor to cause the transistor to exhibit a variable threshold which maintains good performance at low supply voltages and reduces power consumption/dissipation which is particularly advantageous in portable electronic devices. Floating body effects (when the transistor substrate in disconnected from a voltage source in the “on” state) are avoided since the substrate is discharged when the transistor is switched to the “off” state. The transistor configuration can be employed with both n-type and p-type transistors which may be in complementary pairs.
摘要翻译：提供与晶体管相邻并且晶体管与形成晶体管的衬底或阱的接触之间的身体控制接触允许晶体管的衬底与零（接地）或基本上任意的低电压的连接和断开根据施加到晶体管的栅极的控制信号，使晶体管呈现可变阈值，其在低电源电压下保持良好的性能，并降低了在便携式电子设备中特别有利的功耗/耗散。避免浮体效应（当晶体管基板与电压源处于“导通”状态断开时），因为当晶体管切换到“关闭”状态时，衬底被放电。晶体管配置可以与可以互补对的n型和p型晶体管一起使用。

173. 发明申请

US20050117241A1 Detection of a defective disk of a hard disk drive 失效
标题翻译：检测硬盘驱动器的故障磁盘
公开(公告)号：US20050117241A1
公开(公告)日：2005-06-02
申请号：US10698866
申请日：2003-10-30
申请人： Geng Wang , Sang Lee
发明人： Geng Wang , Sang Lee
IPC分类号： G11B5/09 , G11B20/18 , G11B27/36
CPC分类号： G11B27/36 , G11B20/1816 , G11B2220/2516
摘要： A method and apparatus for detecting a defective disk for a hard disk drive. The method includes placing a disk into a tester so that a first side of the disk is adjacent to a first head of the tester and a second side of the disk is adjacent to a second head. First data is read from the first side of the disk, and second data is read from the second side of the disk. The disk is then flipped so that the second side is adjacent to the first head and the first side is adjacent to the second head. Third data is read from the first side. Fourth data is read from the second side. A first area between a curve generated from the first data and a curve generated from the third data is calculated. Likewise, a second area is calculated between a curve generated from the second data and a curve generated from the fourth data. An average of the first and second areas is then calculated and used to detect a defective disk.
摘要翻译：一种用于检测用于硬盘驱动器的有缺陷的盘的方法和装置。该方法包括将盘放入测试器中，使得盘的第一侧与测试器的第一头相邻，并且盘的第二侧与第二头相邻。从盘的第一侧读取第一数据，从盘的第二侧读取第二数据。然后将盘翻转，使得第二侧与第一头相邻，并且第一侧与第二头相邻。从第一侧读取第三数据。从第二侧读取第四数据。计算从第一数据生成的曲线与从第三数据生成的曲线之间的第一区域。类似地，在从第二数据产生的曲线和从第四数据生成的曲线之间计算第二区域。然后计算第一和第二区域的平均值，并用于检测有缺陷的盘。

174. 发明申请

US20050052766A1 Method for dynamically measuring suspension in-plane and out-plane thermal drift hard disk drives 失效
标题翻译：动态测量悬架平面内和热平面散热硬盘驱动器的方法
公开(公告)号：US20050052766A1
公开(公告)日：2005-03-10
申请号：US10658565
申请日：2003-09-08
申请人： Geng Wang , Sang Lee
发明人： Geng Wang , Sang Lee
IPC分类号： G11B21/21 , G11B5/02 , G11B5/596 , G11B21/02 , G11B27/36
CPC分类号： G11B27/36 , G11B5/596 , G11B2220/2516
摘要： A method for dynamic in-situ characterization of in-plane and out-plane thermal drift of a hard disk drive head suspension is provided. A first data track is written. Amplitude and amplitude modulation of the write data signal are measured and track center is determined. Data tracks are then written for a selected time period. Amplitude and amplitude modulation of the write data signal is measured and a new track center of a last data track is determined. Any difference between the track center of the first data track and the track center of the last data track represents in-plane drift. The amplitude and amplitude modulation of the two write data signals is compared and any difference between the measured values is proportional to out-plane drift.
摘要翻译：提供了一种用于硬盘驱动器头悬架的面内和外平面热漂移的动态原位表征的方法。写入第一条数据轨道。测量写数据信号的幅度和幅度调制，并确定轨道中心。然后在选定的时间段内写入数据轨道。测量写入数据信号的幅度和幅度调制，并确定最后数据轨道的新的轨道中心。第一数据轨道的轨道中心与最后数据轨道的轨道中心之间的任何差异表示平面内漂移。比较两个写入数据信号的幅度和幅度调制，并且测量值之间的任何差异与外部平面漂移成比例。

175. 发明授权

US09507485B2 Electronic device, displaying method and file saving method 有权
标题翻译：电子设备，显示方法和文件保存方法
公开(公告)号：US09507485B2
公开(公告)日：2016-11-29
申请号：US13824144
申请日：2011-09-27
申请人： Ming Cai , Ran Sun , Geng Wang
发明人： Ming Cai , Ran Sun , Geng Wang
IPC分类号： G09G5/14 , G06F3/0481 , G01C21/36
CPC分类号： G06F3/0481 , G01C21/36 , G06F3/04815
摘要： An electronic device, a displaying method and a file saving method are described. The electronic device is in a first state and has a display area. The displaying method includes obtaining an image; obtaining an information entry; displaying the image in the display area; and displaying a first type information entry from the information entry in a first region of the display area with a first display effect, and displaying a second type information entry from the information entry in a second region of the display area with a second display effect; wherein the first type information entry is different from the second type information entry.
摘要翻译：描述电子设备，显示方法和文件保存方法。电子设备处于第一状态并具有显示区域。显示方法包括获得图像; 获取信息条目; 在显示区域显示图像; 从所述显示区域的第一区域中的所述信息条目中显示第一类型信息条目，并且具有第二显示效果，在所述显示区域的第二区域中从所述信息条目显示第二类型信息条目; 其中所述第一类型信息条目与所述第二类型信息条目不同。

176. 发明授权

US08809444B2 Network copolymer crosslinked emulsions and demulsifying compositions comprising the same 有权
标题翻译：网络共聚物交联乳液和包含其的破乳组合物
公开(公告)号：US08809444B2
公开(公告)日：2014-08-19
申请号：US12646364
申请日：2009-12-23
申请人： Ning Lu , Sigfredo Gonzalez , Ernie M. Silvestre , Geng Wang
发明人： Ning Lu , Sigfredo Gonzalez , Ernie M. Silvestre , Geng Wang
IPC分类号： C08K5/541
CPC分类号： C08F220/26 , A61K8/8152 , A61K2800/54 , A61Q1/02 , A61Q5/12 , C08F220/38 , C08F230/02
摘要： The present invention is directed to a network composition the reaction product of: (i) at least one anionic polymerizable ethylenically unsaturated monomer (I) selected from the group consisting of [CH2═C(R3)C(O)OXa(C2H4O)b(C3H6O)c(C4H8O)d]pP(O)(OY)q(OZ)r where R3═H or alkyl of 1 to about 6 carbon atoms; X=alkyl, aryl, or alkaryl diradical connecting group of 0 to about 9 carbon atoms; a is 0 to about 100; b is 0 to about 100; c is 0 to about 100; d is 0 to about 100; q is 0 to about 2; r is 0 to about 2; p is 1 to about 3 subject to the limitation that p+q+r=3; and Y and Z is H, or metal ion; and CH2═C(R3)C(O)OXa′(C2H4O)b′(C3H6O)c′(C4H8O)d′—SO3—Y) where R3═H or alkyl of from 1 to about 6 carbon atoms; X=alkyl, aryl, or alkaryl diradical connecting group of 0 to about 9 carbon atoms; a′ is 0 to about 100; b′ is 0 to about 100; c′ is 0 to about 100; d′ is 0 to about 100; Y is H, or metal ion; and (ii) one or more additional monomers (II) selected from the group consisting of acrylic acid/acrylate, methacrylic acid/methacrylate, acrylamides, vinyl acetate and styrene, which are copolymerizable with (I); and (iii) a cross-linking agent (III), capable of copolymerizing with (I) and (II).
摘要翻译：本发明涉及一种网络组合物，其反应产物为：（i）至少一种选自[CH 2 = C（R 3）C（O）O X a（C 2 H 4 O）b的阴离子可聚合烯属不饱和单体（I）（C 3 H 6 O）c（C 4 H 8 O）d] pP（O）（OY）q（OZ）r其中R 3 = H或1至约6个碳原子的烷基; X = 0至约9个碳原子的烷基，芳基或烷芳基双基连接基团; a为0〜100; b为0至约100; c为0至约100; d为0至约100; q为0〜2; r为0〜2; p为1至约3，但受限于p + q + r = 3; Y和Z是H或金属离子; （C 3 H 6 O）c'（C 4 H 8 O）d-SO 3-Y）其中R 3 = H或1至约6个碳原子的烷基; X = 0至约9个碳原子的烷基，芳基或烷芳基双基连接基团; a'为0至约100; b'为0至约100; c'为0至约100; d'为0至约100; Y是H或金属离子; 和（ii）可与（I）共聚的一种或多种选自丙烯酸/丙烯酸酯，甲基丙烯酸/甲基丙烯酸酯，丙烯酰胺，乙酸乙烯酯和苯乙烯的另外的单体（II）; 和（iii）能够与（I）和（II）共聚的交联剂（III）。

177. 发明授权

US08273629B2 Through-gate implant for body dopant 失效
标题翻译：用于体内掺杂剂的通孔植入物
公开(公告)号：US08273629B2
公开(公告)日：2012-09-25
申请号：US12701972
申请日：2010-02-08
申请人： Geng Wang , Paul C. Parries
发明人： Geng Wang , Paul C. Parries
IPC分类号： H01L21/336
CPC分类号： H01L21/84 , H01L29/105 , H01L29/66537 , H01L29/6656 , H01L29/66772
摘要： The present invention, provides a semiconductor device including a substrate including a semiconductor layer overlying an insulating layer, wherein a back gate structure is present underlying the insulating layer and a front gate structure on the semiconductor layer; a channel dopant region underlying the front gate structure of the substrate, wherein the channel dopant region has a first concentration present at an interface of the semiconductor layer and the insulating layer and at least a second concentration present at the interface of the front gate structure and the semiconductor layer, wherein the first concentration is greater than the second concentration; and a source region and drain region present in the semiconductor layer of the substrate.
摘要翻译：本发明提供一种半导体器件，其包括：衬底，其包括覆盖绝缘层的半导体层，其中在所述绝缘层下面存在背栅结构，并且在所述半导体层上存在前栅极结构; 在衬底的前栅极结构下面的沟道掺杂剂区域，其中沟道掺杂剂区域具有存在于半导体层和绝缘层的界面处的第一浓度，以及存在于前栅极结构的界面处的至少第二浓度和所述半导体层，其中所述第一浓度大于所述第二浓度; 以及存在于衬底的半导体层中的源极区和漏极区。

178. 发明申请

US20120108050A1 WORK FUNCTION ENGINEERING FOR EDRAM MOSFETS 有权
标题翻译： EDRAM MOSFET工作功能工程
公开(公告)号：US20120108050A1
公开(公告)日：2012-05-03
申请号：US13343850
申请日：2012-01-05
申请人： Xiangdong Chen , Herbert L. Ho , Geng Wang
发明人： Xiangdong Chen , Herbert L. Ho , Geng Wang
IPC分类号： H01L21/28
CPC分类号： H01L27/105 , H01L27/1052 , H01L27/10894 , H01L29/4966 , H01L29/513 , H01L29/517
摘要： Embedded DRAM MOSFETs including an array NFET having a gate stack comprising a high-K dielectric layer upon which is deposited a first metal oxide layer (CD1) then a conductive layer (TiN), and then a polysilicon layer (Poly). A logic PFET having substantially the same gate stack as the array NFET, and a logic NFET having a third gate stack comprising the high-K dielectric layer upon which is deposited the conductive layer (TiN) and then the polysilicon layer (Poly), without the first metal oxide layer (CD1) between the high-K dielectric layer and the conductive layer (TiN). The array NFET may therefore have a higher gate stack work function than the logic NFET, but substantially the same gate stack work function as the logic PFET.
摘要翻译：嵌入式DRAM MOSFET包括阵列NFET，其具有包括高K电介质层的栅极堆叠，在其上沉积第一金属氧化物层（CD1），然后沉积导电层（TiN），然后沉积多晶硅层（Poly）。具有与阵列NFET基本相同的栅极叠层的逻辑PFET，以及具有第三栅极堆叠的逻辑NFET，其包括高K电介质层，在其上沉积导电层（TiN），然后沉积多晶硅层（Poly）高K电介质层与导电层（TiN）之间的第一金属氧化物层（CD1）。因此，阵列NFET可以具有比逻辑NFET更高的栅极堆叠功函数，但是与逻辑PFET基本上相同的栅极堆叠功能。

179. 发明申请

US20110248326A1 STRUCTURE AND METHOD TO INTEGRATE EMBEDDED DRAM WITH FINFET 有权
标题翻译：用FINFET整合嵌入式DRAM的结构和方法
公开(公告)号：US20110248326A1
公开(公告)日：2011-10-13
申请号：US12755487
申请日：2010-04-07
申请人： SIVANANDA KANAKASABAPATHY , Hemanth Jagannathan , Geng Wang
发明人： SIVANANDA KANAKASABAPATHY , Hemanth Jagannathan , Geng Wang
IPC分类号： H01L27/108 , H01L21/28
CPC分类号： H01L27/10826 , H01L21/26586 , H01L21/845 , H01L27/10879 , H01L27/10891 , H01L27/1211
摘要： A transistor includes a first fin structure and at least a second fin structure formed on a substrate. A deep trench area is formed between the first and second fin structures. The deep trench area extends through an insulator layer of the substrate and a semiconductor layer of the substrate. A high-k metal gate is formed within the deep trench area. A polysilicon layer is formed within the deep trench area adjacent to the metal layer. The polysilicon layer and the high-k metal layer are recessed below a top surface of the insulator layer. A poly strap in the deep trench area is formed on top of the high-k metal gate and the polysilicon material. The poly strap is dimensioned to be below a top surface of the first and second fin structures. The first fin structure and the second fin structure are electrically coupled to the poly strap.
摘要翻译：晶体管包括第一鳍结构和形成在衬底上的至少第二鳍结构。在第一和第二翅片结构之间形成深沟槽区域。深沟槽区域延伸穿过衬底的绝缘体层和衬底的半导体层。在深沟槽区域内形成高k金属栅极。在与金属层相邻的深沟槽区域内形成多晶硅层。多晶硅层和高k金属层凹陷在绝缘体层的顶表面下方。深沟槽区域中的多晶带形成在高k金属栅极和多晶硅材料的顶部上。该多晶带的尺寸设计成在第一和第二鳍结构的顶表面下方。第一翅片结构和第二翅片结构电耦合到多晶带。

180. 发明申请

US20110180883A1 METHOD AND STRUCTURE TO IMPROVE BODY EFFECT AND JUNCTION CAPACITANCE 有权
标题翻译：改善身体效能和结电容的方法和结构
公开(公告)号：US20110180883A1
公开(公告)日：2011-07-28
申请号：US12695565
申请日：2010-01-28
申请人： Xiangdong Chen , Geng Wang , Da Zhang
发明人： Xiangdong Chen , Geng Wang , Da Zhang
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/1083 , H01L29/665 , H01L29/66575 , H01L29/78
摘要： A method and structure implant a first-type impurity within a substrate to form a channel region within the substrate adjacent a top surface of the substrate; form a gate stack on the top surface of the substrate above the channel region; and implant a second-type impurity within the substrate to form source and drain regions within the substrate adjacent the top surface. The channel region is positioned between the source and drain regions. The second-type impurity has an opposite polarity with respect to the first-type impurity. The method and structure implant a greater concentration of the first-type impurity, relative to a concentration of the first-type impurity within the channel region, to form a primary body doping region within the substrate below (relative to the top surface) the channel region; and to form secondary body doping regions within the substrate below (relative to the top surface) the source and drain regions.
摘要翻译：一种方法和结构在衬底内注入第一种杂质以在衬底内邻近衬底的顶表面形成沟道区; 在通道区域上方的衬底的顶表面上形成栅极堆叠; 并且在所述衬底内注入第二类型杂质以在所述衬底内邻近所述顶表面形成源区和漏区。沟道区域位于源区和漏区之间。第二种杂质相对于第一种杂质具有相反的极性。所述方法和结构相对于沟道区域内的第一类型杂质的浓度注入更大浓度的第一类型杂质，以在衬底下方（相对于顶表面）在通道内形成主体掺杂区域地区; 并且在源极和漏极区域之下（相对于顶表面）下方的衬底内形成辅助体掺杂区域。

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