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111. 发明授权

US07800934B2 Programming methods to increase window for reverse write 3D cell 有权
标题翻译：编程方法增加反向写入3D单元格的窗口
公开(公告)号：US07800934B2
公开(公告)日：2010-09-21
申请号：US11819077
申请日：2007-06-25
申请人： Tanmay Kumar , S. Brad Herner , Christopher J. Petti
发明人： Tanmay Kumar , S. Brad Herner , Christopher J. Petti
IPC分类号： G11C11/00 , G11C11/36
CPC分类号： G11C13/00 , G11C11/5692 , G11C13/0069 , G11C17/14 , G11C17/16 , G11C17/165 , G11C2013/009 , G11C2213/33 , H01L27/101
摘要： A method of operating a nonvolatile memory cell includes providing the nonvolatile memory cell comprising a diode which is fabricated in a first resistivity, unprogrammed state, and applying a forward bias to the diode having a magnitude greater than a minimum voltage required for programming the diode to switch the diode to a second resistivity, programmed state. The second resistivity state is lower than the first resistivity state.
摘要翻译：一种操作非易失性存储单元的方法包括提供非易失性存储单元，该非易失性存储单元包括以第一电阻率，未编程状态制造的二极管，以及将正向偏压施加到具有大于将二极管编程所需的最小电压的二极管的幅度将二极管切换到第二电阻率，编程状态。第二电阻率状态低于第一电阻率状态。

112. 发明授权

US07790534B2 Method to form low-defect polycrystalline semiconductor material for use in a transistor 有权
标题翻译：形成用于晶体管的低缺陷多晶半导体材料的方法
公开(公告)号：US07790534B2
公开(公告)日：2010-09-07
申请号：US11763671
申请日：2007-06-15
申请人： S. Brad Herner , Christopher J. Petti
发明人： S. Brad Herner , Christopher J. Petti
IPC分类号： H01L21/00 , H01L21/84
CPC分类号： H01L27/24 , H01L21/8221 , H01L27/0688 , H01L27/115 , H01L27/11521 , H01L27/11568 , H01L27/11578 , H01L27/12 , H01L27/1277 , H01L29/6675 , H01L29/66825 , H01L29/66833 , H01L29/7881 , H01L29/792
摘要： A method is described for forming a thin film transistor having its current-switching region in polycrystalline semiconductor material which has been crystallized in contact with titanium silicide, titanium silicide-germanide, or titanium germanide. The titanium silicide, titanium silicide-germanide, or titanium germanide is formed having feature size no more than 0.25 micron in the smallest dimension. The small feature size tends to inhibit the phase transformation from C49 to C54 phase titanium silicide. The C49 phase of titanium silicide has a very close lattice match to silicon, and thus provides a crystallization template for the silicon as it forms, allowing formation of large-grain, low-defect silicon. Titanium does not tend to migrate through the silicon during crystallization, limiting the danger of metal contamination. In preferred embodiments, the transistors thus formed may be, for example, field-effect transistors or bipolar junction transistors.
摘要翻译：描述了一种用于形成其多晶半导体材料中具有电流切换区域的薄膜晶体管的方法，其已经与硅化钛，硅化钛 - 锗化锗或锗化锗接触而结晶化。在最小尺寸上形成特征尺寸不超过0.25微米的硅化钛，硅化钛 - 锗化锗或锗锗。小特征尺寸倾向于抑制从C49到C54相钛硅化物的相变。硅化钛的C49相具有与硅非常接近的晶格匹配，因此在形成硅时提供了硅的结晶模板，从而形成大晶粒，低缺陷硅。在结晶过程中，钛不会通过硅迁移，限制了金属污染的危险。在优选实施例中，如此形成的晶体管可以是例如场效应晶体管或双极结型晶体管。

113. 发明申请

US20100184248A1 Creation and Translation of Low-Relieff Texture for a Photovoltaic Cell 失效
标题翻译：光伏电池Low-Relieff纹理的创建和翻译
公开(公告)号：US20100184248A1
公开(公告)日：2010-07-22
申请号：US12750635
申请日：2010-03-30
申请人： Mohamed M. Hilali , S. Brad Herner
发明人： Mohamed M. Hilali , S. Brad Herner
IPC分类号： H01L31/0236 , H01L31/18
CPC分类号： H01L31/0236 , Y02E10/50
摘要： Low-relief texture can be created by applying and firing frit paste on a silicon surface. Where frit contacts the surface at high temperature, it etches silicon, dissolving silicon in the softened glass frit. The result is a series of small, randomly located pits, which produce a near-Lambertian surface, suitable for use in a photovoltaic cell. This texturing method consumes little silicon, and is advantageously used in a photovoltaic cell in which a thin silicon lamina comprises the base region of the cell. When the lamina is formed by implanting ions in a donor wafer to form a cleave plane and cleaving the lamina from the donor wafer at the cleave plane, the ion implantation step will serve to translate texture formed at a first surface to the cleave plane, and thus to the second, opposing surface following cleaving. Low-relief texture formed by other methods can be translated from the first surface to the second surface in this way as well.
摘要翻译：可以通过在硅表面上施加和焙烧玻璃料膏来产生低浮雕纹理。当玻璃料在高温下接触表面时，会腐蚀硅，将硅溶解在软化玻璃料中。结果是一系列小的，随机位置的凹坑，其产生近Lambertian表面，适用于光伏电池。这种纹理化方法消耗很少的硅，并且有利地用于其中薄硅层包括电池的基极区域的光伏电池中。当通过在施主晶片中注入离子以形成解理平面并在分裂面处从施主晶片切割层而形成层板时，离子注入步骤将用于将形成在第一表面处的纹理平移至解理面，以及从而在切割之后到达第二相对表面。通过其他方法形成的低浮雕纹理也可以以这种方式从第一表面转换到第二表面。

114. 发明申请

US20100177549A1 Silicide-silicon oxide-semiconductor antifuse device and method of making 有权
公开(公告)号：US20100177549A1
公开(公告)日：2010-07-15
申请号：US12656016
申请日：2010-01-13
申请人： S. Brad Herner
发明人： S. Brad Herner
IPC分类号： G11C17/14 , H01L21/328 , H01L21/326
CPC分类号： H01L27/101 , H01L23/5252 , H01L27/0688 , H01L2924/0002 , H01L2924/00
摘要： An antifuse contains a first silicide layer, a grown silicon oxide antifuse layer on a first surface of the first silicide layer, and a first semiconductor layer having a first surface in contact with the antifuse layer.

115. 发明申请

US20100136751A1 METHOD FOR MAKING A P-I-N DIODE CRYSTALLIZED ADJACENT TO A SILICIDE IN SERIES WITH A DIELECTRIC ANTIFUSE 有权
标题翻译：在具有电介质抗体的系列中制备P-I-N二极管结晶到硅氧烷的方法
公开(公告)号：US20100136751A1
公开(公告)日：2010-06-03
申请号：US12698253
申请日：2010-02-02
申请人： S. Brad Herner
发明人： S. Brad Herner
IPC分类号： H01L21/77 , H01L21/768
CPC分类号： H01L23/5252 , G11C13/0069 , G11C17/16 , G11C2013/009 , G11C2213/33 , H01L27/1021 , H01L2924/0002 , H01L2924/3011 , H01L2924/00
摘要： A method is described for monolithically forming a first memory level above a substrate, the method including: (a) forming a plurality of first substantially parallel, substantially coplanar conductors above the substrate, the first conductors extending in a first direction; (b) forming a plurality of vertically oriented contiguous p-i-n diodes above the first conductors, the contiguous p-in diode comprising semiconductor material crystallized in contact with a silicide, silicide-germanide, or germanide layer; (c) forming a plurality of second substantially parallel, substantially coplanar conductors, the second conductors above the contiguous p-i-n diodes, the second conductors extending in a second direction different from the first direction, each contiguous p-i-n diode vertically disposed between one of the first conductors and one of the second conductors; (d) and forming a plurality of dielectric rupture antifuses, each dielectric rupture antifuse disposed between one of the contiguous p-i-n diodes and one of the first conductors or between one of the contiguous p-i-n diodes and one of the second conductors, wherein the dielectric rupture antifuses comprise dielectric material, the dielectric material having a dielectric constant greater than about 8. Other aspects are provided.
摘要翻译：描述了一种用于在衬底上单层形成第一存储器电平的方法，所述方法包括：（a）在衬底上方形成多个第一基本平行的基本上共面的导体，所述第一导体沿第一方向延伸; （b）在所述第一导体上方形成多个垂直取向的连续p-i-n二极管，所述连续p-in二极管包括与硅化物，硅化物 - 锗化物或锗化锗层接触结晶的半导体材料; （c）形成多个第二基本上平行的基本上共面的导体，所述第二导体位于所述相邻引脚二极管之上，所述第二导体沿与第一方向不同的第二方向延伸，每个相邻的引脚二极管垂直地设置在所述第一导体和第二导体之一; （d）并且形成多个介电破裂反熔丝，每个介质断裂反熔丝设置在一个连续的pin二极管和一个第一导体之间，或者在一个连续的pin二极管和一个第二导体之间，其中介质断裂反熔丝包括电介质材料，介电材料的介电常数大于约8.其它方面。

116. 发明申请

US20100110752A1 Method of making a diode read/write memory cell in a programmed state 有权
标题翻译：使二极管读/写存储单元处于编程状态的方法
公开(公告)号：US20100110752A1
公开(公告)日：2010-05-06
申请号：US12588088
申请日：2009-10-02
申请人： Tanmay Kumar , S. Brad Herner
发明人： Tanmay Kumar , S. Brad Herner
IPC分类号： G11C17/06 , H01L21/04 , H01L21/02
CPC分类号： G11C13/0069 , G11C11/5692 , G11C17/14 , G11C17/165 , G11C17/18 , G11C2013/0073 , H01L27/101 , H01L27/1021 , H01L29/868
摘要： A method of making a nonvolatile memory device includes fabricating a diode in a low resistivity, programmed state without an electrical programming step. The memory device includes at least one memory cell. The memory cell is constituted by the diode and electrically conductive electrodes contacting the diode.
摘要翻译：制造非易失性存储器件的方法包括在没有电气编程步骤的情况下制造低电阻率编程状态的二极管。存储器件包括至少一个存储单元。存储单元由二极管和与二极管接触的导电电极构成。

117. 发明申请

US20100032010A1 METHOD TO MITIGATE SHUNT FORMATION IN A PHOTOVOLTAIC CELL COMPRISING A THIN LAMINA 审中-公开
标题翻译：减轻包含薄层玻璃的光电池的分裂形成的方法
公开(公告)号：US20100032010A1
公开(公告)日：2010-02-11
申请号：US12189156
申请日：2008-08-10
申请人： S. Brad Herner , Christopher J. Petti
发明人： S. Brad Herner , Christopher J. Petti
IPC分类号： H01L31/00
CPC分类号： H01L31/0392 , H01L31/0475 , H01L31/0508 , H01L31/068 , H01L31/1804 , H01L31/1896 , Y02E10/547 , Y02P70/521
摘要： A photovoltaic cell can be formed from a thin semiconductor lamina cleaved from a substantially crystalline wafer. Shunts may inadvertently be formed through such a lamina, compromising device performance. By physically severing the lamina into a plurality of segments, the segments of the lamina preferably electrically connected in series, loss of efficiency due to shunt formation may be substantially reduced. In some embodiments, adjacent laminae are connected in series into strings, and the strings are connected in parallel to compensate for the reduction in current caused by severing the lamina into segments.
摘要翻译：光伏电池可以由从基本上晶体的晶片切割的薄的半导体层形成。分流器可能无意中通过这样的层板形成，损害了设备性能。通过将层间物理切割成多个段，优选层叠电连接的层片段，可能显着减少由于分流形成而导致的效率损失。在一些实施例中，相邻薄片串联连接成串，并且串并联连接以补偿由层切割成片段而导致的电流减少。

118. 发明申请

US20100009488A1 METHOD TO FORM A PHOTOVOLTAIC CELL COMPRISING A THIN LAMINA 有权
标题翻译：形成包含薄层薄膜的光电池的方法
公开(公告)号：US20100009488A1
公开(公告)日：2010-01-14
申请号：US12499294
申请日：2009-07-08
申请人： Srinivasan Sivaram , Aditya Agarwal , S. Brad Herner , Christopher J. Petti
发明人： Srinivasan Sivaram , Aditya Agarwal , S. Brad Herner , Christopher J. Petti
IPC分类号： H01L31/18 , H01L21/30
CPC分类号： H01L31/022425 , H01L31/0682 , H01L31/0747 , H01L31/1804 , H01L31/1892 , Y02E10/547 , Y02P70/521
摘要： A very thin photovoltaic cell is formed by implanting gas ions below the surface of a donor body such as a semiconductor wafer. Ion implantation defines a cleave plane, and a subsequent step exfoliates a thin lamina from the wafer at the cleave plane. A photovoltaic cell, or all or a portion of the base or emitter of a photovoltaic cell, is formed within the lamina. In preferred embodiments, the wafer is affixed to a receiver before the cleaving step. Electrical contact can be formed to both surfaces of the lamina, or to one surface only.
摘要翻译：通过在诸如半导体晶片的施主体的表面下方注入气体离子形成非常薄的光伏电池。离子注入限定了解理面，随后的步骤在切割平面处从晶片剥离薄层。光伏电池，或光伏电池的基极或发射极的全部或一部分形成在层内。在优选实施例中，在切割步骤之前将晶片固定到接收器。电接触可以形成在层的两个表面上，或仅形成在一个表面上。

119. 发明申请

US20090268508A1 Reverse leakage reduction and vertical height shrinking of diode with halo doping 有权
标题翻译：具有晕圈掺杂的二极管的反向泄漏减小和垂直高度收缩
公开(公告)号：US20090268508A1
公开(公告)日：2009-10-29
申请号：US12149217
申请日：2008-04-29
申请人： Xiying Chen , Mark H. Clark , S. Brad Herner , Tanmay Kumar
发明人： Xiying Chen , Mark H. Clark , S. Brad Herner , Tanmay Kumar
IPC分类号： G11C11/34 , H01L21/34 , G11C11/00 , H01L29/868
CPC分类号： H01L29/868 , H01L29/1606 , H01L29/8615
摘要： One embodiment of the invention provides a semiconductor diode device including a first conductivity type region, a second conductivity type region, where the second conductivity type is different from the first conductivity type, an intrinsic region located between the first conductivity type region and the second conductivity type region; a first halo region of the first conductivity type located between the second conductivity type region and the intrinsic region, and optionally a second halo region of the second conductivity type located between the first conductivity type region and the intrinsic region.
摘要翻译：本发明的一个实施例提供一种半导体二极管器件，其包括第一导电类型区域和第二导电类型区域，其中第二导电类型不同于第一导电类型，位于第一导电类型区域和第二导电类型之间的本征区域类型区域位于第二导电类型区域和本征区域之间的第一导电类型的第一晕区，以及任选地位于第一导电类型区域和本征区域之间的第二导电类型的第二晕区域。

120. 发明申请

US20090261343A1 HIGH-DENSITY NONVOLATILE MEMORY AND METHODS OF MAKING THE SAME 有权
标题翻译：高密度非易失性存储器及其制造方法
公开(公告)号：US20090261343A1
公开(公告)日：2009-10-22
申请号：US12477216
申请日：2009-06-03
申请人： S. Brad Herner , Maitreyee Mahajani
发明人： S. Brad Herner , Maitreyee Mahajani
IPC分类号： H01L29/04 , H01L21/20
CPC分类号： G11C5/02 , H01L21/8238 , H01L23/48 , H01L27/1021 , H01L27/148 , H01L29/94 , H01L2924/0002 , H01L2924/00
摘要： Nonvolatile memory cells and methods of forming the same are provided, the methods including forming a first conductor at a first height above a substrate; forming a first pillar-shaped semiconductor element above the first conductor, wherein the first pillar-shaped semiconductor element comprises a first heavily doped layer of a first conductivity type, a second lightly doped layer above and in contact with the first heavily doped layer, and a third heavily doped layer of a second conductivity type above and in contact with the second lightly doped layer, the second conductivity type opposite the first conductivity type; forming a first dielectric antifuse above the third heavily doped layer of the first pillar-shaped semiconductor element; and forming a second conductor above the first dielectric antifuse.
摘要翻译：提供了非易失存储器单元及其形成方法，所述方法包括在衬底上方的第一高度处形成第一导体; 在所述第一导体上形成第一柱状半导体元件，其中所述第一柱状半导体元件包括第一导电类型的第一重掺杂层，在所述第一重掺杂层上方并与其接触的第二轻掺杂层，以及第二导电类型的第三重掺杂层在第二轻掺杂层上方并与第二轻掺杂层接触，第二导电类型与第一导电类型相反; 在所述第一柱状半导体元件的所述第三重掺杂层的上方形成第一介电反熔丝; 以及在所述第一介电反熔丝之上形成第二导体。

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