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    • 101. 发明授权
    • Ferroelectric nonvolatile transistor
    • 铁电非易失性晶体管
    • US06462366B1
    • 2002-10-08
    • US09481674
    • 2000-01-12
    • Sheng Teng HsuJer-shen MaaFengyan ZhangTingkai Li
    • Sheng Teng HsuJer-shen MaaFengyan ZhangTingkai Li
    • H01L2976
    • H01L29/6684H01L29/78391
    • A method of fabricating a ferroelectric memory transistor using a lithographic process having an alignment tolerance of &dgr;, includes preparing a silicon substrate for construction of a ferroelectric gate unit; implanting boron ions to form a p-well in the substrate; isolating plural device areas on the substrate; forming a FE gate stack surround structure; etching the FE gate stack surround structure to form an opening having a width of L1 to expose the substrate in a gate region; depositing oxide to a thickness of between about 10 nm to 40 nm over the exposed substrate; forming a FE gate stack over the gate region, wherein the FE gate stack has a width of L2, wherein L2≧L1+2&dgr;; depositing a first insulating layer over the structure; implanting arsenic or phosphorous ions to form a source region and a drain region; annealing the structure; depositing a second insulating layer; and metallizing the structure. A ferroelectric memory transistor includes a silicon substrate having a p-well formed therein; a gate region, a source region and a drain region disposed along the upper surface of said substrate; a FE gate stack surround structure having an opening having a width of L1 located about said gate region; a FE gate stack formed in said FE gate stack surround structure, wherein said FE gate stack has a width of L2, wherein L2≧L1+2&dgr;, wherein &dgr; is the alignment tolerance of the lithographic process.
    • 使用具有三角形对准公差的光刻工艺制造铁电存储晶体管的方法包括制备用于构造铁电栅极单元的硅衬底; 注入硼离子以在衬底中形成p阱; 隔离基板上的多个器件区域; 形成一个FE门堆栈环绕结构; 蚀刻FE栅堆叠环绕结构以形成宽度为L1的开口,以在栅极区域中露出基板; 在暴露的衬底上沉积氧化物至约10nm至40nm的厚度; 在所述栅极区域上形成FE栅极堆叠,其中所述FE栅极堆叠具有L2的宽度,其中L2> = L1 + 2delta; 在所述结构上沉积第一绝缘层; 注入砷或磷离子以形成源区和漏区; 退火结构; 沉积第二绝缘层; 并且对所述结构进行金属化。铁电存储晶体管包括其中形成有p阱的硅衬底; 栅极区域,源极区域和漏极区域,沿着所述衬底的上表面设置; 具有开口的FE栅叠层环绕结构,所述开口具有围绕所述栅区的L1的宽度; 形成在所述FE栅极堆叠环绕结构中的FE栅极堆叠,其中所述FE栅极堆叠具有L2的宽度,其中L2> = L1 + 2delta,其中Δ是光刻工艺的对准公差。
    • 104. 发明授权
    • MOCVD of tungsten nitride thin films using W(CO)6 and NH3 for copper barrier applications
    • 使用W(CO)6和NH3作为铜屏障应用的氮化钨薄膜的MOCVD
    • US07094691B2
    • 2006-08-22
    • US10410029
    • 2003-04-09
    • Wei PanRobert BarrowcliffDavid R. EvansSheng Teng Hsu
    • Wei PanRobert BarrowcliffDavid R. EvansSheng Teng Hsu
    • H01L21/44
    • H01L21/76841C23C16/34
    • A method of forming a tungsten nitride thin film in an integrated circuit includes preparing a silicon substrate on a silicon wafer and placing the silicon wafer in a heatable chuck in a CVD vacuum chamber; placing a known quantity of a tungsten source in a variable-temperature bubbler to provide a gaseous tungsten source; setting the variable-temperature bubbler to a predetermined temperature; passing a carrier gas through the variable-temperature bubbler and carrying the gaseous tungsten source with the carrier gas into the CVD vacuum chamber; introducing a nitrogen-containing reactant gas into the CVD vacuum chamber; reacting the gaseous tungsten source and the nitrogen-containing reactant gas above the surface of the silicon wafer in a deposition process to deposit a WxNy thin film on the surface of the silicon wafer; and completing the integrated circuit containing the WxNy thin film.
    • 在集成电路中形成氮化钨薄膜的方法包括在硅晶片上制备硅衬底,并将硅晶片放置在CVD真空室中的可加热卡盘中; 将已知量的钨源放置在可变温度起泡器中以提供气态钨源; 将可变温度起泡器设定到预定温度; 使载气通过可变温度起泡器并将载气的气态钨源运送到CVD真空室中; 将含氮反应气体引入CVD真空室中; 在沉积过程中使气态钨源和硅晶片表面上方的含氮反应物气体反应,以沉积W 1 / N 2 N 2 O 3 硅晶片; 并完成包含W< N> N> Y<<<<薄膜的集成电路。
    • 105. 发明授权
    • Method of synthesis of hafnium nitrate for HfO2 thin film deposition via ALCVD process
    • 通过ALCVD法合成HfO2薄膜沉积硝酸铪的方法
    • US06899858B2
    • 2005-05-31
    • US10350641
    • 2003-01-23
    • Wei-Wei ZhuangDavid R. EvansSheng Teng Hsu
    • Wei-Wei ZhuangDavid R. EvansSheng Teng Hsu
    • C01G27/00C01G27/02C23C16/40H01L21/316C01B21/48
    • C01G27/00C01G27/02
    • A method of preparing a hafnium nitrate thin film includes placing phosphorus pentoxide in a first vessel; connecting the first vessel to a second vessel containing hafnium tetrachloride; cooling the second vessel with liquid nitrogen; dropping fuming nitric acid into the first vessel producing N2O5 gas; allowing the N2O5 gas to enter the second vessel; heating the first vessel until the reaction is substantially complete; disconnecting the two vessels; removing the second vessel from the liquid nitrogen bath; heating the second vessel; refluxing the contents of the second vessel; drying the compound in the second vessel by dynamic pumping; purifying the compound in the second vessel by sublimation to form Hf(NO3)4, and heating the Hf(NO3)4 to produce HfO2 for use in an ALCVD process.
    • 制备硝酸铪薄膜的方法包括将五氧化二磷放置在第一容器中; 将第一容器连接到含有四氯化铪的第二容器; 用液氮冷却第二个容器; 将发烟硝酸滴入产生N 2 O 5气体的第一容器中; 允许N 2 O 5气体进入第二容器; 加热第一个容器直到反应基本完成; 断开两艘船舶; 从液氮浴中除去第二容器; 加热第二艘船; 回流第二容器的内容物; 通过动态泵送干燥第二容器中的化合物; 通过升华纯化第二容器中的化合物以形成Hf(NO 3 N 3)4,并加热Hf(NO 3 N 3)3 4生产用于ALCVD工艺的HfO 2 2。
    • 106. 发明授权
    • System of selectively cleaning copper substrate surfaces, in-situ, to remove copper oxides
    • 选择性地清洗铜基板表面的系统,原位去除铜氧化物
    • US06281589B1
    • 2001-08-28
    • US09270901
    • 1999-03-15
    • Tue NguyenLawrence J. CharneskiDavid R. EvansSheng Teng Hsu
    • Tue NguyenLawrence J. CharneskiDavid R. EvansSheng Teng Hsu
    • H01L21302
    • C23G5/00H01L21/02063H01L21/02068H01L21/31111H01L21/31138H01L21/32134H01L21/76838
    • A system and method of selectively etching copper surfaces free of copper oxides in preparation for the deposition of an interconnecting metallic material is provided. The method removes metal oxides with &bgr;-diketones, such as Hhfac. The Hhfac is delivered into the system in vapor form, and reacts almost exclusively to copper oxides. The by-products of the cleaning process are likewise volatile for removal from the system with a vacuum pressure. Since the process is easily adaptable to most IC process systems, it can be conducted in an oxygen-free environment, without the removal of the IC from the process chamber. The in-situ cleaning process permits a minimum amount of copper oxide to reform before the deposition of the overlying interconnection metal. In this manner, a highly conductive electrical interconnection between the copper surface and the interconnecting metal material is formed. An IC having a metal interconnection, in which the underlying copper layer is cleaned of copper oxides, in-situ with Hhfac vapor, is also provided.
    • 提供了一种选择性地蚀刻不含铜氧化物的铜表面以准备沉积互连金属材料的系统和方法。 该方法用β-二酮除去金属氧化物,如Hhfac。 Hhfac以蒸气形式输送到系统中,几乎完全与铜氧化物反应。 清洁过程的副产物同样是挥发性的,用于在真空压力下从系统中除去。 由于该方法很容易适用于大多数IC工艺系统,所以它可以在无氧环境中进行,而不会从处理室中移除IC。 在沉积互连金属之前,原位清洁工艺允许最小量的氧化铜重整。 以这种方式,形成铜表面和互连金属材料之间的高导电性电互连。 还提供了具有金属互连的IC,其中下面的铜层用Hhfac蒸气原位清除了铜氧化物。
    • 107. 发明授权
    • Stress-loaded film and method for same
    • 应力负荷膜及其方法
    • US06184157B2
    • 2001-02-06
    • US09088456
    • 1998-06-01
    • Sheng Teng HsuHongning YangDavid R. EvansTue NguyenYanjun Ma
    • Sheng Teng HsuHongning YangDavid R. EvansTue NguyenYanjun Ma
    • B05D306
    • C23C14/50C23C14/06C23C14/22C23C16/30C23C16/44C23C16/4582
    • A method has been provided to counteract the inherent tension in a deposited film. A wafer substrate is fixed to a wafer chuck having a curved surface. When the chuck surface is convex, a tensile stress is implanted in a deposited film. Upon release from the chuck, the deposited film develops a compressive stress. When the chuck surface is concave, a compressive stress is implanted in the deposited film. Upon release from the chuck, the deposited film develops a tensile stress. Loading a film with a compressive stress is helpful in making films having an inherently tensile stress become thermal stable. Stress loading is also used to improve adhesion between films, and to prevent warping of a film during annealing. A product-by-process using the above-described method is also provided.
    • 已经提供了一种抵消沉积膜中的固有张力的方法。 将晶片基板固定到具有弯曲表面的晶片卡盘。 当卡盘表面凸出时,在沉积膜中注入拉伸应力。 当从卡盘释放时,沉积的膜产生压缩应力。 当卡盘表面凹陷时,在沉积膜中注入压应力。 当从卡盘释放时,沉积的膜产生拉伸应力。 加载具有压应力的薄膜有助于使具有固有拉伸应力的薄膜变得热稳定。 应力负荷也用于提高膜之间的粘附性,并且防止退火期间膜的翘曲。 还提供了使用上述方法的逐个方法。
    • 109. 发明授权
    • Method of making self-aligned shallow trench isolation
    • 自对准浅沟槽隔离方法
    • US06627510B1
    • 2003-09-30
    • US10112014
    • 2002-03-29
    • David R. EvansSheng Teng HsuBruce D. UlrichDouglas J. TweetLisa H. Stecker
    • David R. EvansSheng Teng HsuBruce D. UlrichDouglas J. TweetLisa H. Stecker
    • H01L21762
    • H01L21/28194H01L21/76224H01L21/823481H01L29/517H01L29/518Y10S438/975
    • A modified STI process is provided comprising forming a first polysilicon layer over a substrate. Forming a trench through the first polysilicon layer and into the substrate, and filling the trench with an oxide layer. Depositing a second polysilicon layer over the oxide, such that the bottom of the second polysilicon layer within the trench is above the bottom of the first polysilicon layer, and the top of the second polysilicon layer within the trench is below the top of the first polysilicon layer. The resulting structure may then be planarized using a CMP process. An alignment key may be formed by selectively etching the oxide layer. A third polysilicon layer may then be deposited and patterned using photoresist to form a gate structure. During patterning, exposed second polysilicon layer is etched. An etch stop is detected at the completion of removal of the second polysilicon layer. A thin layer of the first polysilicon layer remains, to be carefully removed using a subsequent selective etch process.
    • 提供了一种改进的STI工艺,包括在衬底上形成第一多晶硅层。 通过第一多晶硅层形成沟槽并进入衬底,并用氧化物层填充沟槽。 在氧化物上沉积第二多晶硅层,使得沟槽内的第二多晶硅层的底部高于第一多晶硅层的底部,并且沟槽内的第二多晶硅层的顶部低于第一多晶硅的顶部 层。 然后可以使用CMP工艺将得到的结构平坦化。 可以通过选择性地蚀刻氧化物层来形成对准键。 然后可以使用光致抗蚀剂沉积和图案化第三多晶硅层以形成栅极结构。 在图案化期间,蚀刻暴露的第二多晶硅层。 在完成去除第二多晶硅层时检测到蚀刻停止。 保留第一多晶硅层的薄层,使用随后的选择性蚀刻工艺小心地去除。