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91. 发明授权

US07884346B2 Nonvolatile memory element and manufacturing method thereof 有权
标题翻译：非易失性存储元件及其制造方法
公开(公告)号：US07884346B2
公开(公告)日：2011-02-08
申请号：US12295500
申请日：2007-03-27
申请人： Takumi Mikawa , Takeshi Takagi
发明人： Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L47/00 , G11C11/00
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/124 , H01L45/146 , H01L45/1625 , H01L45/1691
摘要： A nonvolatile memory element comprising: a first electrode 2; a second electrode 6 formed above the first electrode 2; a variable resistance film 4 formed between the first electrode 2 and the second electrode 6, a resistance value of the variable resistance film 4 being increased or decreased by an electric pulse applied between the first and second electrodes 2, 6; and an interlayer dielectric film 3 provided between the first and second electrodes 2, 6, wherein the interlayer dielectric film 3 is provided with an opening extending from a surface thereof to the first electrode 2; the variable resistance film 4 is formed at an inner wall face of the opening; and an interior region of the opening which is defined by the variable resistance film 4 is filled with an embedded insulating film 5.
摘要翻译：一种非易失性存储元件，包括：第一电极2; 形成在第一电极2上方的第二电极6; 形成在第一电极2和第二电极6之间的可变电阻膜4，通过施加在第一和第二电极2,6之间的电脉冲，可变电阻膜4的电阻值增加或减小; 以及设置在第一和第二电极2,6之间的层间绝缘膜3，其中层间绝缘膜3设置有从其表面延伸到第一电极2的开口; 可变电阻膜4形成在开口的内壁面上; 并且由可变电阻膜4限定的开口的内部区域填充有嵌入绝缘膜5。

92. 发明申请

US20100283026A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100283026A1
公开(公告)日：2010-11-11
申请号：US12810667
申请日：2008-12-26
申请人： Takumi Mikawa , Yoshio Kawashima , Ryoko Miyanaga
发明人： Takumi Mikawa , Yoshio Kawashima , Ryoko Miyanaga
IPC分类号： H01L27/115 , H01L45/00 , H01L21/70
CPC分类号： H01L27/1021 , H01L27/2409 , H01L27/2418 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1633
摘要： A first wire layer (19) including first memory wires (12) is connected to a second wire layer (20) including second memory wires (17) via first contacts (21) penetrating a first interlayer insulating layer (13). The first wire layer (13) is connected to and led out to upper wires (22) via second contacts (26) connected to the second wire layer (20) and penetrating the second interlayer insulating layer (18). The first contacts (21) penetrate semiconductor layer (17b) or insulator layer (17c) of the second wire layer (20).
摘要翻译：包括第一存储器线（12）的第一布线层（19）通过穿过第一层间绝缘层（13）的第一触点（21）连接到包括第二存储器布线（17）的第二布线层（20）。第一导线层（13）经由连接到第二导线层（20）并穿过第二层间绝缘层（18）的第二触点（26）连接并引出到上导线（22）。第一触点（21）穿透第二导线层（20）的半导体层（17b）或绝缘体层（17c）。

93. 发明申请

US20100237313A1 NONVOLATILE SEMICONDUCTOR MEMORY DEVICE AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器件及其制造方法
公开(公告)号：US20100237313A1
公开(公告)日：2010-09-23
申请号：US12738778
申请日：2008-10-22
申请人： Takumi Mikawa , Yoshio Kawashima , Ryoko Miyanaga
发明人： Takumi Mikawa , Yoshio Kawashima , Ryoko Miyanaga
IPC分类号： H01L45/00 , H01L21/20
CPC分类号： H01L27/24 , H01L27/1021
摘要： A nonvolatile semiconductor memory device of the present invention includes a substrate (1), first wires (2), memory cells each including a resistance variable element (5) and a portion of a diode element (6), second wires (11) which respectively cross the first wires (2) to be perpendicular to the first wires (2) and each of which contains a remaining portion of the diode element (6), and upper wires (13) formed via an interlayer insulating layer (12), respectively, and the first wires (2) are connected to the upper wires (13) via first contacts (14), respectively, and the second wires (11) are connected to the upper wires (13) via second contacts (15), respectively.
摘要翻译：本发明的非易失性半导体存储器件包括基板（1），第一布线（2），各自包括电阻可变元件（5）和二极管元件（6）的一部分的存储单元，第二布线（11）分别与第一布线（2）垂直的第一布线（2），并且每个布线包含二极管元件（6）的剩余部分，以及经由层间绝缘层（12）形成的上部布线（13）并且第一导线（2）分别经由第一触头（14）连接到上导线（13），并且第二导线（11）经由第二触点（15）连接到上导线（13）分别。

94. 发明授权

US07692178B2 Nonvolatile memory element, nonvolatile memory apparatus, and method of manufacture thereof 有权
标题翻译：非易失性存储元件，非易失性存储装置及其制造方法
公开(公告)号：US07692178B2
公开(公告)日：2010-04-06
申请号：US12281034
申请日：2007-03-06
申请人： Yoshio Kawashima , Takeshi Takagi , Takumi Mikawa , Zhiqiang Wei
发明人： Yoshio Kawashima , Takeshi Takagi , Takumi Mikawa , Zhiqiang Wei
IPC分类号： H01L45/00
CPC分类号： H01L27/101 , H01L27/2409 , H01L27/2463 , H01L27/2472 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1658 , H01L45/1675
摘要： A lower electrode layer 2, an upper electrode layer 4 formed above the lower electrode layer 2, and a metal oxide thin film layer 3 formed between the lower electrode layer 2 and the upper electrode layer 4 are provided. The metal oxide thin film layer 3 includes a first region 3a whose value of resistance increases or decreases by an electric pulse that is applied between the lower electrode layer 2 and the upper electrode layer 4 and a second region 3b arranged around the first region 3a and having a larger content of oxygen than the first region 3a, wherein the lower and upper electrode layers 2 and 4 and at least a part of the first region 3a are arranged so as to overlap as viewed from the direction of the thickness of the first region 3a.
摘要翻译：设置下电极层2，形成在下电极层2上的上电极层4和形成在下电极层2和上电极层4之间的金属氧化物薄膜层3。金属氧化物薄膜层3包括第一区域3a，其第一区域3a的电阻值通过施加在下电极层2和上电极层4之间的电脉冲和围绕第一区域3a布置的第二区域3b而增大或减小，以及具有比第一区域3a更大的氧含量，其中下电极层2和上电极层4以及第一区域3a的至少一部分从第一区域的厚度方向观察而重叠 3a。

95. 发明申请

US20100061142A1 MEMORY ELEMENT AND MEMORY APPARATUS 审中-公开
标题翻译：记忆元素和记忆装置
公开(公告)号：US20100061142A1
公开(公告)日：2010-03-11
申请号：US12532552
申请日：2007-11-30
申请人： Koji Arita , Takeshi Takagi , Takumi Mikawa , Yoshio Kawashima , Zhiqiang Wei
发明人： Koji Arita , Takeshi Takagi , Takumi Mikawa , Yoshio Kawashima , Zhiqiang Wei
IPC分类号： G11C11/00
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/31 , G11C2213/32 , G11C2213/33 , G11C2213/34 , G11C2213/76 , H01L27/2409 , H01L27/2463 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/147
摘要： Memory elements (3) arranged in matrix in a memory apparatus (21), each includes a resistance variable element (1) which changes an electrical resistance value in response to an applied electrical pulse having a positive polarity or a negative polarity and maintains the changed electrical resistance value, and a current suppressing element (2) for suppressing a current flowing when the electrical pulse is applied to the resistance variable element. The current suppressing element includes a first electrode, a second electrode, and a current suppressing layer provided between the first electrode and the second electrode, and the current suppressing layer comprises SiNx (x: positive actual number).
摘要翻译：在存储装置（21）中排列成矩阵的存储元件（3），每个包括电阻变化元件（1），其响应于所施加的具有正极性或负极性的电脉冲改变电阻值，并保持改变电阻值和电流抑制元件（2），用于抑制当电脉冲施加到电阻可变元件时流动的电流。电流抑制元件包括第一电极，第二电极和设置在第一电极和第二电极之间的电流抑制层，并且电流抑制层包括SiNx（x：正实数）。

96. 发明申请

US20100032641A1 NONVOLATILE SEMICONDUCTOR MEMORY APPARATUS AND MANUFACTURING METHOD THEREOF 有权
标题翻译：非易失性半导体存储器及其制造方法
公开(公告)号：US20100032641A1
公开(公告)日：2010-02-11
申请号：US12515379
申请日：2007-11-13
申请人： Takumi Mikawa , Takeshi Takagi
发明人： Takumi Mikawa , Takeshi Takagi
IPC分类号： H01L45/00 , H01L21/28
CPC分类号： H01L27/101 , G11C13/0007 , G11C2213/32 , G11C2213/72 , G11C2213/73 , H01L27/0688 , H01L27/112 , H01L27/115 , H01L27/2409 , H01L27/2418 , H01L27/2463 , H01L27/2481 , H01L45/04 , H01L45/1233 , H01L45/146 , H01L45/1683
摘要： A nonvolatile semiconductor memory apparatus (10) of the present invention comprises a substrate (10), lower-layer electrode wires (15) provided on the substrate (11), an interlayer insulating layer (16) which is disposed on the substrate (11) including the lower-layer electrode wires (15) and is provided with contact holes at locations respectively opposite to the lower-layer electrode wires (15), resistance variable layers (18) which are respectively connected to the lower-layer electrode wires (15); and non-ohmic devices (20) which are respectively provided on the resistance variable layers (18) such that the non-ohmic devices are respectively connected to the resistance variable layers (18). The non-ohmic devices (20) each has a laminated-layer structure including plural semiconductor layers, a laminated-layer structure including a metal electrode layer and an insulator layer, or a laminated-layer structure including a metal electrode layer and a semiconductor layer. One layer of the laminated-layer structure is embedded to fill each of the contact holes and the semiconductor layer or the insulator layer which is the other layer of the laminated-layer structure has a larger area than an opening of each of the contact holes and is provided on the interlayer insulating layer (16).
摘要翻译：本发明的非易失性半导体存储装置（10）具备基板（10），设置在基板（11）上的下层电极布线（15），设置在基板（11）上的层间绝缘层（16）），并且在分别与下层电极线（15）相对的位置设置接触孔，电阻变化层（18）分别与下层电极线（15）连接 15）; 和非欧姆器件（20），其分别设置在电阻变化层（18）上，使得非欧姆器件分别连接到电阻变化层（18）。非欧姆装置（20）各自具有包括多个半导体层的层叠层结构，包括金属电极层和绝缘体层的层叠层结构，或者包括金属电极层和半导体层的层叠层结构。嵌入层叠层结构的一层以填充每个接触孔，作为层叠层结构的另一层的半导体层或绝缘体层的面积比每个接触孔的开口大，设置在层间绝缘层（16）上。

97. 发明授权

US07420237B2 Capacitor element 有权
标题翻译：电容元件
公开(公告)号：US07420237B2
公开(公告)日：2008-09-02
申请号：US11035175
申请日：2005-01-14
申请人： Yoshihisa Nagano , Takumi Mikawa
发明人： Yoshihisa Nagano , Takumi Mikawa
IPC分类号： H01L31/062 , H01L31/113 , H01L27/108 , H01L29/76 , H01L29/94
CPC分类号： H01L28/65 , H01L27/10852 , H01L28/57 , H01L28/75
摘要： A capacitor element is provided which is composed of a lower electrode, an upper electrode formed in opposing relation to the lower electrode, and a capacitor dielectric film made of a ferroelectric material or a high dielectric material and formed between the lower and upper electrodes. The lower electrode, the capacitor dielectric film, and the upper electrode are formed in a region extending at least from within a hole provided in an interlayer insulating film having a first hydrogen barrier film disposed on the upper surface thereof toward a position above the hole. A second hydrogen barrier film in contact with the first hydrogen barrier film is disposed to cover the upper surface of the upper electrode and the side surface of the portion of the upper electrode which has been formed above the hole.
摘要翻译：提供一种电容器元件，其由下电极，与下电极相对形成的上电极和由电介质材料或高电介质材料制成并形成在下电极和上电极之间的电容器电介质膜组成。下电极，电容器电介质膜和上电极形成在至少从设置在其上表面上的第一氢阻挡膜朝向孔上方的位置的层间绝缘膜的孔内延伸的区域中。与第一氢阻挡膜接触的第二氢阻挡膜设置成覆盖上电极的上表面和形成在孔上方的上电极部分的侧表面。

98. 发明授权

US07344976B2 Method for fabricating nonvolatile semiconductor memory device 有权
标题翻译：制造非易失性半导体存储器件的方法
公开(公告)号：US07344976B2
公开(公告)日：2008-03-18
申请号：US11377452
申请日：2006-03-17
申请人： Hiroshi Yoshida , Takumi Mikawa
发明人： Hiroshi Yoshida , Takumi Mikawa
IPC分类号： H01L21/4763
CPC分类号： H01L27/11507 , H01L27/11502 , H01L28/57
摘要： An adhesion layer composed of a titanium film and a titanium nitride film is formed by CVD on the inner wall of a contact hole formed in a multilayer film composed of an interlayer insulating film, a silicon nitride film, and a silicon dioxide film. Then, a conductive film made of tungsten or polysilicon is filled by CVD in the contact hole and the respective portions of the conductive film and the adhesion layer which are located over the silicon dioxide film are removed by CMP. Subsequently, the silicon dioxide film is removed by an etch-back method or a CMP method so that the silicon nitride film is exposed. This can prevent the delamination of the adhesion layer from the silicon nitride film as a hydrogen barrier film and also prevent the formation of a scratch in the silicon nitride film.
摘要翻译：在由层间绝缘膜，氮化硅膜和二氧化硅膜构成的多层膜中形成的接触孔的内壁上通过CVD形成由钛膜和氮化钛膜构成的粘合层。然后，通过CVD在接触孔中填充由钨或多晶硅制成的导电膜，并且通过CMP去除位于二氧化硅膜上方的导电膜和粘附层的各个部分。随后，通过蚀刻方法或CMP方法去除二氧化硅膜，以使氮化硅膜露出。这可以防止作为氢阻挡膜的粘合层从氮化硅膜分层，并且还防止在氮化硅膜中形成划痕。

99. 发明申请

US20060220091A1 Semiconductor device and method for fabricating the same 有权
公开(公告)号：US20060220091A1
公开(公告)日：2006-10-05
申请号：US11366570
申请日：2006-03-03
申请人： Takumi Mikawa , Yuji Judai , Toshie Kutsunai
发明人： Takumi Mikawa , Yuji Judai , Toshie Kutsunai
IPC分类号： H01L29/94
CPC分类号： H01L28/65 , H01L27/11507 , H01L28/57 , H01L28/75
摘要： A semiconductor device includes a first hydrogen barrier film, a capacitor device formed on the first hydrogen barrier film, and a second hydrogen barrier film formed to cover the capacitor device. The first and second hydrogen barrier films each contain at least one common type of atoms for allowing the first and second hydrogen barrier films to adhere to each other.

100. 发明授权

US07060552B2 Memory device with hydrogen-blocked ferroelectric capacitor 有权
标题翻译：具有氢阻塞铁电电容器的存储器件
公开(公告)号：US07060552B2
公开(公告)日：2006-06-13
申请号：US10843435
申请日：2004-05-12
申请人： Takumi Mikawa , Toshie Kutsunai , Yuji Judai
发明人： Takumi Mikawa , Toshie Kutsunai , Yuji Judai
IPC分类号： H01L21/8242
CPC分类号： H01L27/11502 , H01L27/10894 , H01L27/11507 , H01L28/55
摘要： A semiconductor memory device of the present invention includes: a semiconductor substrate; a memory cell capacitor for storing data, including a first electrode provided above the semiconductor substrate, a capacitance insulating film formed on the first electrode, and a second electrode provided on the capacitance insulating film; a step reducing film covering an upper surface and a side surface of the memory cell capacitor; and an overlying hydrogen barrier film covering the step reducing film.
摘要翻译：本发明的半导体存储器件包括：半导体衬底; 用于存储数据的存储单元电容器，包括设置在半导体衬底上的第一电极，形成在第一电极上的电容绝缘膜和设置在电容绝缘膜上的第二电极; 覆盖所述存储单元电容器的上表面和侧面的阶梯降低膜; 以及覆盖降低层的覆盖氢阻挡膜。

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