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91. 发明授权

US06486520B2 Structure and method for a large-permittivity gate using a germanium layer 有权
标题翻译：使用锗层的大电容率门的结构和方法
公开(公告)号：US06486520B2
公开(公告)日：2002-11-26
申请号：US09832260
申请日：2001-04-10
申请人： Yasutoshi Okuno , Scott R. Summerfelt
发明人： Yasutoshi Okuno , Scott R. Summerfelt
IPC分类号： H01L2978
CPC分类号： H01L21/28185 , H01L21/02381 , H01L21/02395 , H01L21/0245 , H01L21/02532 , H01L21/0262 , H01L21/28194 , H01L21/28255 , H01L21/28264 , H01L29/1054 , H01L29/513 , H01L29/517 , H01L29/518 , H01L29/66477 , H01L29/78391 , H01L29/808
摘要： A structure for, and method of forming, a metal-insulator-semiconductor field-effect transistor in an integrated circuit is disclosed. The disclosed method comprises forming a germanium layer 52 on a semiconductor substrate (e.g. silicon 20), depositing a large-permittivity gate dielectric (e.g. tantalum pentoxide 56) on the germanium layer, and forming a gate electrode (e.g., titanium nitride 60) on the gate dielectric. The method may comprise forming source and drain regions 64 in the substrate on either side of the gate dielectric. The germanium layer, which is preferably epitaxially grown, generally prevents formation of a low dielectric constant layer between the gate dielectric and the semiconductor substrate. The disclosed structure comprises a germanium layer 52 disposed on a semiconductor substrate (e.g. silicon 20), a large-permittivity gate dielectric (e.g. tantalum pentoxide 56) disposed on the germanium layer, and a gate electrode (e.g., titanium nitride 60) disposed on the gate dielectric. The structure may comprise source and drain regions 64 disposed in the substrate on either side of the gate dielectric. A GexSil−x buffer layer 58 may be formed between the semiconductor substrate and the germanium layer, with x transitioning from about 0 near the substrate to about 1 near the germanium layer. The large-permittivity gate dielectric may be either a moderate-dielectric constant oxide or a high-dielectric constant oxide.
摘要翻译：公开了一种集成电路中的金属 - 绝缘体半导体场效应晶体管的结构及其形成方法。所公开的方法包括在半导体衬底（例如硅20）上形成锗层52，在锗层上沉积大电容率栅极电介质（例如五氧化二钽56），以及在锗层上形成栅电极（例如，氮化钛60）栅电介质。该方法可以包括在栅极电介质的任一侧上的衬底中形成源区和漏区64。优选外延生长的锗层通常防止在栅极电介质和半导体衬底之间形成低介电常数层。所公开的结构包括设置在半导体衬底（例如硅20）上的锗层52，设置在锗层上的大电容率栅极电介质（例如五氧化二钽56）和设置在锗层上的栅极（例如，氮化钛60）栅电介质。该结构可以包括在栅极电介质的任一侧上设置在衬底中的源极和漏极区域64。可以在半导体衬底和锗层之间形成GexSil-x缓冲层58，x在衬底附近从约0转移到接近锗层的约1。大电容率栅极电介质可以是中等介电常数氧化物或高介电常数氧化物。

92. 发明授权

US06362068B1 Electrode interface for high-dielectric-constant materials 失效
标题翻译：用于高介电常数材料的电极界面
公开(公告)号：US06362068B1
公开(公告)日：2002-03-26
申请号：US09024799
申请日：1998-02-17
申请人： Scott R. Summerfelt , Howard Roy Beratan
发明人： Scott R. Summerfelt , Howard Roy Beratan
IPC分类号： H01L2120
CPC分类号： H01L27/11502 , H01G4/306 , H01G7/06 , H01L28/56
摘要： A capacitor dielectric with multiple layers of differing high dielectric constant materials such as SrTiO3 and BaSrTiO3 in which an inner layer has a higher dielectric constant but also higher leakage current than outer layers on each side of the inner layer which have lower leakage currents but also lower dielectric constants.
摘要翻译：具有多层不同高介电常数材料（如SrTiO3和BaSrTiO3）的电容器电介质，其中内层具有较高介电常数，但漏电流高于漏层电流较低的内层每侧外层，介电常数。

93. 发明授权

US06320213B1 Diffusion barriers between noble metal electrodes and metallization layers, and integrated circuit and semiconductor devices comprising same 失效
标题翻译：贵金属电极和金属化层之间的扩散障碍，以及包含该扩散阻挡层的集成电路和半导体器件
公开(公告)号：US06320213B1
公开(公告)日：2001-11-20
申请号：US08994089
申请日：1997-12-19
申请人： Peter S. Kirlin , Scott R. Summerfelt , Paul McIntryre
发明人： Peter S. Kirlin , Scott R. Summerfelt , Paul McIntryre
IPC分类号： H01L2976
CPC分类号： H01L28/75 , H01L28/55
摘要： A dynamic random access memory device (100) includes storage capacitors using a high dielectric constant material, such as, BaSrTiO3, SrBi2Ta2O9 and PbZrTiO3, for the capacitors' insulator. The device includes a conductive plug (106) formed over and connecting with a semiconductor substrate (102). A buffer layer (107) of titanium silicide lays over the plug, and this layer serves to trap “dangling” bonds and to passivate the underlying surface. A first diffusion barrier layer (108), e.g., titanium aluminum nitride, covers the titanium silicide. A capacitor first electrode (110) lays over the diffusion barrier layer. The high dielectric constant material (112) is laid over the capacitor first electrode. A capacitor second electrode (116) is laid over the high dielectric constant material. A second diffusion barrier layer (120) is deposited on the capacitor second electrode. A conductor, such as aluminum (130), is laid over the second diffusion barrier layer. An isolation dielectric (132) can be deposited over the conductor at a high temperature without causing oxygen or metallic diffusion through the first and second diffusion barrier layers.
摘要翻译：动态随机存取存储器件（100）包括用于电容器绝缘体的诸如BaSrTiO3，SrBi2Ta2O9和PbZrTiO3的高介电常数材料的存储电容器。该器件包括形成在半导体衬底（102）上并与其连接的导电插塞（106）。硅化钛缓冲层（107）位于塞子上，该层用于捕获“悬挂”键并钝化下面的表面。第一扩散阻挡层（108），例如氮化铝钛覆盖硅化钛。电容器第一电极（110）覆盖在扩散阻挡层上。高介电常数材料（112）放置在电容器第一电极上。电容器第二电极（116）放置在高介电常数材料上。第二扩散阻挡层（120）沉积在电容器第二电极上。诸如铝（130）的导体被放置在第二扩散阻挡层上。绝缘电介质（132）可以在高温下沉积在导体上，而不会引起氧或金属扩散通过第一和第二扩散阻挡层。

94. 发明授权

US06211034B1 Metal patterning with adhesive hardmask layer 失效
标题翻译：金属图案与粘合剂硬掩模层
公开(公告)号：US06211034B1
公开(公告)日：2001-04-03
申请号：US09059546
申请日：1998-04-13
申请人： Mark R. Visokay , Luigi Colombo , Paul McIntyre , Scott R. Summerfelt
发明人： Mark R. Visokay , Luigi Colombo , Paul McIntyre , Scott R. Summerfelt
IPC分类号： H01L218242
CPC分类号： H01L28/60 , H01L21/32139 , H01L27/1085
摘要： An adherent hardmask structure and method of etching a bottom electrode in memory device capacitor structures that dispenses with the need for any adhesion promoter during the etching of the bottom electrode. By using silicon nitride as a hardmask 220, the processing is simplified and a more robust capacitor structure can be produced. Silicon nitride 220 has been shown to yield significantly enhanced adhesion to platinum 210, as compared to silicon oxide formed by any method. Since silicon nitride 220 is oxidation resistant, it advantageously resists any oxygen plasma that might be used in the etch chemistry. This etching process can be used during processing of high-k capacitor structures in DRAMs in the ≧256 Mbit generations.
摘要翻译：一种粘附硬掩模结构和蚀刻存储器件电容器结构中的底部电极的方法，其在底部电极的蚀刻期间省去了对任何粘附促进剂的需要。通过使用氮化硅作为硬掩模220，简化了处理，并且可以产生更坚固的电容器结构。与通过任何方法形成的氧化硅相比，已经显示氮化硅220产生显着增强的与铂210的粘合性。由于氮化硅220是抗氧化的，所以它有利地抵抗可能在蚀刻化学中使用的任何氧等离子体。这种蚀刻工艺可以在> = 256Mbit的DRAM中的高k电容器结构的处理期间使用。

95. 发明授权

US6087661A Thermal isolation of monolithic thermal detector 失效
标题翻译：单片热探测器的隔热
公开(公告)号：US6087661A
公开(公告)日：2000-07-11
申请号：US959943
申请日：1997-10-29
申请人： Robert A. Owen , Charles M. Hanson , Steven N. Frank , Howard R. Beratan , Scott R. Summerfelt
发明人： Robert A. Owen , Charles M. Hanson , Steven N. Frank , Howard R. Beratan , Scott R. Summerfelt
IPC分类号： G01J5/10 , G01J5/20 , G01J5/22
CPC分类号： G01J5/10 , G01J5/20
摘要： A thermal sensor (36, 84, 114) comprising a thermal assembly (44, 88, 118) and a signal flowpath (46, 90, 120). The thermal assembly (44, 88, 118) may comprise a thermally sensitive element (50) and a pair of electrodes (52, 54). The thermally sensitive element (50) may generate a signal representative of an amount of thermal radiation incident to the thermally sensitive element (50). The electrodes (52, 54) may collect the signal generated by the thermally sensitive element (50). The signal flowpath (46, 90, 120) may transmit the signal collected by the electrodes (52, 54) to the substrate (34, 82, 112). The signal flowpath (46, 90, 120) may comprise a pair of arms (56, 58, 92, 122) each extending from an electrode (52, 54) and be connected to the substrate (34, 82, 112). The arms (56, 58, 92, 122) may support the thermal assembly (44, 88, 118) in spaced relation with the substrate (34, 82, 112). The arms (56, 58, 92, 122) may be formed of a thermally insulating material.
摘要翻译：包括热组件（44,88,118）和信号流路（46,90,120）的热传感器（36,84,114）。热组件（44,88,118）可以包括热敏元件（50）和一对电极（52,54）。热敏元件（50）可以产生表示入射到热敏元件（50）的热辐射量的信号。电极（52,54）可以收集由热敏元件（50）产生的信号。信号流路（46,90,120）可以将由电极（52,54）收集的信号传送到基板（34,82,112）。信号流路（46,90,120）可以包括一对臂（56,58,92,122），每对臂从电极（52,54）延伸并连接到衬底（34,82,112）。臂（56,58,92,122）可以以与衬底（34,82,112）间隔开的关系支撑热组件（44,48,118）。臂（56,58,92,122）可以由隔热材料形成。

96. 发明授权

US5972722A Adhesion promoting sacrificial etch stop layer in advanced capacitor structures 失效
标题翻译：先进的电容器结构中的粘附促进牺牲蚀刻停止层
公开(公告)号：US5972722A
公开(公告)日：1999-10-26
申请号：US60152
申请日：1998-04-14
申请人： Mark R. Visokay , Luigi Colombo , Paul McIntyre , Scott R. Summerfelt
发明人： Mark R. Visokay , Luigi Colombo , Paul McIntyre , Scott R. Summerfelt
IPC分类号： H01L21/02 , H01L21/311 , H01L21/8242 , H01G7/06
CPC分类号： H01L27/1085 , H01L21/31116 , H01L28/55 , H01L28/60
摘要： A high-k dielectric capacitor structure and fabrication method that incorporates an adhesion promoting etch stop layer 200 to promote adhesion of the bottom electrode 220 to the interlevel dielectric layer 210 and to provide a well controlled, repeatable and uniform recess prior to the dielectric 230 deposition. By using a sacrificial layer 200, for example silicon nitride (Si3N4), this layer can act as an etch stop during the recess etch to eliminate parasitic capacitance between adjacent capacitor cells A and B and can promote adhesion of the bottom electrode material 220 to the substrate 210.
摘要翻译：高k电介质电容器结构和制造方法，其包含粘附促进蚀刻停止层200以促进底部电极220粘附到层间电介质层210，并且在电介质230沉积之前提供良好控制的，可重复的和均匀的凹部。通过使用牺牲层200（例如氮化硅（Si 3 N 4）），该层可以在凹陷蚀刻期间用作蚀刻停止以消除相邻的电容器电池A和B之间的寄生电容，并且可以促进底部电极材料220与衬底210。

97. 发明授权

US5909043A Sacrificial oxygen sources to prevent reduction of oxygen containing materials 失效
标题翻译：牺牲氧源防止含氧材料的还原
公开(公告)号：US5909043A
公开(公告)日：1999-06-01
申请号：US252727
申请日：1994-06-02
申请人： Scott R. Summerfelt
发明人： Scott R. Summerfelt
IPC分类号： H01G4/10 , H01L21/02 , H01L21/316 , H01L21/822 , H01L21/8242 , H01L27/04 , H01L27/108 , H01L29/76 , H01L29/94 , H01L31/119
CPC分类号： H01L28/60
摘要： Some VLSI fabrication steps can cause degradation of the useful properties of many high dielectric constant materials that will likely be used in future high density integrated circuit devices. The presence of hydrogen, for example, can readily reduce (i.e. remove oxygen from) oxygen-containing dielectric materials. In general, there exists a critical oxygen activity value below which an oxygen-containing dielectric material will become conductive or otherwise unacceptable. Reduction of the oxygen-containing material during VLSI processing is prevented by providing a nearby sacrificial source of oxygen. Generally, the oxygen source is reduced to a lower oxidation state (i.e. the material loses oxygen) at an oxygen activity level that is larger than the critical oxygen activity value. The required placement of the oxygen source material relative to the oxygen-containing dielectric material is in general determined by the requirement that the oxygen partial pressure over the entire volume of the oxygen-containing dielectric material not fall below the critical value during subsequent VLSI processing steps. The presence of these sacrificial oxygen source materials (e.g. 56) elevates the partial pressure of oxygen in the vicinity of the oxygen-containing dielectric material (e.g. barium strontium titanate 46) such that the oxygen partial pressure during subsequent fabrication steps does not fall below the oxygen partial pressure at which the oxygen-containing dielectric material is reduced. Structures wherein the sacrificial oxygen sources are part of capacitor electrodes (e.g. RuO.sub.2 44) are presented, as well as structures wherein volumes of sacrificial oxygen source materials 56 are formed nearby to integrated circuit capacitors.
摘要翻译：一些VLSI制造步骤可能导致可能用于未来的高密度集成电路器件的许多高介电常数材料的有用特性的劣化。例如，氢的存在可以容易地减少（即，从含氧介电材料中除去氧）。通常，存在临界氧活性值，低于该值时，含氧介电材料将变得导电或以其他方式不可接受。通过提供附近的氧牺牲源来防止VLSI处理期间含氧材料的还原。一般来说，在大于临界氧活度值的氧活度水平下，氧源被还原成较低的氧化态（即材料失去氧）。氧源材料相对于含氧介电材料的所需放置通常由下述要求决定：在随后的VLSI处理步骤期间，含氧介电材料的整个体积上的氧分压不低于临界值。这些牺牲氧源材料（例如56）的存在提高了含氧电介质材料（例如钛酸钡锶46）附近的氧分压，使得后续制造步骤期间的氧分压不低于含氧电介质材料的氧分压降低。存在其中牺牲氧源是电容器电极（例如RuO 2 44）的一部分的结构，以及其中牺牲氧源材料56的体积在集成电路电容器附近形成的结构。

98. 发明授权

US5811851A Pre-oxidizing high-dielectric-constant material electrodes 失效
公开(公告)号：US5811851A
公开(公告)日：1998-09-22
申请号：US661501
申请日：1996-06-11
申请人： Yasushiro Nishioka , Scott R. Summerfelt , Kyung-ho Park , Pijush Bhattacharya
发明人： Yasushiro Nishioka , Scott R. Summerfelt , Kyung-ho Park , Pijush Bhattacharya
IPC分类号： H01L21/02 , H01L31/062 , H01L23/48 , H01L27/108 , H01L29/12
CPC分类号： H01L28/60 , H01L28/55 , H01L28/75 , Y10S257/915
摘要： Generally, according to the present invention, the sidewall of the adhesion layer (e.g. TiN 36) in a lower electrode is pre-oxidized after deposition of an unreactive noble metal layer (e.g. Pt 38) but before deposition of an HDC material (e.g. BST 42). An important aspect of the present invention is that the pre-oxidation of the sidewall generally causes a substantial amount of the potential sidewall expansion (and consequent noble metal layer deformation) to occur before deposition of the HDC material. One embodiment of the present invention is a microelectronic structure comprising a supporting layer having a principal surface, and an adhesion layer overlying the principal surface of the supporting layer, wherein the adhesion layer comprises a top surface and an expanded, oxidized sidewall (e.g. TiO.sub.2 40). The structure further comprises a noble metal layer overlying the top surface of the adhesion layer, wherein the noble metal layer comprises a deformed area overlying the oxidized sidewall, and a high-dielectric-constant material layer overlying the noble metal layer. The high-dielectric-constant material layer is substantially free of expansion stress cracks in proximity to the deformed area of the noble metal layer.

99. 发明授权

US5793057A Conductive amorphous-nitride barrier layer for high dielectric-constant material electrodes 失效
标题翻译：用于高介电常数材料电极的导电非晶氮化物阻挡层
公开(公告)号：US5793057A
公开(公告)日：1998-08-11
申请号：US472621
申请日：1995-06-07
申请人： Scott R. Summerfelt
发明人： Scott R. Summerfelt
IPC分类号： H01G4/12 , H01G4/012 , H01G4/33 , H01L21/02 , H01L21/822 , H01L21/8242 , H01L21/8246 , H01L21/8247 , H01L27/04 , H01L27/105 , H01L27/108 , H01L29/788 , H01L29/792 , H01L29/04 , H01L31/036 , H01L31/0376 , H01L3/20
CPC分类号： H01L28/55 , H01L28/60
摘要： A preferred embodiment of this invention comprises an oxidizable layer (e.g. TiN 50), an amorphous nitride barrier layer (e.g. Ti--Si--N 34) overlying the oxidizable layer, an oxygen stable layer (e.g. platinum 36) overlying the amorphous nitride layer, and a high-dielectric-constant material layer (e.g. barium strontium titanate 38) overlying the oxygen stable layer. The amorphous nitride barrier layer substantially inhibits diffusion of oxygen to the oxidizable layer, thus minimizing deleterious oxidation of the oxidizable layer.
摘要翻译：本发明的优选实施方案包括可氧化层（例如TiN 50），覆盖在可氧化层上的无定形氮化物阻挡层（例如Ti-Si-N 34），覆盖在非晶氮化物层上的氧稳定层（例如铂36）以及覆盖氧稳定层的高介电常数材料层（例如钛酸钡锶38）。无定形氮化物阻挡层基本上抑制氧扩散到可氧化层，从而最小化可氧化层的有害氧化。

100. 发明授权

US5746930A Method and structure for forming an array of thermal sensors 失效
标题翻译：形成热传感器阵列的方法和结构
公开(公告)号：US5746930A
公开(公告)日：1998-05-05
申请号：US368068
申请日：1995-01-03
申请人： James F. Belcher , Howard R. Beratan , Scott R. Summerfelt
发明人： James F. Belcher , Howard R. Beratan , Scott R. Summerfelt
IPC分类号： G01J1/02 , G01J5/02 , G01J5/34 , H01L37/02 , G01J5/06 , C23F1/00
CPC分类号： G01J5/34 , H01L37/02
摘要： An array of thermal sensitive elements (16) may be formed from a pyroelectric substrate (46) having an infrared absorber and common electrode assembly (18) attached thereto. A first layer of electrically conductive contacts (60) is formed to define in part masked (61) and unmasked (68) regions of the substrate (46). A second layer of electrically conductive contacts (62) may be formed on the first layer of contacts (60). A mask layer (66) is formed to encapsulate the exposed portions of the second layer of contacts (62). The unmasked regions (68) are exposed to an etchant (70) and irradiated to substantially increase the reactivity between the unmasked regions (68) and the etchant (70) such that during irradiation, the etchant (70) removes the unmasked regions (68) substantially faster than the first layer of contacts (60) and the mask layer (66).
摘要翻译：热敏元件阵列（16）可以由具有红外线吸收器和附接到其上的公共电极组件（18）的热电基片（46）形成。第一层导电触头（60）被形成以限定衬底（46）的一部分屏蔽（61）和未屏蔽（68）区域。可以在第一层触点（60）上形成第二层导电触点（62）。形成掩模层（66）以封装第二层触点（62）的暴露部分。未掩蔽区域（68）暴露于蚀刻剂（70）并被照射以显着增加未掩模区域（68）和蚀刻剂（70）之间的反应性，使得在照射期间，蚀刻剂（70）去除未掩蔽区域（68））比第一层触点（60）和掩模层（66）快得多。

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