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91. 发明授权

US07046500B2 Laminated ceramic capacitor 有权
标题翻译：层压陶瓷电容器
公开(公告)号：US07046500B2
公开(公告)日：2006-05-16
申请号：US11068757
申请日：2005-03-02
申请人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
发明人： Byoung Hwa Lee , Dong Seok Park , Min Cheol Park , Sang Soo Park , Chang Hoon Shim , Kyung Nam Hwang
IPC分类号： H01G4/005 , H01G4/228
CPC分类号： H01G4/012 , H01G4/30
摘要： A laminated ceramic capacitor includes a ceramic block formed by laminating a plurality of ceramic sheets, a plurality of external electrodes formed on outer surfaces of the ceramic block facing each other, and set as a positive terminal and a negative terminal, respectively, one or more first and second internal electrodes alternately arranged within the ceramic block such that electric currents flow in opposite directions in the internal electrodes, and a plurality of withdrawing patterns for connecting the first and second internal electrodes to the external electrodes, respectively.
摘要翻译：层叠陶瓷电容器包括通过层叠多个陶瓷片而形成的陶瓷块，形成在彼此相对的陶瓷块的外表面上的多个外部电极，分别设置为正极端子和负极端子，一个或多个第一和第二内部电极交替地布置在陶瓷块内，使得电流在内部电极中沿相反方向流动，以及多个用于将第一和第二内部电极连接到外部电极的抽出图案。

92. 发明申请

US20060067441A1 Apparatus and method for estimating delay spread of multi-path fading channel in wireless communication system 审中-公开
标题翻译：用于估计无线通信系统中多路径衰落信道的延迟扩展的装置和方法
公开(公告)号：US20060067441A1
公开(公告)日：2006-03-30
申请号：US11219955
申请日：2005-09-06
申请人： Min-Cheol Park , In-Hyoung Kim , Bong-Gee Song , Jae-Hwan Chang
发明人： Min-Cheol Park , In-Hyoung Kim , Bong-Gee Song , Jae-Hwan Chang
IPC分类号： H03D1/04 , H04K1/10
CPC分类号： H04L25/0216 , H04L27/2647
摘要： Disclosed are an apparatus and method that can estimate the maximum delay spread by means of simple computation while being robust against SNR (Signal-to-Noise Ratio) variations. A standard deviation value of a noise component is produced from time-domain signal values obtained from a received signal. The time-domain signal values corresponding to preset sampling points are compared with a threshold value designated by the standard deviation value. A delay time of a time index that corresponds to a time-domain signal value equal to or larger than the threshold value and simultaneously is the maximum time index among time indexes respectively corresponding to the sampling points is detected to be a maximum delay spread value.
摘要翻译：公开了一种可以通过简单计算来估计最大延迟扩展的装置和方法，同时针对SNR（信噪比）变化是鲁棒的。根据从接收信号获得的时域信号值产生噪声分量的标准偏差值。对应于预设采样点的时域信号值与由标准偏差值指定的阈值进行比较。对应于等于或大于阈值的时域信号值的时间索引的延迟时间，并且同时是分别对应于采样点的时间指标中的最大时间索引被检测为最大延迟扩展值。

93. 发明授权

US06940710B1 Multilayered chip capacitor 失效
标题翻译：多层片式电容器
公开(公告)号：US06940710B1
公开(公告)日：2005-09-06
申请号：US11029677
申请日：2005-01-06
申请人： Byoung Hwa Lee , Dong Seok Park , Chang Hoon Shim , Sang Soo Park , Min Cheol Park
发明人： Byoung Hwa Lee , Dong Seok Park , Chang Hoon Shim , Sang Soo Park , Min Cheol Park
IPC分类号： H01G4/232 , H01G4/30 , H01G4/06
CPC分类号： H01G4/232 , H01G4/30
摘要： A multilayered chip capacitor including a capacitor main body including a plurality of dielectric layers, which are laminated; at least one pair of first and second internal electrodes, each of which is formed on the corresponding one of the plural dielectric layers and includes at least one lead extended to one end of the corresponding dielectric layer; a plurality of external terminals formed on the outer surface of the capacitor main body, and respectively connected to the first and second internal electrodes through the leads; and at least one opened region, formed through the inner area of each of the first and second internal electrodes, for branching the flow of current so as to increase the offset quantity of parasitic inductances between the first and second internal electrodes.
摘要翻译：一种多层片状电容器，其包括层叠有多个电介质层的电容器主体; 至少一对第一和第二内部电极，每个所述第一和第二内部电极形成在所述多个电介质层中的相应一个上，并且包括至少一个延伸到所述相应电介质层的一端的引线; 多个外部端子，形成在电容器主体的外表面上，分别通过引线连接到第一和第二内部电极; 以及通过第一和第二内部电极的每一个的内部区域形成的至少一个开放区域，用于分流电流，以增加第一和第二内部电极之间的寄生电感的偏移量。

94. 发明授权

US09099242B2 Laminated chip electronic component, board for mounting the same, and packing unit thereof 有权
标题翻译：层叠芯片电子部件，用于安装其的基板及其包装单元
公开(公告)号：US09099242B2
公开(公告)日：2015-08-04
申请号：US13588696
申请日：2012-08-17
申请人： Young Ghyu Ahn , Sang Soo Park , Min Cheol Park , Se Hwa Jeong
发明人： Young Ghyu Ahn , Sang Soo Park , Min Cheol Park , Se Hwa Jeong
IPC分类号： H05K1/16 , H01G4/005 , H05K1/02 , H01G4/30
CPC分类号： H01G4/005 , H01G4/30 , H05K1/0271 , H05K1/111 , H05K3/3442 , H05K2201/09427 , H05K2201/10015 , H05K2201/10636 , H05K2201/2045 , Y02P70/611
摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; and upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer.
摘要翻译：层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 以及在有源层的厚度方向的上部和下部形成的上部和下部覆盖层，所述下部覆盖层的厚度大于上部覆盖层的厚度。

95. 发明授权

US08737543B2 Method and apparatus for recovering estimated velocity of mobile station in communication system 有权
标题翻译：通信系统中移动台估计速度恢复的方法和装置
公开(公告)号：US08737543B2
公开(公告)日：2014-05-27
申请号：US12910103
申请日：2010-10-22
申请人： Min-Cheol Park , In-Hyoung Kim , Tae-Gon Kim
发明人： Min-Cheol Park , In-Hyoung Kim , Tae-Gon Kim
IPC分类号： H03D1/00
CPC分类号： H04W56/0035
摘要： A method and apparatus for recovering an estimated velocity of a mobile station in a communication system are provided. The apparatus includes a searcher for determining a Doppler shift value representing the estimated velocity of the mobile station by using a channel impulse response of a preamble signal received at a regular interval of time, a detector for determining a reference Doppler value for compensating the Doppler shift value by using correlation ratios between channel values of symbols to which data for the mobile station are allocated according to subcarriers in a data allocation field of a frame including the preamble signal, and a compensator for determining a compensated Doppler shift value by using the reference Doppler value to compensate the Doppler shift value for a folding value, wherein the folding value represents a difference between the estimated velocity and a true velocity of the mobile station.
摘要翻译：提供了一种在通信系统中恢复移动台的估计速度的方法和装置。该装置包括：搜索器，用于通过使用以规则时间间隔接收的前导码信号的信道脉冲响应来确定表示移动台的估计速度的多普勒频移值;检测器，用于确定用于补偿多普勒频移的参考多普勒值通过使用根据包括前导码信号的帧的数据分配字段中的子载波来分配移动站的数据的符号的信道值之间的相关比，以及用于通过使用参考多普勒来确定补偿的多普勒频移值的补偿器值以补偿折叠值的多普勒频移值，其中折叠值表示估计速度与移动台的真实速度之间的差。

96. 发明授权

US08638543B2 Laminated chip electronic component, board for mounting the same, and packing unit thereof 有权
标题翻译：层叠芯片电子部件，用于安装其的基板及其包装单元
公开(公告)号：US08638543B2
公开(公告)日：2014-01-28
申请号：US13588876
申请日：2012-08-17
申请人： Young Ghyu Ahn , Min Cheol Park , Doo Young Kim , Sang Soo Park
发明人： Young Ghyu Ahn , Min Cheol Park , Doo Young Kim , Sang Soo Park
IPC分类号： H01G4/06 , H01G4/005
CPC分类号： H01G4/30 , B65B9/04 , B65B15/04 , H01G2/065 , H01G4/012 , H01G4/12 , H05K1/181 , H05K2201/10015
摘要： A laminated chip electronic component includes: a ceramic body including internal electrodes and dielectric layers; first and second external electrodes formed to cover both end portions of the ceramic body in a length direction; an active layer in which the internal electrodes are disposed in an opposing manner, while having the dielectric layers interposed therebetween, to form capacitance; upper and lower cover layers formed on upper and lower portions of the active layer in a thickness direction, the lower cover layer having a thickness greater than that of the upper cover layer; and additional electrode layers disposed irrespective of a formation of capacitance within the lower cover layer.
摘要翻译：层叠芯片电子部件包括：陶瓷体，其包括内部电极和电介质层; 形成为在长度方向上覆盖陶瓷体的两端部的第一外部电极和第二外部电极; 其中内部电极以相对的方式设置在其间插入电介质层的有源层以形成电容; 上下层形成在有源层的厚度方向的上部和下部上，下覆盖层的厚度大于上覆盖层的厚度; 以及与下覆盖层内的电容的形成无关地设置的附加电极层。

97. 发明申请

US20130050894A1 MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING MULTI-LAYERED CERAMIC CAPACITOR THEREON 有权
标题翻译：具有多层陶瓷电容器的电路板的安装结构
公开(公告)号：US20130050894A1
公开(公告)日：2013-02-28
申请号：US13590270
申请日：2012-08-21
申请人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
发明人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
IPC分类号： H01G4/228 , H01G4/12
CPC分类号： H01G4/12 , H01G4/228 , H01G4/30
摘要： Disclosed herein is a mounting structure of a circuit board having a multi-layered ceramic capacitor thereon, the multi-layered ceramic capacitor including dielectric sheets laminated thereon and external terminal electrodes formed at both ends thereof, the dielectric sheets having internal electrodes formed thereon, and the external terminal electrodes being connected in parallel with the internal electrode, wherein the internal electrodes are disposed to be in parallel with the circuit board, the external terminal electrodes are bonded to lands of the circuit board by a conductive material, and a bonding height (Ts) of the conductive material is lower than a sum of a gap (Ta) between the circuit board and a bottom surface of the multi-layered ceramic capacitor and a thickness (Tc) of a cover layer on a lower portion of the multi-layered ceramic capacitor, whereby vibration noise can be greatly reduced.
摘要翻译：这里公开了一种其上具有多层陶瓷电容器的电路板的安装结构，其中层叠有电介质片的多层陶瓷电容器和形成在其两端的外部端子电极，其上形成有内部电极的电介质片，以及外部端子电极与内部电极并联连接，其中内部电极被设置为与电路板平行，外部端子电极通过导电材料接合到电路板的焊盘，并且接合高度 Ts）低于多层陶瓷电容器的电路板和底面之间的间隙（Ta）和多层陶瓷电容器的下表面的覆盖层的厚度（Tc）之和，层状陶瓷电容器，从而可以大大降低振动噪声。

98. 发明授权

US08351181B1 Chip type laminated capacitor 有权
标题翻译：片式叠层电容器
公开(公告)号：US08351181B1
公开(公告)日：2013-01-08
申请号：US13531242
申请日：2012-06-22
申请人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
发明人： Young Ghyu Ahn , Byoung Hwa Lee , Min Cheol Park , Young Hoon Song , Mi Hee Lee
IPC分类号： H01G4/06
CPC分类号： H01G4/1272 , H01G2/065 , H01G4/005 , H01G4/12 , H01G4/228 , H01G4/232 , H01G4/30
摘要： There is provided a chip type laminated capacitor including: a ceramic body formed by laminating a dielectric layer having a thickness equal to 10 or more times an average particle diameter of a grain included therein and being 3 μm or less; first and second outer electrodes; a first inner electrode having one end forming a first margin together with one end surface of the ceramic body at which the second outer electrode is formed and the other end leading to the first outer electrode; and a second inner electrode having one end forming a second margin together with the other end surface of the ceramic body at which the first outer electrode is formed and the other end leading to the second outer electrode, wherein the first and second margins have different widths under a condition that they are 200 μm or less.
摘要翻译：提供一种芯片型层叠电容器，其包括：陶瓷体，其通过层叠厚度等于其中包含的晶粒的平均粒径的10倍以上且为3μm以下的电介质层而形成; 第一和第二外部电极; 第一内部电极，其一端与形成有第二外部电极的陶瓷体的一个端面一起形成第一边缘，而另一端通向第一外部电极; 以及第二内部电极，其一端与形成有第一外部电极的陶瓷体的另一个端面一起形成第二边缘，另一端通向第二外部电极，其中第一和第二边缘具有不同的宽度在200μm以下的条件下。

99. 发明申请

US20120327556A1 MULTILAYER CERAMIC CAPACITOR 有权
标题翻译：多层陶瓷电容器
公开(公告)号：US20120327556A1
公开(公告)日：2012-12-27
申请号：US13531237
申请日：2012-06-22
申请人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
发明人： Young Ghyu AHN , Byoung Hwa Lee , Min Cheol Park , Sang Soo Park , Dong Seok Park
IPC分类号： H01G4/12
CPC分类号： H01G4/12 , H01G4/012 , H01G4/30
摘要： There is provided a multilayer ceramic capacitor, including: a multilayer body in which a plurality of dielectric layers are stacked in a thickness direction; and inner electrode layers formed within the multilayer body and including first and second inner electrodes disposed to be opposed to each other; wherein a ratio (MA1/CA1) of MA1 to CA1 is between 0.07 and 0.20, wherein CA1 represents an area of the multilayer body in a cross section of the multilayer body taken in a length and thickness direction, and MA1 represents an area of a first margin part in the cross section of the multilayer body taken in the length and thickness direction, the first margin part being a portion of the multilayer body, other than a first capacitance forming part thereof in which the first and second inner electrodes overlap in the thickness direction.
摘要翻译：提供了一种多层陶瓷电容器，包括：多层体，其中多个电介质层在厚度方向上堆叠; 以及形成在所述多层体内并且包括彼此相对设置的第一和第二内部电极的内部电极层; 其中MA1与CA1的比率（MA1 / CA1）在0.07和0.20之间，其中CA1表示在长度和厚度方向上取下的多层体的横截面中的多层体的面积，MA1表示第一边缘部分是沿着长度和厚度方向截取的第一边缘部分，第一边缘部分是多层体的一部分，除了第一电容形成部分之外，第一和第二内部电极在其中重叠厚度方向。

100. 发明申请

US20120268875A1 MOUNTING STRUCTURE OF CIRCUIT BOARD HAVING THEREON MULTI-LAYERED CERAMIC CAPACITOR, METHOD THEREOF, LAND PATTERN OF CIRCUIT BOARD FOR THE SAME, PACKING UNIT FOR MULTI-LAYERED CERAMIC CAPACITOR TAPED HORIZONTALLY AND ALIGNING METHOD THEREOF 审中-公开
标题翻译：具有多层陶瓷电容器的电路板的安装结构，其方法，电路板的土地图案，多层陶瓷电容器的包装单元和水平方法
公开(公告)号：US20120268875A1
公开(公告)日：2012-10-25
申请号：US13540055
申请日：2012-07-02
申请人： Young Ghyu AHN , Byoung Hwa LEE , Min Cheol PARK , Sang Soo PARK , Dong Seok PARK
发明人： Young Ghyu AHN , Byoung Hwa LEE , Min Cheol PARK , Sang Soo PARK , Dong Seok PARK
IPC分类号： H05K7/00 , B67C3/22
CPC分类号： H01G2/065 , H01G4/232 , H01G4/30 , H05K3/3442 , H05K13/022 , H05K2201/10015 , H05K2203/166 , Y02P70/613 , Y10T29/49124
摘要： A packing unit for a plurality of multi-layered ceramic capacitors including: a plurality of multi-layered ceramic capacitors having a thickness TMLCC equal or similar to a width WMLCC; and a packing sheet including a plurality of storing spaces, the capacitors being stored in the storing spaces and internal electrodes of each capacitor being substantially parallel with a bottom of the storing space. A related method includes: transferring a plurality of multi-layered ceramic capacitors having a thickness TMLCC equal or similar to a width WMLCC through a transferring unit; supplying magnetic field to a side of the capacitor so that the internal electrodes of the capacitor are substantially parallel with a bottom of the transferring unit; and storing the multi-layered ceramic capacitor in a storing space of a packing sheet so that the internal electrodes of the capacitor are substantially parallel with a bottom of the storing space.
摘要翻译：一种用于多层陶瓷电容器的包装单元，包括：多个多层陶瓷电容器，其厚度TMLCC等于或类似于宽度WMLCC; 以及包括多个存储空间的包装纸，所述电容器存储在所述存储空间中，并且每个电容器的内部电极基本上与所述存储空间的底部平行。相关方法包括：通过传送单元将具有与宽度WMLCC相等或类似的厚度TMLCC的多个多层陶瓷电容器传送; 向电容器的一侧供给磁场，使得电容器的内部电极基本上平行于转印单元的底部; 以及将所述多层陶瓷电容器存储在包装薄片的收纳空间中，使得所述电容器的内部电极基本上与所述收容空间的底部平行。

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