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    • 91. 发明申请
    • Multi-ISP controlled access to IP networks, based on third-party operated untrusted access stations
    • 基于第三方操作的不受信任的接入站,多ISP控制的IP网络访问
    • US20020138635A1
    • 2002-09-26
    • US10057914
    • 2002-01-29
    • NEC USA, INC.
    • Jens-Peter RedlichThomas KuehnelWolf Mueller
    • G06F015/16H04L009/32G06F011/30G06F012/14H04L009/00
    • H04L63/0442H04L12/2856H04L12/2898H04L63/062H04L63/0869
    • A mechanism that allows sharing of an existing infrastructure for access to public or private IP networks, such as the public Internet or private LANs is provided. Specifically, infrastructure owners lease the infrastructure resources on a short-term basis to different Internet Service Providers (ISPs). An ISP uses these resources to provide Internet services to subscribing customers or users. The ISP controls all aspects of the Internet service provided to the subscriber, including billing, bandwidth management, and e-mail. The ISP also ensures privacy for the subscriber by means of encryption. Leasing network resources from an existing network infrastructure frees the ISP from building an expensive access infrastructure itself while the infrastructure owner is given an opportunity to generate additional revenue from infrastructure. Importantly, neither the user, nor the ISP need to trust the access station (i.e.: the access station is untrusted) through which the access to the IP network is accomplished.
    • 提供了允许共享用于访问公共或专用IP网络(例如公共因特网或专用LAN)的现有基础设施的机制。 具体来说,基础架构所有者将短期基础设施资源租给不同的互联网服务提供商(ISP)。 ISP使用这些资源为订阅客户或用户提供互联网服务。 ISP控制提供给用户的互联网服务的所有方面,包括计费,带宽管理和电子邮件。 ISP还通过加密确保用户的隐私。 从现有网络基础设施租用网络资源可以让ISP免于构建昂贵的接入基础架构本身,而基础架构所有者则有机会从基础架构中获得额外收入。 重要的是,用户和ISP都不需要信任访问IP网络的接入站(即:接入站不受信任)。
    • 92. 发明授权
    • Method for verification of RTL generated from scheduled behavior in a
high-level synthesis flow
    • 用于验证在高级合成流程中由计划行为产生的RTL的方法
    • US6163876A
    • 2000-12-19
    • US187927
    • 1998-11-06
    • Pranav AsharSubhrajit BhattacharyaAnand RaghunathanAkira Mukaiyama
    • Pranav AsharSubhrajit BhattacharyaAnand RaghunathanAkira Mukaiyama
    • G06F17/50
    • G06F17/504
    • A complete procedure for verifying register-transfer logic against its scheduled behavior in a high-level synthesis environment is provided. A new method that is both complete and practical for verification is provided. Hardware verification is known to be a hard problem and the proposed verification technique leverages off the fact that high-level synthesis--performed manually or by means of high-level synthesis software--proceeds from the algorithmic description of the design to structural RTL through a sequence of very well defined steps, each limited in its scope. Equivalence checking task is partitioned into two simpler subtasks, verifying the validity of register sharing, and verifying correct synthesis of the RYL interconnect and control. While state space traversal is unavoidable for verifying validity of the register sharing, irrelevant portions of the design are automatically abstracted out, significantly simplifying the task that must be performed by a back-end model checker.
    • 提供了一种在高级合成环境中验证寄存器传输逻辑与其调度行为的完整过程。 提供了一种完整和实用的验证方法。 已知硬件验证是一个困难的问题,并且所提出的验证技术利用了手动或通过高级合成软件执行的高级合成 - 从设计的算法描述到结构化RTL的顺序 非常明确的步骤,每个都限于其范围。 等效检查任务分为两个简单的子任务,验证寄存器共享的有效性,验证RYL互连和控制的正确合成。 虽然状态空间遍历对于验证寄存器共享的有效性是不可避免的,但是设计的不相关部分被自动抽出,从而显着简化了后端模型检查器必须执行的任务。
    • 94. 发明授权
    • Identification and test generation for primitive faults
    • 原始故障的识别和测试生成
    • US6018813A
    • 2000-01-25
    • US837561
    • 1997-04-21
    • Srimat T. ChakradharKwang-Ting ChengAngela Krstic
    • Srimat T. ChakradharKwang-Ting ChengAngela Krstic
    • G01R31/3183G01R31/28
    • G01R31/318328G01R31/318378
    • A method to identify and test primitive faults in combinational circuits described as multi-level or two-level netlists. A primitive fault is a multiple path delay for which none of the single paths contained in the fault is robustly or non-robustly testable while the presence of the fault will degrade the circuit performance. Identification and testing of primitive faults is important for at least two reasons: (1) a large percentage of paths in production circuits remain untestable under the single-path delay fault model, (2) distributed manufacturing defects usually adversely affect more than one path and these defects can be detected only by analyzing multiple affected paths. The single-path delay faults contained in a primitive fault have to merge at some gate(s). The methodology for identifying primitive faults can quickly (1) rule out a large number of gates as possible merging points for primitive faults, and (2) reduce or prune the combination of paths that can never belong to any primitive fault. The procedure for identifying a primitive fault also produces a test for the fault. A complete algorithm is presented for identifying and testing double path delay faults. A similar procedure can be used to identify primitive faults consisting of three or more paths. Experimental results on several multi-level combinational benchmark circuits are included to demonstrate the usefulness and efficiency of the technique.
    • 一种识别和测试组合电路中原始故障的方法,描述为多层次或两层网络表。 原始故障是多路径延迟,其中包含在故障中的单个路径不是鲁棒地或不可靠地测试,而故障的存在将降低电路性能。 原始故障的识别和测试对于至少两个原因至关重要:(1)在单路延迟故障模型下,生产电路中大部分路径仍然不可测,(2)分布式制造缺陷通常会对多于一条路径造成不利影响, 这些缺陷只能通过分析多个受影响的路径来检测。 包含在原始故障中的单路延迟故障必须在某些门处合并。 识别原始故障的方法可以快速(1)排除大量门作为原始故障的可能合并点,(2)减少或修剪永远不会属于任何原始故障的路径组合。 识别原始故障的过程也会对故障进行测试。 提出了一种用于识别和测试双路径延迟故障的完整算法。 可以使用类似的过程来识别由三个或更多个路径组成的原始故障。 包括几个多级组合基准电路的实验结果,以证明该技术的有用性和效率。
    • 96. 发明授权
    • Method for testing asynchronous circuits
    • 异步电路测试方法
    • US5958077A
    • 1999-09-28
    • US579387
    • 1995-12-27
    • Savita BanerjeeSrimat T. ChakradharRabindra K. Roy
    • Savita BanerjeeSrimat T. ChakradharRabindra K. Roy
    • G01R31/28G01R31/3185G06F11/22G06F17/50G06F11/00
    • G01R31/318522
    • A synchronous test model (STM) and corresponding method capture the essential behavior of an asynchronous circuit under test. During operation of the method, (1) An STM for the asynchronous circuit is constructed assuming either a user-specified cycle length or an estimated cycle length; (2) a target fault list is created containing only faults in the asynchronous circuit, (3) test patterns are generated from the STM using a synchronous test generator; (4) the test patterns are translated into test sequences for the asynchronous circuit; and (5) the translated patterns are validated by fault simulation on the asynchronous circuit. The STM offers numerous advantages over prior art methods namely, (1) synchronous, sequential test generation techniques can be used to generate tests for the model, (2) tests generated for the STM can always be translated into tests for the asynchronous circuit under test, and (3) these tests will not suffer from test invalidation due to unstable states, because the STM enforces a fundamental mode of operation during test generation. Experimental results on several benchmarks show that the STM method generates high fault coverage tests with no test invalidation.
    • 同步测试模型(STM)和相应的方法捕获了被测异步电路的基本行为。 在该方法的操作期间,(1)异步电路的STM构造为假定用户指定的周期长度或估计周期长度; (2)创建仅包含异步电路中的故障的目标故障列表,(3)使用同步测试发生器从STM生成测试模式; (4)将测试模式转换为异步电路的测试序列; 和(5)通过异步电路的故障模拟来验证转换后的模式。 STM提供了超过现有技术方法的许多优点,即(1)同步,顺序测试生成技术可用于生成模型测试,(2)为STM生成的测试总是可以转化为待测异步电路的测试 ,(3)由于STM在测试生成期间执行基本的操作模式,所以这些测试不会由于状态不稳定而导致测试无效。 几个基准的实验结果表明,STM方法产生高故障覆盖测试,无测试无效。
    • 97. 发明授权
    • Side emitting optical fiber
    • 侧发光纤
    • US5905837A
    • 1999-05-18
    • US898665
    • 1997-07-22
    • Ting WangKojiro Watanabe
    • Ting WangKojiro Watanabe
    • G02B6/00G02B6/02G02B6/028G02B6/28G02B6/42
    • G02B6/2817G02B6/0001G02B6/4298
    • An optical fiber that controllably taps and distributes light propagating through an the optical fiber that comprises an optical fiber having multiple regions each having a different index of refraction from one another such that when light traverses the optical fiber along a length it travels from a region of one index of refraction to another region having a different index of refraction the light is sufficiently deflected such that it is distributed out a side of the optical fiber along its length. In a preferred embodiment, at point in the length of the fiber where a change in index of refraction occurs, light traversing the fiber is efficiently diverted out of the optical fiber through the side of the fiber. The light so diverted alternatively is refracted by one or more refractive regions, and alternatively focused by prism films applied to the exit side of the fiber where it may then be put to an advantageous use.
    • 一种光纤,其可控制地抽出并分布通过光纤传播的光,所述光纤包括具有多个区域的光纤,所述光纤具有彼此具有不同折射率的多个区域,使得当光沿着长度从所述光纤穿过所述光纤时, 一个折射率到具有不同折射率的另一区域,光被充分地偏转,使得其沿其长度分布在光纤的一侧。 在优选实施例中,在发生折射率变化的光纤长度的点处,穿过光纤的光被光纤的侧面有效地转移出光纤。 被这样转移的光被一个或多个折射区域折射,或者通过施加到纤维出射侧的棱镜膜聚焦,然后将其放在有利的用途上。
    • 98. 发明授权
    • Method for internet protocol switching over fast ATM cell transport
    • 互联网协议切换快速ATM信元传输的方法
    • US5903559A
    • 1999-05-11
    • US771559
    • 1996-12-20
    • Arup AcharyaRajiv Dighe
    • Arup AcharyaRajiv Dighe
    • H04Q3/00H04L12/46H04L12/56H04Q11/04H04J3/24
    • H04L12/4608H04Q11/0478H04L2012/562H04L2012/5667
    • A method for transporting Internet Protocols (IP's) over an Asynchronous Transfer Mode (ATM) network that exhibits the strengths of ATM, namely packet interleaving (using cell-based transport) with Quality of Service support for connection-oriented traffic (such as multiclass native ATM traffic and flows-based IP traffic using RSVP), while optimizing the connectionless requirements of existing IP traffic. Advantageously, both the IP protocol stack and ATM protocol stack operate as peers over ATM cell transport hardware. The method exploits an "implicit" signaling/control phase characteristic of IP traffic/protocols thereby minimizing setup. The implicit signaling phase is used to map a flow from a routed path to a switched path immediately upon transmission of a first packet. Similarly, particular packets may be immediately transported over the routed path even after establishment of the switched path. This mapping from the routed path to the switched path and vice versa is based upon the structure/semantics of the protocol driving the flow and not just the duration of the flow as done with prior-art methods. Consequently, while prior-art methods require cell-level counters to monitor activity (or lack thereof) for switching state, the method uses explicit control messages and soft-state at the IP level (as opposed to the cell level) to do the same. Advantageously, the method imposes no switching overhead as there is no coordination between neighboring nodes when a flow is moved from the routed path to the switched path.
    • 一种通过异步传输模式(ATM)网络传输互联网协议(IP)的方法,该异步传输模式(ATM)网络展现了ATM的优势,即具有服务质量的数据包交织(使用基于单元的传输),支持面向连接的流量(如多类本机 ATM流量和基于流量的IP流量使用RSVP),同时优化现有IP流量的无连接要求。 有利地,IP协议栈和ATM协议栈都作为ATM信元传输硬件上的对等体来操作。 该方法利用IP流量/协议的“隐含”信令/控制阶段特性,从而最小化安装。 隐式信令阶段用于在传输第一分组时立即将来自路由路径的流映射到交换路径。 类似地,即使在建立切换路径之后,特定分组也可以立即通过路由路径传送。 从路由路径到交换路径的映射,反之亦然是基于驱动流程的协议的结构/语义,而不仅仅是流程的持续时间,如现有技术的方法所完成的。 因此,虽然现有技术方法要求小区级计数器监视切换状态的活动(或不存在),该方法使用显式控制消息和IP级(与小区级相反)的软状态来进行相同 。 有利地,该方法不施加切换开销,因为当流从路由路径移动到切换路径时,相邻节点之间没有协调。