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1. 发明授权

US5987636A Static test sequence compaction using two-phase restoration and segment manipulation 有权
标题翻译：使用两相恢复和段操作的静态测试序列压实
公开(公告)号：US5987636A
公开(公告)日：1999-11-16
申请号：US135561
申请日：1998-08-18
申请人： Surendra K. Bommu , Srimat T. Chakradhar , Kiran B. Doreswamy
发明人： Surendra K. Bommu , Srimat T. Chakradhar , Kiran B. Doreswamy
IPC分类号： G01R31/3183 , H04W64/00 , G01R31/28
CPC分类号： H04W64/00 , G01R31/318371
摘要： A technique for static compaction of test sequences is described. The method for static compaction according to the present invention includes two key features: (1) two-phase vector restoration, and (2) identification, pruning, and re-ordering of segments. Segments partition the compaction problem into sub-problems. Segments are identified, dynamically pruned and re-ordered to achieve further compaction and speed up.
摘要翻译：描述了测试序列的静态压缩技术。根据本发明的静态压实方法包括两个关键特征：（1）两相矢量恢复，以及（2）段的识别，修剪和重新排序。分段将压实问题分解为子问题。识别段，动态修剪并重新排序，以实现进一步的压实和加速。

2. 发明授权

US06223316B1 Vector restoration using accelerated validation and refinement 失效
标题翻译：矢量恢复使用加速验证和细化
公开(公告)号：US06223316B1
公开(公告)日：2001-04-24
申请号：US09112945
申请日：1998-07-10
申请人： Surendra K. Bommu , Srimat T. Chakradhar , Kiran B. Doreswamy
发明人： Surendra K. Bommu , Srimat T. Chakradhar , Kiran B. Doreswamy
IPC分类号： G06F1100
CPC分类号： G01R31/318371 , G01R31/318392
摘要： A two phase vector restoration technique which extracts a minimal subsequence from a sequence that detects a chosen set of faults is provided. The disclosed vector restoration technique is useful in static compaction of test sequences and in fault diagnosis. An accelerated two phase vector restoration that provides further improvement is also provided. The present invention is a significant improvement over the state of the art in the following ways: (1) a sequence of length n can be restored with only O(n log2n) simulations while known approaches require simulation of O(n2) vectors, (2) a two-step restoration process is used that makes vector restoration practical for large designs, and (3) restoration process for several faults is overlapped to provide significant acceleration in vector restoration. The described vector restoration technique has been integrated into a static test sequence compaction system.
摘要翻译：提供了从检测所选择的一组故障的序列中提取最小子序列的两相矢量恢复技术。所公开的载体恢复技术在测试序列的静态压缩和故障诊断中是有用的。还提供了进一步改进的加速两相矢量恢复。本发明以下列方式是对现有技术的显着改进：（1）只有O（n log2n）模拟可以恢复长度为n的序列，而已知方法需要模拟O（n2）向量， 2）使用两步恢复过程，使得矢量恢复对于大型设计是可行的，（3）多个故障的恢复过程重叠，在矢量恢复中提供显着的加速。所描述的矢量恢复技术已被整合到静态测试序列压实系统中。

3. 发明授权

US06467058B1 Segmented compaction with pruning and critical fault elimination 失效
标题翻译：分段压实与修剪和关键故障消除
公开(公告)号：US06467058B1
公开(公告)日：2002-10-15
申请号：US09389590
申请日：1999-09-03
申请人： Srimat T. Chakradhar , Surendra K. Bommu , Kiran B. Doreswamy
发明人： Srimat T. Chakradhar , Surendra K. Bommu , Kiran B. Doreswamy
IPC分类号： G06F1100
CPC分类号： G01R31/318335 , G01R31/318342
摘要： A method of generating a vector set, said vector set being used for testing sequential circuits. The method comprises selecting a plurality of fault models, identifying a fault list each for each of said plurality of fault models, identifying a vector set each for each of said fault lists, selecting a tolerance limit each for each of said fault lists, thereby each fault model having an associated fault list, an associated vector set and an associated tolerance limit, compacting each of said vector set such that the compacted vector set identifies all the faults in the associated fault list or a drop in fault list coverage is within the associated tolerance limit; and creating a vector set by combining all vector sets compacted. A system and a computer program product for testing circuits with a compacted vector set where the compacted vector set is created by dropping faults based on a tolerance limit.
摘要翻译：一种产生矢量集的方法，所述矢量集用于测试时序电路。所述方法包括：选择多个故障模型，识别每个所述多个故障模型中的每个故障模型的故障列表，识别每个所述故障列表中的每一个的向量集，为每个所述故障列表选择容差限制，具有相关联的故障列表的故障模型，相关联的向量集合和相关联的容限限制，压缩所述向量集合中的每一个，使得压缩向量集识别相关联的故障列表中的所有故障，或故障列表覆盖范围内的丢失在相关联的公差极限并通过组合所有压缩的矢量集创建一个矢量集。一种用于测试具有压缩向量集的电路的系统和计算机程序产品，其中通过基于公差极限丢弃故障来创建压缩矢量集。

4. 发明授权

US06378096B1 On-line partitioning for sequential circuit test generation 有权
标题翻译：在线划分用于顺序电路测试生成
公开(公告)号：US06378096B1
公开(公告)日：2002-04-23
申请号：US09389591
申请日：1999-09-03
申请人： Srimat T. Chakradhar , Kiran B. Doreswamy , Surendra K. Bommu , Xijiang Lin
发明人： Srimat T. Chakradhar , Kiran B. Doreswamy , Surendra K. Bommu , Xijiang Lin
IPC分类号： G06F1100
CPC分类号： G01R31/318392
摘要： A method of solving a test generation problem for sequential circuits is disclosed. The method comprises recursively dividing an original test generation problem into smaller problems, wherein said sub-problems may be dependent while one or more of said dependent sub-problems may have solution-specific independence, finding solutions for said sub-problems, reusing solutions for dependent sub-problems, whenever the dependent sub-problems enjoy solution-specific independence; and identifying a minimal subset of conflicting objectives if a sub-problem that has to be solved to achieve multiple objectives has no solution. A test generation system comprising a computer, said computer having a cpu and memory, said memory comprising instructions capable of implementing components of said system. The components comprise a test generation problem solver that recursively solves test generation problems wherein solutions for sub-problems are reused, a problem partitioner that receives test generation problems and partitions said test generation problems into sub-problems wherein said sub-problems may be dependent and wherein said sub-problems may have solution-specific dependence, a consistent label checker that receives the test generation problem from the problem solver and determined if there is consistent labeling, a partition merger that merges a subset of sub-problems if no solution exists for said subset of sub-problems and if said subset of sub-problems are dependent and a conflict set generator that generates a conflict set of objectives that prevents a specific sub-problem from having a solution.
摘要翻译：公开了一种解决时序电路的测试生成问题的方法。该方法包括将原始测试生成问题递归地划分为更小的问题，其中所述子问题可以是依赖的，而一个或多个所述从属子问题可以具有解决方案的独立性，为所述子问题找到解决方案，依赖子问题，每当依赖子问题享受解决独立性时; 并且如果必须解决以实现多个目标的子问题没有解决方案，则确定冲突目标的最小子集。一种测试生成系统，包括计算机，所述计算机具有cpu和存储器，所述存储器包括能够实现所述系统的组件的指令。这些组件包括一个测试生成问题解决者，其递归地解决其中重复使用用于子问题的解决方案的测试生成问题，接收测试生成问题的问题分割器，并将所述测试生成问题划分为子问题，其中所述子问题可以是依赖性的，其中所述子问题可以具有解决方案依赖性，一致的标签检查器，其从问题求解器接收测试生成问题并且确定是否存在一致的标签;如果没有解决方案存在的话，则合并子问题子集的分区合并所述子问题的子集以及所述子问题子集是否依赖，以及冲突集生成器，其产生阻止特定子问题获得解决方案的冲突目标集。

5. 发明申请

US20110239195A1 DEPENDENCE-BASED SOFTWARE BUILDS 审中-公开
标题翻译：基于依赖的软件构建
公开(公告)号：US20110239195A1
公开(公告)日：2011-09-29
申请号：US12732100
申请日：2010-03-25
申请人： Zheng Lin , Michael L. Rowand, JR. , Jonathan M. Class , Kiran B. Doreswamy , Om K. Sharma
发明人： Zheng Lin , Michael L. Rowand, JR. , Jonathan M. Class , Kiran B. Doreswamy , Om K. Sharma
IPC分类号： G06F9/44
CPC分类号： G06F8/71
摘要： Dependence-based software builds are described. In embodiments, authored source code is received as inputs to a computer device to develop a buildable unit of a software build project. The software build project includes multiple buildable units that can be allocated for independent development among multiple developers, such as at computer devices local to each developer. At the computer device, dependent buildable units are identified that have a dependency relationship with the buildable unit for execution. The authored source code of the buildable unit is then validated to determine that the buildable unit executes with the dependent buildable units for error-free execution before the buildable unit is subsequently provided to a software build service that compiles the multiple buildable units to generate the software build project.
摘要翻译：描述了基于依赖的软件构建。在实施例中，创作的源代码作为输入被接收到计算机设备以开发软件构建项目的可构建单元。软件构建项目包括可以分配给多个开发人员之间的独立开发的多个可构建单元，例如每个开发人员本地的计算机设备。在计算机设备处，识别与可构建单元具有依赖关系以进行执行的可依赖的可构建单元。然后验证可构建单元的创作源代码，以确定可构建单元在依赖可构建单元之前执行以实现无差错执行，然后可构建单元随后提供给编译多个可构建单元以生成软件的软件构建服务建设项目。

6. 发明授权

US07149675B2 System and method for automatically mapping state elements for equivalence verification 失效
公开(公告)号：US07149675B2
公开(公告)日：2006-12-12
申请号：US09802616
申请日：2001-03-09
申请人： Yatin V. Hoskote , Kiran B. Doreswamy
发明人： Yatin V. Hoskote , Kiran B. Doreswamy
IPC分类号： G06F17/50
CPC分类号： G06F17/504
摘要： A method for automatically mapping state elements between a first circuit and a second circuit is described. The method proceeds by comparing, in a structural phase, structural features of state elements in the first circuit to structural features of state elements in the second circuit for equivalence. Mappings between state elements of the first circuit and the second circuit are determined based on the comparison of structural features. “Don't care” input conditions are then accounted for prior to determination of functional features. During an inversion detection phase, the polarity of the mappings found in the prior structural phase are determined. A functional phase follows in which the functionality of state elements in the first circuit are compared to the functionality of state elements in the second circuit for equivalence using a three-valued random simulation and further mappings are determined based upon the functional comparison.

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