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1. 发明授权

US08481373B2 Method for manufacturing thin film transistor substrate 有权
标题翻译：薄膜晶体管基板的制造方法
公开(公告)号：US08481373B2
公开(公告)日：2013-07-09
申请号：US13383220
申请日：2010-03-16
申请人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
发明人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
IPC分类号： H01L21/336
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/42384
摘要： A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode (11a) and a first interconnect on a substrate (10), a step of forming a gate insulating film (12a) having a contact hole at a position overlapping the first interconnect, a step of forming a source electrode (13a) and a drain electrode (13b) overlapping the gate electrode (11a) and separated apart from each other, and a second interconnect connected via the contact hole to the first interconnect, a step of successively forming an oxide semiconductor film (14) and a second insulating film (15), and thereafter, patterning the second insulating film (15) to form an interlayer insulating film (15a), and a step of reducing the resistance of the oxide semiconductor film (14) exposed through the interlayer insulating film (15a) to form a pixel electrode (14b).
摘要翻译：制造薄膜晶体管基板的方法包括在基板（10）上形成栅极（11a）和第一布线的步骤，在重叠的位置形成具有接触孔的栅极绝缘膜（12a）的步骤所述第一互连，形成与所述栅电极（11a）重叠并分离的源电极（13a）和漏电极（13b）的步骤，以及经由所述接触孔与所述第一互连件连接的第二互连件，连续地形成氧化物半导体膜（14）和第二绝缘膜（15）的步骤，然后对第二绝缘膜（15）进行图案化以形成层间绝缘膜（15a），并且降低氧化物半导体膜（14）通过层间绝缘膜（15a）露出以形成像素电极（14b）。

2. 发明申请

US20120108018A1 METHOD FOR MANUFACTURING THIN FILM TRANSISTOR SUBSTRATE 有权
标题翻译：制造薄膜晶体管基板的方法
公开(公告)号：US20120108018A1
公开(公告)日：2012-05-03
申请号：US13383220
申请日：2010-03-16
申请人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
发明人： Tohru Okabe , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara
IPC分类号： H01L21/336
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/1225 , H01L27/124 , H01L27/1248 , H01L29/42384
摘要： A method for manufacturing a thin film transistor substrate includes a step of forming a gate electrode (11a) and a first interconnect on a substrate (10), a step of forming a gate insulating film (12a) having a contact hole at a position overlapping the first interconnect, a step of forming a source electrode (13a) and a drain electrode (13b) overlapping the gate electrode (11a) and separated apart from each other, and a second interconnect connected via the contact hole to the first interconnect, a step of successively forming an oxide semiconductor film (14) and a second insulating film (15), and thereafter, patterning the second insulating film (15) to form an interlayer insulating film (15a), and a step of reducing the resistance of the oxide semiconductor film (14) exposed through the interlayer insulating film (15a) to form a pixel electrode (14b).
摘要翻译：制造薄膜晶体管基板的方法包括在基板（10）上形成栅极（11a）和第一布线的步骤，在重叠的位置形成具有接触孔的栅极绝缘膜（12a）的步骤所述第一互连，形成与所述栅电极（11a）重叠并分离的源电极（13a）和漏电极（13b）的步骤，以及经由所述接触孔与所述第一互连件连接的第二互连件，连续地形成氧化物半导体膜（14）和第二绝缘膜（15）的步骤，然后对第二绝缘膜（15）进行图案化以形成层间绝缘膜（15a），并且降低氧化物半导体膜（14）通过层间绝缘膜（15a）露出以形成像素电极（14b）。

3. 发明授权

US08829513B2 Oxide semiconductor including Ga, In, Zn, and O and A thin film transistor and a display with the oxide semiconductor including Ga, In, Zn, and O 有权
标题翻译：包括Ga，In，Zn和O和A薄膜晶体管的氧化物半导体和具有包括Ga，In，Zn和O的氧化物半导体的显示器
公开(公告)号：US08829513B2
公开(公告)日：2014-09-09
申请号：US13391638
申请日：2010-03-29
申请人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L27/12 , H01L29/786 , H01L27/32 , H01L33/00 , G02F1/1368
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/3258 , H01L33/0041
摘要： The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01≦Zn/(In+Zn)≦0.22.
摘要翻译：本发明提供实现电性能和工艺电阻优异的TFT的氧化物半导体，包括由氧化物半导体形成的沟道层的TFT以及配备有TFT的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，其中氧化物半导体包含Ga（镓），In（铟），Zn（锌）和O（氧）作为构成原子，氧化物半导体 Zn原子组成满足0.01＆nlE; Zn /（In + Zn）＆nlE; 0.22。

4. 发明申请

US20120218485A1 ACTIVE MATRIX SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL INCLUDING THE SAME, AND METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE 有权
标题翻译：有源矩阵基板和包括其的液晶显示面板以及制造有源矩阵基板的方法
公开(公告)号：US20120218485A1
公开(公告)日：2012-08-30
申请号：US13501534
申请日：2010-07-26
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： G02F1/136 , H01L33/08 , H01L29/786
CPC分类号： H01L27/1255 , G02F1/136213 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
摘要翻译：有源矩阵基板包括以矩阵形式布置的多个像素，多个电容线（11b），其中像素彼此排列并且彼此平行的方向中的一个方向延伸;多个TFT（5），一个用于每个像素，覆盖TFT（5）的保护膜（16a），在保护膜（16a）上以矩阵布置并连接到相应的TFT（5）的多个像素电极（18a）和多个辅助电容器（6），每个像素一个。每个辅助电容器（6）包括相应的电容器线（11b），对应的像素电极（18a）和相应的电容器线（11b）和相应的像素电极（18a）之间的保护膜（16a）。

5. 发明申请

US20120199891A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120199891A1
公开(公告)日：2012-08-09
申请号：US13499960
申请日：2010-10-04
申请人： Masahiko Suzuki , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Tetsuya Aita , Okifumi Nakagawa , Takeshi Hara
发明人： Masahiko Suzuki , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Tetsuya Aita , Okifumi Nakagawa , Takeshi Hara
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7869 , G02F1/1368 , H01L29/66969 , H01L29/78606
摘要： A semiconductor device includes: a gate electrode (3) arranged on a substrate (1); a gate insulating layer (5) deposited over the gate electrode (3); an island of an oxide semiconductor layer (7) formed on the gate insulating layer (5) and including a channel region (7c) and first and second contact regions (7s, 7d) located on right- and left-hand sides of the channel region (7c); a source electrode (11) electrically connected to the first contact region (7s); a drain electrode (13) electrically connected to the second contact region (7d); and a protective layer (9) which is arranged on, and in contact with, the oxide semiconductor layer (7). The protective layer (9) covers the channel region (7c) on the surface of the oxide semiconductor layer (7), the sidewalls (7e) thereof located in a channel width direction with respect to the channel region (7c), and other portions (7f) thereof between the channel region (7c) and the sidewalls (7e). As a result, the hysteresis characteristic of a TFT that uses an oxide semiconductor can be improved and its reliability can be increased.
摘要翻译：半导体器件包括：布置在衬底（1）上的栅电极（3）; 沉积在栅电极（3）上的栅极绝缘层（5）; 形成在所述栅极绝缘层（5）上并且包括沟道区（7c）的氧化物半导体层（7）的岛和位于所述沟道的右侧和左侧的第一和第二接触区（7s，7d）区域（7c）; 电连接到第一接触区域（7s）的源电极（11）; 电连接到第二接触区域（7d）的漏电极（13）; 以及设置在所述氧化物半导体层（7）上并与所述氧化物半导体层（7）接触的保护层（9）。保护层（9）覆盖氧化物半导体层（7）的表面上的沟道区域（7c），其侧壁（7e）相对于沟道区域（7c）位于沟道宽度方向，其它部分（7f）之间的沟道区域（7f）。结果，可以提高使用氧化物半导体的TFT的滞后特性，并且可以提高其可靠性。

6. 发明申请

US20120091452A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR ARRAY SUBSTRATE AND PRODUCTION METHOD THEREOF, AND DISPLAY DEVICE 有权
标题翻译：氧化物半导体，薄膜晶体管阵列基板及其制造方法及显示装置
公开(公告)号：US20120091452A1
公开(公告)日：2012-04-19
申请号：US13377824
申请日：2010-03-10
申请人： Yoshifumi Ohta , Go Mori , Hirohiko Nishiki , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Takeshi Hara
发明人： Yoshifumi Ohta , Go Mori , Hirohiko Nishiki , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Takeshi Hara
IPC分类号： H01L29/786 , H01L21/34
CPC分类号： H01L29/22 , G02F1/1368 , G02F2202/10 , H01L21/02554 , H01L21/02565 , H01L21/02631 , H01L29/45 , H01L29/4908 , H01L29/66742 , H01L29/66969 , H01L29/7869
摘要： The present invention provides an oxide semiconductor capable of achieving a thin film transistor having stable transistor characteristics, a thin film transistor having a channel layer formed of the oxide semiconductor and a production method thereof, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor. The oxide semiconductor includes indium, gallium, zinc, and oxygen as constituent atoms, and the oxygen content of the oxide semiconductor is 87% to 95% of the stoichiometric condition set as 100%, in terms of atomic units.
摘要翻译：本发明提供一种能够实现具有稳定晶体管特性的薄膜晶体管的氧化物半导体，具有由氧化物半导体形成的沟道层的薄膜晶体管及其制造方法，以及配备有该薄膜晶体管的显示装置。本发明的氧化物半导体是薄膜晶体管的氧化物半导体。氧化物半导体包括铟，镓，锌和氧作为构成原子，并且氧化物半导体的氧含量为化学计量条件的87％至95％，以原子单位计为100％。

7. 发明授权

US09024311B2 Thin film transistor, method for manufacturing same, active matrix substrate, display panel and display device 有权
标题翻译：薄膜晶体管，制造方法，有源矩阵基板，显示面板和显示装置
公开(公告)号：US09024311B2
公开(公告)日：2015-05-05
申请号：US13379670
申请日：2010-04-06
申请人： Takeshi Hara , Hirohiko Nishiki , Yoshimasa Chikama , Kazuo Nakagawa , Yoshifumi Ohta , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Yoshiyuki Miyajima , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Takeshi Hara , Hirohiko Nishiki , Yoshimasa Chikama , Kazuo Nakagawa , Yoshifumi Ohta , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Yoshiyuki Miyajima , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336 , H01L27/12
CPC分类号： H01L27/1288 , H01L27/1225 , H01L29/7869
摘要： The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.
摘要翻译：本发明提供了一种薄膜晶体管，其包括用于电连接信号电极（6a）和漏电极（7a）的氧化物半导体层（4），所述氧化物半导体层由氧化物半导体制成; 以及由选自Ti，Mo，W，Nb，Ta，Cr，氮化物中的至少一种及其合金制成的阻挡层（6b），阻挡层（6b）与信号电极（6a）和氧化物半导体层（4），并且将信号电极（6a）与氧化物半导体层（4）分离。由于这种结构，薄膜晶体管可以在第一电极和沟道层之间形成并保持欧姆接触，从而成为具有良好性能的薄膜晶体管。

8. 发明授权

US09177974B2 Active matrix substrate and liquid crystal display panel including the same, and method for manufacturing active matrix substrate with gate insulating film not provided where auxiliary capacitor is provided 有权
标题翻译：有源矩阵基板和包括该基板的有源矩阵基板和液晶显示面板的制造方法以及不提供辅助电容器的栅极绝缘膜制造有源矩阵基板的方法
公开(公告)号：US09177974B2
公开(公告)日：2015-11-03
申请号：US13501534
申请日：2010-07-26
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuiji Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： G02F1/1343 , G02F1/1333 , G02F1/136 , H01L27/12 , G02F1/1362
CPC分类号： H01L27/1255 , G02F1/136213 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
摘要翻译：有源矩阵基板包括以矩阵形式布置的多个像素，多个电容线（11b），其中像素彼此排列并且彼此平行的方向中的一个方向延伸;多个TFT（5），一个用于每个像素，覆盖TFT（5）的保护膜（16a），在保护膜（16a）上以矩阵布置并连接到相应的TFT（5）的多个像素电极（18a）和多个辅助电容器（6），每个像素一个。每个辅助电容器（6）包括相应的电容器线（11b），对应的像素电极（18a）和相应的电容器线（11b）和相应的像素电极（18a）之间的保护膜（16a）。

9. 发明授权

US08685803B2 Semiconductor device and method for producing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08685803B2
公开(公告)日：2014-04-01
申请号：US13514081
申请日：2010-12-03
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L21/00
CPC分类号： H01L27/1225 , G02F1/13458 , G02F1/136213 , H01L27/124 , H01L27/1244 , H01L27/1248
摘要： A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion. The second connecting portion is in contact with the first connecting portion within a first opening (11c) provided in the first and second insulating films; the third connecting portion (19c) is in contact with the second connecting portion within a second opening (17c) provided in the passivation film; and the second connecting portion (13c) covers end faces of the first and second insulating films within the first opening (11c), but does not cover an end face of the passivation film (15) within the second opening (17c). As a result, the taper shape of a contact hole of the terminal portion can be controlled with a high precision.
摘要翻译：半导体器件包括：具有栅极线（3a），第一绝缘膜（5），岛状氧化物半导体层（7a），第二绝缘膜（9），源极线（13as））的薄膜晶体管，，漏电极（13ad）和钝化膜; 以及具有由与栅极线相同的导电膜制成的第一连接部分（3c）的端子部分，由与源极线和漏极电极相同的导电膜制成的第二连接部分（13c）和第三连接部分（19c）形成在第二连接部分上。第二连接部分在设置在第一和第二绝缘膜中的第一开口（11c）内与第一连接部分接触; 所述第三连接部分（19c）在设置在所述钝化膜中的第二开口（17c）内与所述第二连接部分接触; 并且所述第二连接部分（13c）覆盖所述第一开口（11c）内的所述第一绝缘膜和所述第二绝缘膜的端面，但不覆盖所述第二开口（17c）内的所述钝化膜（15）的端面。结果，可以高精度地控制端子部分的接触孔的锥形形状。

10. 发明申请

US20120241750A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120241750A1
公开(公告)日：2012-09-27
申请号：US13514081
申请日：2010-12-03
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1225 , G02F1/13458 , G02F1/136213 , H01L27/124 , H01L27/1244 , H01L27/1248
摘要： A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion. The second connecting portion is in contact with the first connecting portion within a first opening (11c) provided in the first and second insulating films; the third connecting portion (19c) is in contact with the second connecting portion within a second opening (17c) provided in the passivation film; and the second connecting portion (13c) covers end faces of the first and second insulating films within the first opening (11c), but does not cover an end face of the passivation film (15) within the second opening (17c). As a result, the taper shape of a contact hole of the terminal portion can be controlled with a high precision.
摘要翻译：半导体器件包括：具有栅极线（3a），第一绝缘膜（5），岛状氧化物半导体层（7a），第二绝缘膜（9），源极线（13as））的薄膜晶体管，，漏电极（13ad）和钝化膜; 以及具有由与栅极线相同的导电膜制成的第一连接部分（3c）的端子部分，由与源极线和漏极电极相同的导电膜制成的第二连接部分（13c）和第三连接部分（19c）形成在第二连接部分上。第二连接部分在设置在第一和第二绝缘膜中的第一开口（11c）内与第一连接部分接触; 所述第三连接部分（19c）在设置在所述钝化膜中的第二开口（17c）内与所述第二连接部分接触; 并且所述第二连接部分（13c）覆盖所述第一开口（11c）内的所述第一和第二绝缘膜的端面，但不覆盖所述第二开口（17c）内的所述钝化膜（15）的端面。结果，可以高精度地控制端子部分的接触孔的锥形形状。

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