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1. 发明授权

US08829513B2 Oxide semiconductor including Ga, In, Zn, and O and A thin film transistor and a display with the oxide semiconductor including Ga, In, Zn, and O 有权
标题翻译：包括Ga，In，Zn和O和A薄膜晶体管的氧化物半导体和具有包括Ga，In，Zn和O的氧化物半导体的显示器
公开(公告)号：US08829513B2
公开(公告)日：2014-09-09
申请号：US13391638
申请日：2010-03-29
申请人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L27/12 , H01L29/786 , H01L27/32 , H01L33/00 , G02F1/1368
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/3258 , H01L33/0041
摘要： The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01≦Zn/(In+Zn)≦0.22.
摘要翻译：本发明提供实现电性能和工艺电阻优异的TFT的氧化物半导体，包括由氧化物半导体形成的沟道层的TFT以及配备有TFT的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，其中氧化物半导体包含Ga（镓），In（铟），Zn（锌）和O（氧）作为构成原子，氧化物半导体 Zn原子组成满足0.01＆nlE; Zn /（In + Zn）＆nlE; 0.22。

2. 发明申请

US20130193430A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE 有权
标题翻译：氧化物半导体，薄膜晶体管和显示器件
公开(公告)号：US20130193430A1
公开(公告)日：2013-08-01
申请号：US13391638
申请日：2010-03-29
申请人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshifumi Ota , Hirohiko Nishiki , Yoshimasa Chikama , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Kazuo Nakagawa , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L33/00
CPC分类号： H01L29/7869 , G02F1/1368 , H01L27/3258 , H01L33/0041
摘要： The present invention provides an oxide semiconductor that realizes a TFT excellent in electric properties and process resistance, a TFT comprising a channel layer formed of the oxide semiconductor, and a display device equipped with the TFT. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, wherein the oxide semiconductor contains Ga (gallium), In (indium), Zn (zinc), and O (oxygen) as constituent atoms, and the oxide semiconductor has Zn atomic composition satisfying the equation of 0.01≦Zn/(In+Zn)≦0.22.
摘要翻译：本发明提供实现电性能和工艺电阻优异的TFT的氧化物半导体，包括由氧化物半导体形成的沟道层的TFT以及配备有TFT的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，其中氧化物半导体包含Ga（镓），In（铟），Zn（锌）和O（氧）作为构成原子，氧化物半导体具有满足0.01@Zn/（In + Zn）@ 0.22的方程的Zn原子组成。

3. 发明授权

US09024311B2 Thin film transistor, method for manufacturing same, active matrix substrate, display panel and display device 有权
标题翻译：薄膜晶体管，制造方法，有源矩阵基板，显示面板和显示装置
公开(公告)号：US09024311B2
公开(公告)日：2015-05-05
申请号：US13379670
申请日：2010-04-06
申请人： Takeshi Hara , Hirohiko Nishiki , Yoshimasa Chikama , Kazuo Nakagawa , Yoshifumi Ohta , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Yoshiyuki Miyajima , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Takeshi Hara , Hirohiko Nishiki , Yoshimasa Chikama , Kazuo Nakagawa , Yoshifumi Ohta , Tetsuya Aita , Masahiko Suzuki , Okifumi Nakagawa , Yoshiyuki Miyajima , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336 , H01L27/12
CPC分类号： H01L27/1288 , H01L27/1225 , H01L29/7869
摘要： The present invention provides a thin film transistor including an oxide semiconductor layer (4) for electrically connecting a signal electrode (6a) and a drain electrode (7a), the an oxide semiconductor layer being made from an oxide semiconductor; and a barrier layer (6b) made from at least one selected from the group consisting of Ti, Mo, W, Nb, Ta, Cr, nitrides thereof, and alloys thereof, the barrier layer (6b) being in touch with the signal electrode (6a) and the oxide semiconductor layer (4) and separating the signal electrode (6a) from the oxide semiconductor layer (4). Because of this configuration, the thin film transistor can form and maintain an ohmic contact between the first electrode and the channel layer, thereby being a thin film transistor with good properties.
摘要翻译：本发明提供了一种薄膜晶体管，其包括用于电连接信号电极（6a）和漏电极（7a）的氧化物半导体层（4），所述氧化物半导体层由氧化物半导体制成; 以及由选自Ti，Mo，W，Nb，Ta，Cr，氮化物中的至少一种及其合金制成的阻挡层（6b），阻挡层（6b）与信号电极（6a）和氧化物半导体层（4），并且将信号电极（6a）与氧化物半导体层（4）分离。由于这种结构，薄膜晶体管可以在第一电极和沟道层之间形成并保持欧姆接触，从而成为具有良好性能的薄膜晶体管。

4. 发明申请

US20130105788A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE 审中-公开
标题翻译：氧化物半导体，薄膜晶体管和显示器件
公开(公告)号：US20130105788A1
公开(公告)日：2013-05-02
申请号：US13393335
申请日：2010-05-06
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Takeshi Hara , Okifumi Nakagawa , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Kazuo Nakagawa , Hinae Mizuno
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Takeshi Hara , Okifumi Nakagawa , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Yoshiyuki Harumoto , Kazuo Nakagawa
IPC分类号： H01L29/786
CPC分类号： H01L29/786 , G02F1/1368 , H01L29/7869
摘要： The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property and credibility, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Si, In, Zn, and O as constituent atoms.
摘要翻译：本发明提供一种能够实现电性能和可靠性优异的薄膜晶体管的氧化物半导体，具有由氧化物半导体形成的沟道层的薄膜晶体管，以及配备有该薄膜晶体管的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，并且包括Si，In，Zn和O作为构成原子。

5. 发明申请

US20130099227A1 OXIDE SEMICONDUCTOR, THIN FILM TRANSISTOR, AND DISPLAY DEVICE 审中-公开
标题翻译：氧化物半导体，薄膜晶体管和显示器件
公开(公告)号：US20130099227A1
公开(公告)日：2013-04-25
申请号：US13394343
申请日：2010-04-22
申请人： Okifumi Nakagawa , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Kazuo Nakagawa , Michiko Takei , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Okifumi Nakagawa , Hirohiko Nishiki , Yoshimasa Chikama , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Kazuo Nakagawa , Yuuji Mizuno , Michiko Takei , Yoshiyuki Harumoto
IPC分类号： H01L29/786
CPC分类号： H01L29/786 , G02F1/1368 , H01L29/7869
摘要： The present invention provides an oxide semiconductor capable of achieving a thin film transistor with excellent electric property, a thin film transistor having a channel layer formed of the oxide semiconductor, and a display device equipped with the thin film transistor. The oxide semiconductor of the present invention is an oxide semiconductor for a thin film transistor, and includes Al, In, Zn, and O as constituent atoms.
摘要翻译：本发明提供能够实现电性能优异的薄膜晶体管的氧化物半导体，具有由氧化物半导体形成的沟道层的薄膜晶体管，以及配备有薄膜晶体管的显示装置。本发明的氧化物半导体是用于薄膜晶体管的氧化物半导体，并且包括Al，In，Zn和O作为构成原子。

6. 发明授权

US09177974B2 Active matrix substrate and liquid crystal display panel including the same, and method for manufacturing active matrix substrate with gate insulating film not provided where auxiliary capacitor is provided 有权
标题翻译：有源矩阵基板和包括该基板的有源矩阵基板和液晶显示面板的制造方法以及不提供辅助电容器的栅极绝缘膜制造有源矩阵基板的方法
公开(公告)号：US09177974B2
公开(公告)日：2015-11-03
申请号：US13501534
申请日：2010-07-26
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuiji Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： G02F1/1343 , G02F1/1333 , G02F1/136 , H01L27/12 , G02F1/1362
CPC分类号： H01L27/1255 , G02F1/136213 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
摘要翻译：有源矩阵基板包括以矩阵形式布置的多个像素，多个电容线（11b），其中像素彼此排列并且彼此平行的方向中的一个方向延伸;多个TFT（5），一个用于每个像素，覆盖TFT（5）的保护膜（16a），在保护膜（16a）上以矩阵布置并连接到相应的TFT（5）的多个像素电极（18a）和多个辅助电容器（6），每个像素一个。每个辅助电容器（6）包括相应的电容器线（11b），对应的像素电极（18a）和相应的电容器线（11b）和相应的像素电极（18a）之间的保护膜（16a）。

7. 发明申请

US20120218485A1 ACTIVE MATRIX SUBSTRATE AND LIQUID CRYSTAL DISPLAY PANEL INCLUDING THE SAME, AND METHOD FOR MANUFACTURING ACTIVE MATRIX SUBSTRATE 有权
标题翻译：有源矩阵基板和包括其的液晶显示面板以及制造有源矩阵基板的方法
公开(公告)号：US20120218485A1
公开(公告)日：2012-08-30
申请号：US13501534
申请日：2010-07-26
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： G02F1/136 , H01L33/08 , H01L29/786
CPC分类号： H01L27/1255 , G02F1/136213 , G02F2201/40 , H01L27/1225 , H01L27/124 , H01L27/1248
摘要： An active matrix substrate includes a plurality of pixels arranged in a matrix, a plurality of capacitor lines (11b) extending in one of directions in which the pixels are aligned and in parallel to each other, a plurality of TFTs (5), one for each of the pixels, a protective film (16a) covering the TFTs (5), a plurality of pixel electrodes (18a) arranged in a matrix on the protective film (16a) and connected to the respective corresponding TFTs (5), and a plurality of auxiliary capacitors (6), one for each of the pixels. Each of the auxiliary capacitors (6) includes the corresponding capacitor line (11b), the corresponding pixel electrode (18a), and the protective film (16a) between the corresponding capacitor line (11b) and the corresponding pixel electrode (18a).
摘要翻译：有源矩阵基板包括以矩阵形式布置的多个像素，多个电容线（11b），其中像素彼此排列并且彼此平行的方向中的一个方向延伸;多个TFT（5），一个用于每个像素，覆盖TFT（5）的保护膜（16a），在保护膜（16a）上以矩阵布置并连接到相应的TFT（5）的多个像素电极（18a）和多个辅助电容器（6），每个像素一个。每个辅助电容器（6）包括相应的电容器线（11b），对应的像素电极（18a）和相应的电容器线（11b）和相应的像素电极（18a）之间的保护膜（16a）。

8. 发明授权

US08685803B2 Semiconductor device and method for producing same 有权
标题翻译：半导体装置及其制造方法
公开(公告)号：US08685803B2
公开(公告)日：2014-04-01
申请号：US13514081
申请日：2010-12-03
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Hinae Mizuno
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L21/00
CPC分类号： H01L27/1225 , G02F1/13458 , G02F1/136213 , H01L27/124 , H01L27/1244 , H01L27/1248
摘要： A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion. The second connecting portion is in contact with the first connecting portion within a first opening (11c) provided in the first and second insulating films; the third connecting portion (19c) is in contact with the second connecting portion within a second opening (17c) provided in the passivation film; and the second connecting portion (13c) covers end faces of the first and second insulating films within the first opening (11c), but does not cover an end face of the passivation film (15) within the second opening (17c). As a result, the taper shape of a contact hole of the terminal portion can be controlled with a high precision.
摘要翻译：半导体器件包括：具有栅极线（3a），第一绝缘膜（5），岛状氧化物半导体层（7a），第二绝缘膜（9），源极线（13as））的薄膜晶体管，，漏电极（13ad）和钝化膜; 以及具有由与栅极线相同的导电膜制成的第一连接部分（3c）的端子部分，由与源极线和漏极电极相同的导电膜制成的第二连接部分（13c）和第三连接部分（19c）形成在第二连接部分上。第二连接部分在设置在第一和第二绝缘膜中的第一开口（11c）内与第一连接部分接触; 所述第三连接部分（19c）在设置在所述钝化膜中的第二开口（17c）内与所述第二连接部分接触; 并且所述第二连接部分（13c）覆盖所述第一开口（11c）内的所述第一绝缘膜和所述第二绝缘膜的端面，但不覆盖所述第二开口（17c）内的所述钝化膜（15）的端面。结果，可以高精度地控制端子部分的接触孔的锥形形状。

9. 发明申请

US20120241750A1 SEMICONDUCTOR DEVICE AND METHOD FOR PRODUCING SAME 有权
标题翻译：半导体器件及其制造方法
公开(公告)号：US20120241750A1
公开(公告)日：2012-09-27
申请号：US13514081
申请日：2010-12-03
申请人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
发明人： Yoshimasa Chikama , Hirohiko Nishiki , Yoshifumi Ohta , Yuuji Mizuno , Hinae Mizuno , Takeshi Hara , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L27/1225 , G02F1/13458 , G02F1/136213 , H01L27/124 , H01L27/1244 , H01L27/1248
摘要： A semiconductor device includes: a thin film transistor having a gate line (3a), a first insulating film (5), an island-shaped oxide semiconductor layer (7a), a second insulating film (9), a source line (13as), a drain electrode (13ad), and a passivation film; and a terminal portion having a first connecting portion (3c) made of the same conductive film as the gate line, a second connecting portion (13c) made of the same conductive film as the source line and the drain electrode, and a third connecting portion (19c) formed on the second connecting portion. The second connecting portion is in contact with the first connecting portion within a first opening (11c) provided in the first and second insulating films; the third connecting portion (19c) is in contact with the second connecting portion within a second opening (17c) provided in the passivation film; and the second connecting portion (13c) covers end faces of the first and second insulating films within the first opening (11c), but does not cover an end face of the passivation film (15) within the second opening (17c). As a result, the taper shape of a contact hole of the terminal portion can be controlled with a high precision.
摘要翻译：半导体器件包括：具有栅极线（3a），第一绝缘膜（5），岛状氧化物半导体层（7a），第二绝缘膜（9），源极线（13as））的薄膜晶体管，，漏电极（13ad）和钝化膜; 以及具有由与栅极线相同的导电膜制成的第一连接部分（3c）的端子部分，由与源极线和漏极电极相同的导电膜制成的第二连接部分（13c）和第三连接部分（19c）形成在第二连接部分上。第二连接部分在设置在第一和第二绝缘膜中的第一开口（11c）内与第一连接部分接触; 所述第三连接部分（19c）在设置在所述钝化膜中的第二开口（17c）内与所述第二连接部分接触; 并且所述第二连接部分（13c）覆盖所述第一开口（11c）内的所述第一和第二绝缘膜的端面，但不覆盖所述第二开口（17c）内的所述钝化膜（15）的端面。结果，可以高精度地控制端子部分的接触孔的锥形形状。

10. 发明申请

US20130140552A1 SEMICONDUCTOR DEVICE, METHOD FOR MANUFACTURING SAME, AND DISPLAY DEVICE 审中-公开
标题翻译：半导体器件，其制造方法和显示器件
公开(公告)号：US20130140552A1
公开(公告)日：2013-06-06
申请号：US13581007
申请日：2011-02-22
申请人： Hirohiko Nishiki , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Yoshifumi Ohta , Takeshi Hara , Hinae Mizuno
发明人： Yuuji Mizuno , Hirohiko Nishiki , Yoshimasa Chikama , Tetsuya Aita , Masahiko Suzuki , Michiko Takei , Okifumi Nakagawa , Yoshiyuki Harumoto , Yoshifumi Ohta , Takeshi Hara
IPC分类号： H01L29/786 , H01L29/66
CPC分类号： H01L29/786 , H01L29/66742 , H01L29/7869 , H01L29/78693
摘要： A semiconductor device (100) according to the present invention includes: an oxide semiconductor layer (31) formed on an insulating layer (21), the oxide semiconductor layer (31) containing at least one element selected from the group consisting of In, Zn, and Sn; first and second sacrificial layers (41a) and (41b) formed, with an interspace from each other, on the oxide semiconductor layer (31); a second electrode (52a) formed in contact with an upper face of the first sacrificial layer (41a) and an upper face of the oxide semiconductor layer (31); and a third electrode (52b) formed in contact with an upper face of the second sacrificial layer (41b) and an upper face of the oxide semiconductor layer (31). The first and second sacrificial layers (41a) and (41b) contain an oxide having at least one element selected from the group consisting of Zn, Ga, Mg, Ca, and Sr.
摘要翻译：根据本发明的半导体器件（100）包括：形成在绝缘层（21）上的氧化物半导体层（31），所述氧化物半导体层（31）包含选自In，Zn ，和Sn; 第一和第二牺牲层（41a）和（41b）在氧化物半导体层（31）上形成有彼此的间隙; 形成为与第一牺牲层（41a）的上表面和氧化物半导体层（31）的上表面接触的第二电极（52a）; 以及与第二牺牲层（41b）的上表面和氧化物半导体层（31）的上表面接触形成的第三电极（52b）。第一和第二牺牲层（41a）和（41b）含有具有选自Zn，Ga，Mg，Ca和Sr中的至少一种元素的氧化物。

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