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1. 发明申请

US20150281237A1 MULTINODE HUBS FOR TRUSTED COMPUTING 有权
标题翻译：用于信息计算的MULTINODE HUBS
公开(公告)号：US20150281237A1
公开(公告)日：2015-10-01
申请号：US14225140
申请日：2014-03-25
申请人： Robert C. Swanson , Daniel Nemiroff , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Robert W. Cone , Malay Trivedi , Piotr Kwidzinski
发明人： Robert C. Swanson , Daniel Nemiroff , Vincent J. Zimmer , Mallik Bulusu , John R. Lindsley , Robert W. Cone , Malay Trivedi , Piotr Kwidzinski
IPC分类号： H04L29/06
CPC分类号： H04L63/10 , G06F3/0622 , G06F3/0637 , G06F3/0683 , G06F13/28 , G06F21/554 , G06F21/57 , G06F21/572
摘要： Embodiments of multinode hubs for trust operations are disclosed herein. In some embodiments, a multinode hub may include a plurality of memory regions, a trapping module, and a trusted platform module (TPM) component. Each memory region may be associated with and receive trust operation data from a coherent computing node. The trapping module may generate trap notifications in response to accesses to the plurality of memory regions by the associated coherent computing nodes. The trap notifications may indicate which of the plurality of memory locations has been accessed, and the TPM component may process the trust operation data in a memory region indicated by a trap notification. Other embodiments may be disclosed and/or claimed.
摘要翻译：本文公开了用于信任操作的多节点集线器的实施例。在一些实施例中，多节点集线器可以包括多个存储器区域，陷阱模块和可信平台模块（TPM）组件。每个存储器区域可以与相干计算节点相关联并接收来自相干计算节点的信任操作数据。捕获模块可以响应于相关联的相干计算节点对多个存储器区域的访问而产生陷阱通知。陷阱通知可以指示已经访问了多个存储器位置中的哪一个，并且TPM组件可以处理由陷阱通知指示的存储器区域中的信任操作数据。可以公开和/或要求保护其他实施例。

2. 发明授权

US09292465B2 Dynamic link width adjustment 有权
标题翻译：动态链接宽度调整
公开(公告)号：US09292465B2
公开(公告)日：2016-03-22
申请号：US13993106
申请日：2011-12-21
申请人： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
发明人： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
IPC分类号： G06F13/42 , G06F13/38
CPC分类号： G06F13/42 , G06F13/387 , G06F2213/0026 , Y02D10/14 , Y02D10/151
摘要： Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.
摘要翻译：实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。这提供了功率节省，对性能影响不大。本文讨论了其它实施例。

3. 发明申请

US20140019654A1 DYNAMIC LINK WIDTH ADJUSTMENT 有权
标题翻译：动态链路宽度调整
公开(公告)号：US20140019654A1
公开(公告)日：2014-01-16
申请号：US13993106
申请日：2011-12-21
申请人： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
发明人： Malay Trivedi , Mohan K. Nair , Joseph Murray , Devadatta V. Bodas , James W. Alexander , Vijayendra K. Hoskoti
IPC分类号： G06F13/42
CPC分类号： G06F13/42 , G06F13/387 , G06F2213/0026 , Y02D10/14 , Y02D10/151
摘要： Embodiments help dynamically configure the width of PCIe links and also determine how to best configure the appropriate link width. This helps avoid situations where PCIe links are almost always active even at very low traffic rates. Embodiments achieve these benefits based on, for example, run-time monitoring of bandwidth requirement for integrated and non-integrated ports located downstream for the PCIe controller. This provides power savings with little impact on performance. Other embodiments are discussed herein.
摘要翻译：实施例帮助动态配置PCIe链路的宽度，并确定如何最佳地配置适当的链路宽度。这有助于避免PCIe链路几乎总是处于活动状态，即使在非常低的流量速率。实施例基于例如位于PCIe控制器下游的集成和非集成端口的带宽需求的运行时监视来实现这些益处。这提供了功率节省，对性能影响不大。本文讨论了其它实施例。

4. 发明申请

US20100164622A1 SINGLE-ENDED TO DIFFERENTIAL AMPLIFICATION AND PIPELINE ANALOG-TO-DIGITAL CONVERSION FOR DIGITALLY CONTROLLED DC-DC CONVERTERS 有权
标题翻译：用于数字控制DC-DC转换器的差分放大和管线模拟数字转换
公开(公告)号：US20100164622A1
公开(公告)日：2010-07-01
申请号：US12347081
申请日：2008-12-31
申请人： Fuding Ge , Brent D. Thomas , Malay Trivedi , James T. Doyle
发明人： Fuding Ge , Brent D. Thomas , Malay Trivedi , James T. Doyle
IPC分类号： H03F3/45
CPC分类号： H03F3/005 , H03F3/45475
摘要： Methods and systems to amplify and convert a single-ended analog signal to a differential signal and to convert the differential signal to a digital value, including to time-multiplex a plurality of windowed single-ended analog error signals, amplify a difference between the time-multiplexed analog signals, sample a corresponding amplified difference signal and an inverted amplified difference signal, amplify and center the samples about a common mode, and convert a corresponding amplified differential signal to digital values in a pipeline fashion. Bias adjustable features may be implemented to control a bandwidth, and clock rates may be adjustable to correspond to the bandwidth.
摘要翻译：将单端模拟信号放大并转换为差分信号并将差分信号转换为数字值的方法和系统，包括对多个窗口化的单端模拟误差信号进行时间复用，放大时间差多路复用模拟信号，对相应的放大差分信号和反相放大差分信号进行采样，对共模进行放大和中心采样，并以相应的方式将相应的放大差分信号转换为数字值。可以实施偏置可调特征以控制带宽，并且时钟速率可以是可调节的以对应于带宽。

5. 发明授权

US07023672B2 Digitally controlled voltage regulator 有权
标题翻译：数字电压调节器
公开(公告)号：US07023672B2
公开(公告)日：2006-04-04
申请号：US10358066
申请日：2003-02-03
申请人： John Ryan Goodfellow , Robert T. Carroll , Malay Trivedi , Erik McShane , Kevin Mori
发明人： John Ryan Goodfellow , Robert T. Carroll , Malay Trivedi , Erik McShane , Kevin Mori
IPC分类号： H02H3/22
CPC分类号： H02M3/1584 , H02M3/157 , H02M3/1588 , Y02B70/1466
摘要： Disclosed is a digitally controlled multi-phase voltage regulator system providing regulated power to electronic components that have variable power requirements. Power is supplied by one or more power integrated circuits (IC) each having a high side power switch controlled by pulse width modulated signals and a low side power switch. The power IC senses voltage at the load and has an on-chip current mirror for generating a current that is a ratio of current delivered to the load. The power IC also has current limiting and on-chip temperature sensing components. The voltage and current information is digitized and provided to a control integrated circuit (IC). The control IC receives this digitized information as well as user provided parameters and, in the regulation mode of operation, provides digitized pulse width modulated control signals to the power IC. In an active transient response mode of operation, the control IC provides signals to turn either the high side switches or low side switches ON. Fault detection circuitry identifies over voltage, under voltage, and excessive temperatures. All communications between the control IC and the power IC are digital providing high bandwidth, optimal control frequency response, noise immunity and efficient active transient response.
摘要翻译：公开了一种数字控制的多相电压调节器系统，为具有可变功率要求的电子元件提供稳压电源。电源由一个或多个功率集成电路（IC）提供，每个功率集成电路均具有由脉冲宽度调制信号控制的高侧功率开关和低侧功率开关。功率IC感测负载上的电压，并且具有用于产生作为传送到负载的电流的比率的电流的片上电流镜。电源IC还具有电流限制和片上温度感测元件。电压和电流信息被数字化并提供给控制集成电路（IC）。控制IC接收该数字化信息以及用户提供的参数，并且在调节操作模式下，向功率IC提供数字化的脉宽调制控制信号。在有效的瞬态响应操作模式中，控制IC提供信号以使高侧开关或低侧开关接通。故障检测电路识别过电压，欠电压和过高的温度。控制IC和电源IC之间的所有通信都是提供高带宽，最佳控制频率响应，抗噪声和有效的主动瞬态响应的数字。

6. 发明授权

US06965502B2 System, device and method for providing voltage regulation to a microelectronic device 有权
标题翻译：用于向微电子器件提供电压调节的系统，装置和方法
公开(公告)号：US06965502B2
公开(公告)日：2005-11-15
申请号：US10103980
申请日：2002-03-22
申请人： Thomas P. Duffy , Ryan Goodfellow , Malay Trivedi , Kevin Mori , Benjamim Tang
发明人： Thomas P. Duffy , Ryan Goodfellow , Malay Trivedi , Kevin Mori , Benjamim Tang
IPC分类号： G06F1/30 , H02H9/00
CPC分类号： G06F1/305
摘要： The present invention provides a power regulation system and method with high speed signal settling capabilities for providing rapid active transient response to a microelectronic device. An active transient response system includes a power supply configured to receive external and/or internal signals indicating the occurrence of transient load conditions and to respond to the transient load conditions based on one or more of these signals. The system may further include a transient suppressor configured for early detection of transients, assisting in transient suppression, and early signaling of transient activity to the power supply.The system provides rapid recovery to steady state operation from the active transient response mode by using a digital compensator to quickly modifying the duty cycle and provide a voltage offset proportional to the transient microprocessor load step. Recovery is further improved by current rephasing techniques.
摘要翻译：本发明提供了一种具有高速信号稳定能力的功率调节系统和方法，用于向微电子器件提供快速的主动瞬态响应。有源瞬态响应系统包括被配置为接收指示瞬态负载状况的发生的外部和/或内部信号的电源，并且基于这些信号中的一个或多个来响应瞬态负载条件。该系统还可以包括被配置为用于早期检测瞬态，辅助瞬态抑制以及对电源的瞬时活动的早期信号的瞬态抑制器。该系统通过使用数字补偿器快速修改占空比并提供与瞬态微处理器负载阶跃成比例的电压偏移，从主动瞬态响应模式快速恢复到稳态运行。通过目前的重塑技术进一步改善了恢复。

7. 发明申请

US20130318387A1 DISTRIBUTED POWER DELIVERY SCHEME FOR ON-DIE VOLTAGE SCALING 审中-公开
标题翻译：用于电源电压调节的分布式电源传输方案
公开(公告)号：US20130318387A1
公开(公告)日：2013-11-28
申请号：US13892788
申请日：2013-05-13
申请人： Malay Trivedi , Tong H. Kim
发明人： Malay Trivedi , Tong H. Kim
IPC分类号： G06F1/32 , H02J1/00
CPC分类号： G05F3/16 , G06F1/26 , G06F1/3203 , G06F1/3234 , G06F1/324 , G06F1/3287 , G06F1/3296 , H02J1/00 , Y02D10/126 , Y02D10/171 , Y02D10/172 , Y10T307/406 , Y10T307/944
摘要： A high-speed low dropout (HS-LDO) voltage regulation circuit suitable to enable a power gate unit to produce a variable voltage signal based on the load of a processor is disclosed herein. In various embodiments, selection logic may dynamically enable or disable the HS-LDO circuit to allow the power gate unit to operate under a fully-on or fully-off mode. Other embodiments may be disclosed or claimed.
摘要翻译：这里公开了适合于使功率门单元基于处理器的负载产生可变电压信号的高速低压差（HS-LDO）电压调节电路。在各种实施例中，选择逻辑可以动态地使能或禁用HS-LDO电路以允许功率门单元在完全启动或完全关闭模式下工作。可以公开或要求保护其他实施例。

8. 发明授权

US08253405B2 High speed voltage regulator with integrated loseless current sensing 有权
标题翻译：具有集成无电流电流检测功能的高速电压调节器
公开(公告)号：US08253405B2
公开(公告)日：2012-08-28
申请号：US12347711
申请日：2008-12-31
申请人： Malay Trivedi , Jiang William , Brent D. Thomas , James T. Doyle , Rose Wang
发明人： Malay Trivedi , Jiang William , Brent D. Thomas , James T. Doyle , Rose Wang
IPC分类号： G05F1/00
CPC分类号： G06F1/26
摘要： In general, in one aspect, the disclosure describes a high-speed multi-phase voltage regulator (VR) capable of sensing load current. For each phase leg, the VR includes a current mirror to mirror current in switching elements, a current sense to sense high side current in the current mirror, and a I-V converter to convert the sensed high side current to a voltage. The high side sensed current for each phase leg is averaged and the duty cycle for the VR is extracted. The average high side sensed current and the duty cycle are converted to digital by an A-D converter. Digital circuitry corrects the sensed current by adjusting for the gain and offset voltage of the VR. The adjusted sensed value is divided by the duty cycle to convert to load current and the average load current is multiplied by the number of phases operating to determine overall load current.
摘要翻译：通常，一方面，本公开描述了能够感测负载电流的高速多相电压调节器（VR）。对于每个相支路，VR包括用于在开关元件中镜像电流的电流镜，用于感测电流镜中的高侧电流的电流感测，以及将感测到的高侧电流转换为电压的I-V转换器。对每个相位支路的高侧检测电流进行平均，并提取VR的占空比。平均高侧检测电流和占空比由A-D转换器转换为数字。数字电路通过调整VR的增益和失调电压来校正感测电流。调整后的感测值除以占空比转换为负载电流，平均负载电流乘以确定总负载电流的相位数。

9. 发明申请

US20100164477A1 HIGH SPEED VOLTAGE REGULATOR WITH INTEGRATED LOSELESS CURRENT SENSING 有权
标题翻译：具有集成无电流电流传感的高速电压调节器
公开(公告)号：US20100164477A1
公开(公告)日：2010-07-01
申请号：US12347711
申请日：2008-12-31
申请人： Malay Trivedi , Jiang William , Brent D. Thomas , James T. Doyle , Rose Wang
发明人： Malay Trivedi , Jiang William , Brent D. Thomas , James T. Doyle , Rose Wang
IPC分类号： G01R19/00 , G05F1/10
CPC分类号： G06F1/26
摘要： In general, in one aspect, the disclosure describes a high-speed multi-phase voltage regulator (VR) capable of sensing load current. For each phase leg, the VR includes a current mirror to mirror current in switching elements, a current sense to sense high side current in the current mirror, and a I-V converter to convert the sensed high side current to a voltage. The high side sensed current for each phase leg is averaged and the duty cycle for the VR is extracted. The average high side sensed current and the duty cycle are converted to digital by an A-D converter. Digital circuitry corrects the sensed current by adjusting for the gain and offset voltage of the VR. The adjusted sensed value is divided by the duty cycle to convert to load current and the average load current is multiplied by the number of phases operating to determine overall load current.
摘要翻译：通常，一方面，本公开描述了能够感测负载电流的高速多相电压调节器（VR）。对于每个相支路，VR包括用于在开关元件中镜像电流的电流镜，用于感测电流镜中的高侧电流的电流感测，以及将感测到的高侧电流转换为电压的I-V转换器。对每个相位支路的高侧检测电流进行平均，并提取VR的占空比。平均高侧检测电流和占空比由A-D转换器转换为数字。数字电路通过调整VR的增益和失调电压来校正感测电流。调整后的感测值除以占空比转换为负载电流，平均负载电流乘以确定总负载电流的相位数。

10. 发明授权

US06795009B2 System and method for current handling in a digitally-controlled power converter 有权
标题翻译：数字控制电源转换器中当前处理的系统和方法
公开(公告)号：US06795009B2
公开(公告)日：2004-09-21
申请号：US10237903
申请日：2002-09-09
申请人： Thomas P. Duffy , Malay Trivedi , Kevin Mori
发明人： Thomas P. Duffy , Malay Trivedi , Kevin Mori
IPC分类号： H03M112
CPC分类号： H02M3/1584 , H02M3/157
摘要： Currents flowing in the various channels within a voltage regulator module (VRM) are suitably converted to digital equivalents that can be processed to control each module in a modular power supply. Functions that may be digitally implemented include current balancing between channels, current sharing between various modules in a power supply, and/or the like. By monitoring the current provided on each channel within a module, for example, a controller can determine an average current for the channels, which in turn can be used to identify and compensate for over- or under-production in any particular channel. Active voltage positioning techniques and overload protection may also be implemented using digital techniques.
摘要翻译：在电压调节器模块（VRM）内的各种通道中流动的电流适当地转换为可被处理以控制模块化电源中的每个模块的数字等效电路。可以数字实现的功能包括通道之间的电流平衡，电源中的各个模块之间的电流共享等等。通过监视在模块内的每个通道上提供的电流，例如，控制器可以确定通道的平均电流，这又可以用于识别和补偿任何特定通道中的过度或不足的产生。有源电压定位技术和过载保护也可以使用数字技术实现。

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