基本信息:
- 专利标题： 用於一半導體封裝之基板製程、封裝方法、封裝結構及系統級封裝結構
- 专利标题（英）：Method for manufacturing a substrate, package method, package structure and system-in-package structure for a semiconductor package
- 专利标题（中）：用于一半导体封装之基板制程、封装方法、封装结构及系统级封装结构
- 申请号：TW101101871 申请日：2012-01-18
- 公开(公告)号：TW201332031A 公开(公告)日：2013-08-01
- 发明人： 林殿方 , LIN, DIANN FANG
- 申请人： 東琳精密股份有限公司 , DAWNING LEADING TECHNOLOGY INC.
- 申请人地址： 苗栗縣
- 专利权人： 東琳精密股份有限公司,DAWNING LEADING TECHNOLOGY INC.
- 当前专利权人： 東琳精密股份有限公司,DAWNING LEADING TECHNOLOGY INC.
- 当前专利权人地址： 苗栗縣
- 代理人： 陳翠華
- 主分类号： H01L21/60
- IPC分类号： H01L21/60 ; H01L21/56 ; H01L23/488 ; H01L23/31
A method for manufacturing a substrate, a package method, a package structure and a system-in-package structure for a semiconductor package are provided. The package method comprises the following steps: providing a metal foil which comprises a first surface and a second surface; respectively forming a patterned resistant layer on the first surface and the second surface of the metal foil; forming at least one connection pad to each of the patterned resistant layer; pressing the second surface of the metal foil into a release layer of a carrier; etching the metal foil to form a patterned metal foil; disposing at least one semiconductor element on the patterned resistant layer of the first surface of the patterned metal foil; electrically connecting the at least one semiconductor element with the at least one connection pad of the first surface; packaging a space over the carrier; and removing the carrier.
公开/授权文献:
- TWI442488B 用於一半導體封裝之基板製程、封裝方法、封裝結構及系統級封裝結構 公开/授权日：2014-06-21
信息查询:
EspacenetIPC结构图谱:
| H | 电学 |
| --H01 | 基本电气元件 |
| ----H01L | 半导体器件；其他类目未包含的电固体器件 |
| ------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
| --------H01L21/02 | .半导体器件或其部件的制造或处理 |
| ----------H01L21/027 | ..未在H01L21/18或H01L21/34组中包含的为进一步的光刻工艺在半导体之上制作掩膜 |
| ------------H01L21/50 | ...应用H01L21/06至H01L21/326中的任一小组都不包含的方法或设备组装半导体器件的 |
| --------------H01L21/60 | ....引线或其他导电构件的连接，用于工作时向或由器件传导电流 |