基本信息:
- 专利标题: 홀 패턴 제조 방법, 전자 장치 및 그 제조 방법
- 专利标题(英):Method for manufacturing hole pattern, and electronic device and method for fabricating the same
- 专利标题(中):制造孔型图案的方法和电子设备及其制造方法
- 申请号:KR1020130097370 申请日:2013-08-16
- 公开(公告)号:KR1020150019922A 公开(公告)日:2015-02-25
- 发明人: 김재헌 , 이성구
- 申请人: 에스케이하이닉스 주식회사
- 申请人地址: 경기도 이천시 부발읍 경충대로 ****
- 专利权人: 에스케이하이닉스 주식회사
- 当前专利权人: 에스케이하이닉스 주식회사
- 当前专利权人地址: 경기도 이천시 부발읍 경충대로 ****
- 代理人: 특허법인신성
- 主分类号: H01L21/8247
- IPC分类号: H01L21/8247 ; H01L27/115 ; H01L21/31
Problem embodiments of the present invention to solve is also a hole pattern itself non-uniformity, longitudinal spacing and lateral spacing method different asymmetric arrangement hole pattern capable of forming a hole pattern, while improving and method of manufacturing a semiconductor device as for providing, hole pattern producing method according to an embodiment of the present invention for solving the aforementioned problems is, etching of the longitudinal spacing and lateral spacing different hole pattern of an asymmetric arrangement on each layer defining the mask pattern is forming; According to the mask pattern to the electronic device and a manufacturing method of an etch barrier in the embodiments, including the hole pattern, the manufacturing method including the step of etching the etching layer, and, above, by combining a film-optical processing and cross-species direction interval and the transverse effect of spacing is formed in a hole pattern of a different asymmetric arrangement, or alternatively a mask process using the longitudinal distance and the transverse effect of spacing is formed in a hole pattern of a different asymmetric arrangement, the hole pattern itself this non-uniformity is, the distance between the vertical and horizontal directions while enabling improved hole pattern formed with each other in other asymmetrical arrangement to have the effect of improving the yield of semiconductor devices.
信息查询:
EspacenetIPC结构图谱:
H | 电学 |
--H01 | 基本电气元件 |
----H01L | 半导体器件;其他类目未包含的电固体器件 |
------H01L21/00 | 专门适用于制造或处理半导体或固体器件或其部件的方法或设备 |
--------H01L21/67 | .专门适用于在制造或处理过程中处理半导体或电固体器件的装置;专门适合于在半导体或电固体器件或部件的制造或处理过程中处理晶片的装置 |
----------H01L21/71 | ..限定在组H01L21/70中的器件的特殊部件的制造 |
------------H01L21/78 | ...把衬底连续地分成多个独立的器件 |
--------------H01L21/782 | ....制造多个器件,每一个由单个电路元件组成 |
----------------H01L21/822 | .....衬底是采用硅工艺的半导体的 |
------------------H01L21/8222 | ......双极工艺 |
--------------------H01L21/8234 | .......MIS工艺 |
----------------------H01L21/8239 | ........存储器结构 |
------------------------H01L21/8246 | .........只读存储器结构(ROM) |
--------------------------H01L21/8247 | ..........电可编程序的 |