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1. 发明申请

WO1997035339A1 METHOD FOR CONSTRUCTING FERROELECTRIC CAPACITOR-LIKE STRUCTURES ON SILICON DIOXIDE SURFACES 审中-公开
标题翻译：在二氧化硅表面上构造电解电容器结构的方法
公开(公告)号：WO1997035339A1
公开(公告)日：1997-09-25
申请号：PCT/US1997001880
申请日：1997-02-06
申请人： RADIANT TECHNOLOGIES, INC.
发明人： RADIANT TECHNOLOGIES, INC. , EVANS, Joseph, T., Jr. , BOYER, Leonard, O.
IPC分类号： H01L21/70
CPC分类号： H01L27/11502 , H01L28/55 , Y10S148/014
摘要： A method for fabricating an integrated circuit having at least one integrated circuit component (14) fabricated in a silicon substrate (12) and a second device (30) that is to be fabricated on a silicon oxide layer (16) that covers the integrated circuit component (14). The integrated circuit component (14) has a terminal that is to be connected to a corresponding terminal on the second device (30). The second device (30) includes an electrode structure (35) in contact with a dielectric component that includes a layer (33) of ferroelectric material. In the method of the present invention, a boundary layer comprising non-conducting polysilicon (17) is deposited over the silicon oxide layer (16). The electrode structure (35) is then fabricated by depositing one or more layers over the boundary layer (17). The ferroelectric layer (33) is then deposited over the electrode structure (35) and etched to provide the dielectric component. The boundary layer is then removed utilizing an etchant that etches silicon oxide much slower than polysilicon.

2. 发明申请

WO00004559A1 METHOD FOR PRODUCING CONDUCTIVE COMPOSITION AND CONDUCTIVE COMPOSITION 审中-公开
标题翻译：生产导电组合物和导电组合物的方法
公开(公告)号：WO00004559A1
公开(公告)日：2000-01-27
申请号：PCT/JP1999/003801
申请日：1999-07-14
IPC分类号： C09D5/24 , H01B1/22 , H01B13/00 , H01B1/20 , H01G4/12
CPC分类号： B01F5/0256 , B01F5/0268 , B01F5/08 , B01F2003/125 , C09D5/24 , H01B1/22 , Y10S148/014
摘要： A conductive composition such as conductive coating prepared by disintegrating a conductive powder to primary particles or substantially to primary particles and dispersing the particles and used suitably for formation of an electrode of an electronic component. A slurry containing a conductive powder is pressurized, made to flow through branch passages (17, 18), and joined again in an impact chamber (19) or made to collide against a collision wall or made to flow at high speed through capillaries to subject them to a shear action. Thereby the conductive powder is subjected to high-pressure dispersion, disintegrated to primary particles or substantially to primary particles, and well dispersed.
摘要翻译：一种导电组合物，例如通过将导电粉末分解成初级颗粒或基本上分散到初级颗粒而制备的导电涂层，并分散颗粒并适合用于形成电子部件的电极。包含导电粉末的浆料被加压，使其流过分支通道（17,18），并再次连接在冲击室（19）中或者使其与碰撞壁碰撞或使其高速流过毛细管流到受试者他们去剪切动作。由此，将导电粉末进行高压分散，分解成一次粒子或基本上分散成一次粒子，并且分散良好。

3. 发明申请

WO00031310A1 HIGH PURITY TANTALUM AND PRODUCTS CONTAINING THE SAME LIKE SPUTTER TARGETS 审中-公开
标题翻译：含有同种类型的飞溅物靶的高纯度和高产品
公开(公告)号：WO00031310A1
公开(公告)日：2000-06-02
申请号：PCT/US1999/027832
申请日：1999-11-24
IPC分类号： B22F9/24 , C22B3/44 , C22B9/04 , C22B9/20 , C22B9/22 , C22B34/24 , C22C27/02 , C22F1/00 , C22F1/18 , C23C14/34
CPC分类号： C23C14/3414 , C22B34/24 , Y10S148/014 , Y10S148/158
摘要： High purity tantalum metals and alloys containing the same are described. The tantalum metal preferably has a purity of at least 99.995 % and more preferably at least 99.999 %. In addition, tantalum metal and alloys thereof are described, which either have a grain size of about 50 microns or less, or a texture in which a (100) intensity within any 5 % increment of thickness is less than about 15 random, or an incremental log ratio of (111):(100) intensity of greater than about -4.0, or any combination of these properties. Also decribed are articles and components made from the tantalum metal which include, but are not limited to, sputtering targets, capacitor cans, resistive film layers, wire, and the like. Also disclosed is a process for making the high purity metal which includes the step of reacting a salt-containing tantalum with at least one compound capable of reducing this salt to tantalum powder and a second salt in a reaction container. The reaction container or liner in the reaction container and the agitator or liner on the agitator are made from a metal material having the same of higher vapor pressure of melted tantalum. The high purity tantalum preferably has a fine and uniform microstructure.
摘要翻译：描述了高纯度钽金属及含有它们的合金。钽金属的纯度优选为99.995％以上，更优选为99.999％以上。此外，描述了钽金属及其合金，其具有约50微米或更小的粒度，或其中任何5％厚度增量内的（100）强度小于约15度的质地，或（111）:( 100）强度的增量对数比大于约-4.0，或这些性质的任何组合。还描述了由钽金属制成的制品和部件，其包括但不限于溅射靶，电容器罐，电阻膜层，导线等。还公开了一种制备高纯度金属的方法，其包括使含盐钽与至少一种能够将该盐还原成钽粉末的化合物和在反应容器中的第二盐反应的步骤。反应容器中的反应容器或衬套以及搅拌器上的搅拌器或衬垫由具有较高蒸发压熔融钽的相同的金属材料制成。高纯度钽优选具有微细且均匀的微结构。

4. 发明申请

WO1996028844A1 METHOD FOR MAKING IMPROVED LSCO STACK ELECTRODE 审中-公开
标题翻译：用于制造改进的LSCO堆叠电极的方法
公开(公告)号：WO1996028844A1
公开(公告)日：1996-09-19
申请号：PCT/US1996003230
申请日：1996-03-08
申请人： RADIANT TECHNOLOGIES, INC.
发明人： RADIANT TECHNOLOGIES, INC. , EVANS, Joseph, Tate, Jr. , BOYER, Lenard
IPC分类号： H01L21/44
CPC分类号： H01L28/60 , H01L28/55 , Y10S148/014 , Y10S148/10
摘要： A method for making an improved LSCO stack in the generation of small platinum features (46) on the surface of a substrate (32) by sputtering of the LSCO material (54) and utilizing a photoresist mask to pattern the LSCO (54) in accordance with the platinum features (46). The problems and expense associated with high-temperature deposition of LSCO on platinum and the etching thereof are overcome by sputtering the LSCO at room temperature.
摘要翻译：一种通过溅射LSCO材料（54）并利用光致抗蚀剂掩模在基板（32）的表面上产生小的铂特征（46）来制造改进的LSCO堆叠的方法，以按照与铂金功能（46）。通过在室温下溅射LSCO来克服与LSCO在铂上的高温沉积相关的问题和费用及其蚀刻。

5. 发明申请

WO1996017386A1 A CAPACITOR FOR AN INTEGRATED CIRCUIT AND METHOD OF FORMATION THEREOF, AND A METHOD OF ADDING ON-CHIP CAPACITORS TO AN INTEGRATED CIRCUIT 审中-公开
标题翻译：用于集成电路的电容器及其形成方法以及将集成电路的片上电容器添加到集成电路的方法
公开(公告)号：WO1996017386A1
公开(公告)日：1996-06-06
申请号：PCT/CA1995000666
申请日：1995-11-24
申请人： NORTHERN TELECOM LIMITED
发明人： NORTHERN TELECOM LIMITED , LEUNG, Pak, K. , EMESH, Ismail, T.
IPC分类号： H01L29/92
CPC分类号： H01L28/55 , H01L21/76895 , H01L28/60 , Y10S148/014
摘要： A capacitor structure and method of forming a capacitor structure for an integrated circuit is provided. The capacitor structure, comprising a first electrode, capacitor dielectric and top electrode, is formed on a passivation layer overlying the interconnect metallization. The capacitor electrodes are interconnected to the underlying integrated circuit from underneath, through conductive vias, to the underlying interconnect metallization. The method provides for adding capacitors to an otherwise completed and passivated integrated circuit. The structure is particularly applicable for ferroelectric capacitors. The passivation layer acts as a barrier layer for a ferroelectric dielectric. Large area on-chip capacitors may be added without affecting the interconnect routing or packing density of the underlying devices, and may be added almost independently of the process technology used in the formation of the underlying integrated circuit.
摘要翻译：提供一种形成集成电路的电容器结构的电容器结构和方法。包括第一电极，电容器电介质和顶部电极的电容器结构形成在覆盖互连金属化的钝化层上。电容器电极从下面通过导电通孔连接到下面的集成电路到下面的互连金属化。该方法提供了将电容器添加到另外完成和钝化的集成电路中。该结构特别适用于铁电电容器。钝化层用作铁电介质的阻挡层。可以添加大面积片上电容器，而不影响下层器件的互连布线或封装密度，并且可以几乎独立于在形成底层集成电路中使用的工艺技术而添加。

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