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1. 发明申请

WO2006030363A2 ARRANGEMENT FOR PULSE-WIDTH MODULATING AN INPUT SIGNAL 审中-公开
标题翻译：用于脉冲宽度调制输入信号的布置
公开(公告)号：WO2006030363A2
公开(公告)日：2006-03-23
申请号：PCT/IB2005052961
申请日：2005-09-09
申请人： KONINKL PHILIPS ELECTRONICS NV , NUIJTEN PETRUS A C M , DOOPER LUTSEN
发明人： NUIJTEN PETRUS A C M , DOOPER LUTSEN
IPC分类号： H03M1/08 , H03M3/00
CPC分类号： H03M3/366 , H03M1/0614 , H03M1/822 , H03M3/432 , H04B14/026
摘要： An arrangement for pulse-width modulating an analog or digital input signal is provided. The non-linear distortion generated in the pulse-width modulator is precompensated by applying a signal with reversed error to the pulse-width modulator. The signal with reversed error is generated by a further pulse-width modulator that receives the input signal and whose output signal is subtracted from twice the input signal. The arrangement may e.g. be used to drive class D audio amplifiers.
摘要翻译：提供了用于对模拟或数字输入信号进行脉宽调制的装置。在脉冲宽度调制器中产生的非线性失真通过将具有反向误差的信号施加到脉冲宽度调制器来预先补偿。具有反向误差的信号由接收输入信号的另一脉冲宽度调制器产生，并且其输出信号从输入信号的两倍减去。该装置可以例如用于驱动D类音频放大器。

2. 发明申请

WO2013019019A3 AUDIO SIGNAL PROCESSING METHOD AND AUDIO SIGNAL PROCESSING APPARATUS THEREFOR 审中-公开
标题翻译：音频信号处理方法和音频信号处理装置
公开(公告)号：WO2013019019A3
公开(公告)日：2013-04-11
申请号：PCT/KR2012005941
申请日：2012-07-25
申请人： SAMSUNG ELECTRONICS CO LTD
发明人： CHOI JUNG-MIN , CHO JAE-YONG
IPC分类号： G10L19/00 , G11B20/10
CPC分类号： H03F3/2173 , H03F3/217 , H03M3/366 , H03M3/458
摘要： An audio signal processing apparatus and method are provided. The apparatus includes a stability determiner and a sigma-delta modulator. The stability determiner divides a frequency band of an input audio signal into one or more sub-frequency bands, compares a level of the input audio signal for each of the sub-frequency bands with a threshold for the sub-frequency band, and generates a stability determination signal according to a result of the comparison. The sigma-delta modulator sigma-delta modulates the input audio signal according to the stability determination signal, and outputs a modulation signal.
摘要翻译：提供了一种音频信号处理设备和方法。该装置包括稳定性确定器和Σ-Δ调制器。稳定性确定器将输入音频信号的频带划分为一个或多个子频带，将每个子频带的输入音频信号的电平与子频带的阈值进行比较，并且生成根据比较结果确定稳定性确定信号。 sigma-delta调制器根据稳定性确定信号对输入音频信号进行sigma-delta调制，并输出调制信号。

3. 发明申请

WO2009042749A2 DETECTING OVERLOADING OF AN ANALOG-TO-DIGITAL CONVERTER OF AN IMPLANTABLE MEDICAL DEVICE 审中-公开
标题翻译：检测可植入医疗设备的模拟数字转换器的超载
公开(公告)号：WO2009042749A2
公开(公告)日：2009-04-02
申请号：PCT/US2008/077631
申请日：2008-09-25
申请人： MEDTRONIC, INC , TAN, Wenxiao , ANDERSON, Joel A. , HEINKS, Michael W.
发明人： TAN, Wenxiao , ANDERSON, Joel A. , HEINKS, Michael W.
IPC分类号： A61N1/37 , H03M1/12
CPC分类号： H03M3/366 , A61N1/3706 , A61N1/3718 , H03M3/434
摘要： In general, this disclosure is related to detecting overload within an analog-to-digital converter (ADC) of an implantable medical device (IMD). The IMD may include an overload detection module that determines whether the ADC is operating in an overload condition. When the overload detection module determines the ADC is operating in the overload condition for a particular period of time, the ADC may send an overload signal to a processor that processes the output of the ADC. The overload signal notifies the processor that the ADC is operating in or is close to operating in the overload condition. In response to the indication from the ADC, the processor of the IMD may disregard the output of the ADC. The processor may continue to disregard the output of the ADC until the overload signal is deactivated, thereby indicating that the ADC is no longer in an overloaded condition.
摘要翻译：通常，本公开涉及检测可植入医疗设备（IMD）的模数转换器（ADC）内的过载。 IMD可以包括过载检测模块，该过载检测模块确定ADC是否在过载条件下操作。当过载检测模块确定ADC在过载条件下工作了特定的时间段时，ADC可能会向处理ADC输出的处理器发送过载信号。过载信号通知处理器ADC正在或接近在过载条件下运行。响应来自ADC的指示，IMD的处理器可忽略ADC的输出。处理器可能会继续忽视ADC的输出，直到过载信号被禁用，从而表明ADC不再处于过载状态。

4. 发明申请

WO2004105251A1 A SIGMA-DELTA MODULATOR WITH REDUCED SWITCHING RATE FOR USE IN CLASS-D AMPLIFICATION 审中-公开
标题翻译：具有降低开关速率的SIGMA-DELTA调制器，用于Class-D放大
公开(公告)号：WO2004105251A1
公开(公告)日：2004-12-02
申请号：PCT/US2004/016005
申请日：2004-05-21
申请人： ANALOG DEVICES, INC. , ADAMS, Robert, W. , HOSSACK, David , GAALAAS, Eric
发明人： ADAMS, Robert, W. , HOSSACK, David , GAALAAS, Eric
IPC分类号： H03M3/00
CPC分类号： H03M3/366 , H03F3/217 , H03M3/43 , H03M3/448 , H03M3/45 , H03M3/454
摘要： A sigma delta modulator includes a modulator module that includes a quantizer with variable hysteresis, which receives an input signal to perform necessary modulation operations. A non-linear mapping module receives a signal associated with said input signal and tabulates the necessary hysteresis control information so as to reduce the transition rate of the modulator module.
摘要翻译： Σ-Δ调制器包括调制器模块，其包括具有可变迟滞的量化器，其接收输入信号以执行必要的调制操作。非线性映射模块接收与所述输入信号相关联的信号并列出必要的滞后控制信息，以便降低调制器模块的转换速率。

5. 发明申请

WO2013019019A2 AUDIO SIGNAL PROCESSING METHOD AND AUDIO SIGNAL PROCESSING APPARATUS THEREFOR 审中-公开
标题翻译：音频信号处理方法和音频信号处理装置
公开(公告)号：WO2013019019A2
公开(公告)日：2013-02-07
申请号：PCT/KR2012/005941
申请日：2012-07-25
申请人： SAMSUNG ELECTRONICS CO., LTD.
发明人： CHOI, Jung-min , CHO, Jae-yong
IPC分类号： G10L19/00 , G11B20/10
CPC分类号： H03F3/2173 , H03F3/217 , H03M3/366 , H03M3/458
摘要： An audio signal processing apparatus and method are provided. The apparatus includes a stability determiner and a sigma-delta modulator. The stability determiner divides a frequency band of an input audio signal into one or more sub-frequency bands, compares a level of the input audio signal for each of the sub-frequency bands with a threshold for the sub-frequency band, and generates a stability determination signal according to a result of the comparison. The sigma-delta modulator sigma-delta modulates the input audio signal according to the stability determination signal, and outputs a modulation signal.
摘要翻译：提供一种音频信号处理装置和方法。该装置包括稳定性确定器和Σ-Δ调制器。稳定性确定器将输入音频信号的频带划分为一个或多个子频带，将每个子频带的输入音频信号的电平与子频带的阈值进行比较，并生成稳定性确定信号根据比较结果。 Σ-Δ调制器Σ-Δ根据稳定性确定信号调制输入音频信号，并输出调制信号。

6. 发明申请

WO2006012636A1 OVERLOAD PROTECTION FOR LOOK-AHEAD DELTA SIGMA MODULATORS 审中-公开
标题翻译：前置三角形SIGMA调制器的过载保护
公开(公告)号：WO2006012636A1
公开(公告)日：2006-02-02
申请号：PCT/US2005/026825
申请日：2005-07-18
申请人： CIRRUS LOGIC, INC.
发明人： MELANSON, John, L.
IPC分类号： H03M3/00
CPC分类号： H03M3/366 , H03M3/43 , H03M3/438
摘要： Look-ahead delta sigma modulators of the signal processing systems described herein can anticipate quantizer overload. By anticipating quantizer overload, the look-ahead delta sigma modulators can select an output value y(n) that may have a lower SNR but will prevent quantizer overload in the future. A quantizer overload protection process determines the amount of look-ahead depth to drive state variables of a loop filter of the look-ahead delta sigma modulator to values that would prevent future quantizer overload. By substituting a quantizer (304) of the look-ahead delta sigma modulator with a gain (408) and determining a closed loop impulse response of a look-ahead delta-sigma modulator, the discrete time to achieve an absolute value maximum closed loop response magnitude of the look-ahead delta-sigma modulator has been determined to be directly related to the look-ahead depth that will prevent future quantizer overload.
摘要翻译：本文描述的信号处理系统的前瞻三角Σ调制器可预期量化器过载。通过预期量化器过载，先行的Σ-Σ调制器可以选择可能具有较低SNR但将防止量化器过载的输出值y（n）。量化器过载保护过程确定将先行delta-Σ调制器的环路滤波器的状态变量驱动到将阻止未来量化器过载的值的先行深度的量。通过用增益（408）代替前瞻delta-Σ调制器的量化器（304），并且确定先行delta-sigma调制器的闭环脉冲响应，实现绝对值最大闭环响应的离散时间先前的delta-sigma调制器的幅度已经被确定为与预测深度直接相关，这将防止将来的量化器过载。

7. 发明申请

WO2012035674A1 デルタシグマ変調器审中-公开
标题翻译： DELTA-SIGMA调制器
公开(公告)号：WO2012035674A1
公开(公告)日：2012-03-22
申请号：PCT/JP2011/000347
申请日：2011-01-24
申请人：パナソニック株式会社 , 匂坂雅彦 , 足立寿史
发明人：匂坂　雅彦 , 足立　寿史
IPC分类号： H03M3/02
CPC分类号： H03M3/362 , H03M3/366 , H03M3/452
摘要：　本発明のデルタシグマ変調器は、複数段の積分器（４１～４５）のうち、少なくとも１つの積分器（４１，４２）がオープンループゲインが可変である可変利得差動増幅器（４６，４７）で構成されるとともに、残りの積分器（４３～４５）がオープンループゲインが固定である固定利得差動増幅器（４８～５０）で構成されており、発振しているか否かを判定し、発振していることを判定したときには可変利得差動増幅器（４６，４７）のオープンループゲインを減少させるように制御するオープンループゲイン制御手段（６２，６３）を備える。
摘要翻译：在该Δ-Σ调制器中，多个积分器（41至45）中的一个或多个（41,42）使用具有可变开环增益的可变增益差分放大器（46,47），并且剩余积分器（43至45 ）使用具有固定开环增益的固定增益差分放大器（48至50）。该Δ-Σ调制器设置有确定是否发生谐振的开环增益控制装置（62和63），并且如果确定发生谐振，则控制可变增益差分放大器（46）和47），以便降低其开环增益。

8. 发明申请

WO2009042749A3 DETECTING OVERLOADING OF AN ANALOG-TO-DIGITAL CONVERTER OF AN IMPLANTABLE MEDICAL DEVICE 审中-公开
标题翻译：检测可移植医疗设备的模拟数字转换器的过载
公开(公告)号：WO2009042749A3
公开(公告)日：2009-09-17
申请号：PCT/US2008077631
申请日：2008-09-25
申请人： MEDTRONIC INC , TAN WENXIAO , ANDERSON JOEL A , HEINKS MICHAEL W
发明人： TAN WENXIAO , ANDERSON JOEL A , HEINKS MICHAEL W
IPC分类号： A61N1/37 , H03M1/12
CPC分类号： H03M3/366 , A61N1/3706 , A61N1/3718 , H03M3/434
摘要： In general, this disclosure is related to detecting overload within an analog-to-digital converter (ADC) of an implantable medical device (IMD). The IMD may include an overload detection module that determines whether the ADC is operating in an overload condition. When the overload detection module determines the ADC is operating in the overload condition for a particular period of time, the ADC may send an overload signal to a processor that processes the output of the ADC. The overload signal notifies the processor that the ADC is operating in or is close to operating in the overload condition. In response to the indication from the ADC, the processor of the IMD may disregard the output of the ADC. The processor may continue to disregard the output of the ADC until the overload signal is deactivated, thereby indicating that the ADC is no longer in an overloaded condition.
摘要翻译：通常，本公开涉及检测可植入医疗装置（IMD）的模数转换器（ADC）中的过载。 IMD可以包括一个过载检测模块，用于确定ADC是否工作在过载状态。当过载检测模块确定ADC在特定时间段内处于过载状态时，ADC可能会向处理ADC输出的处理器发送过载信号。过载信号通知处理器ADC正在运行或接近工作在过载状态。响应于ADC的指示，IMD的处理器可能会忽略ADC的输出。处理器可以继续忽略ADC的输出，直到过载信号被去激活，从而指示ADC不再处于过载状态。

9. 发明申请

WO01079990A1 MIXED SIGNAL PROCESSING UNIT WITH IMPROVED DISTORTION AND NOISE CHARACTERISTICS 审中-公开
标题翻译：具有改进的失真和噪声特性的混合信号处理单元
公开(公告)号：WO01079990A1
公开(公告)日：2001-10-25
申请号：PCT/US2001/012559
申请日：2001-04-17
IPC分类号： G06F7/64 , H03M3/00 , H03M3/02
CPC分类号： H03M3/366 , H03M3/454
摘要： A mixed signal processing unit with non-linear feedforward paths (36, 38) to improve total harmonic distortion "THD" and noise characteristics of the processor. Specifically the processor includes a first integrator stage (14) configured to receive an input signal and configured to generate a first integrated signal in response thereto, a second integrator stage (16) coupled to the first integrator stage (14) and configured to generate a second integrated signal from the first integrated signal, a sampling stage (22) coupled to the second integrator stage (16) and configured to sample the second integrated signal received from the second integrator stage (16) at a sample frequency and to generate a logic signal, and a non-linear feed-forward path (36, 38) coupled between the first integrator stage (14) and the sampling stage (22).
摘要翻译：具有非线性前馈路径（36,38）的混合信号处理单元，以改善处理器的总谐波失真“THD”和噪声特性。具体地说，处理器包括第一积分器级（14），其被配置为接收输入信号并被配置为响应于此产生第一积分信号;第二积分器级（16），耦合到第一积分器级（14）并被配置为产生来自所述第一集成信号的第二集成信号，耦合到所述第二积分器级（16）并且被配置为以采样频率对从所述第二积分器级（16）接收的所述第二积分信号进行采样的采样级（22）并且产生逻辑信号以及耦合在第一积分器级（14）和采样级（22）之间的非线性前馈路径（36,38）。

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