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1. 发明申请

WO2010096832A2 SYMMETRIC LOAD DELAY CELL OSCILLATOR 审中-公开
标题翻译：对称负载延迟细胞振荡器
公开(公告)号：WO2010096832A2
公开(公告)日：2010-08-26
申请号：PCT/US2010025107
申请日：2010-02-23
申请人： QUALCOMM INC , HINRICHS JEFFREY M
发明人： HINRICHS JEFFREY M
IPC分类号： H03K3/03
CPC分类号： H03K3/0322 , H03F3/45659 , H03F2203/45636 , H03F2203/45668 , H03F2203/45671
摘要： An oscillator includes a control circuit and a ring of symmetric load delay cells. Each delay cell includes two novel symmetric loads. Each load involves a level shift circuit and a diode-connected transistor coupled in parallel with a current source- connected transistor. The control circuit converts an oscillator input signal into bias control signals that in turn control the effective resistance of the symmetric loads such that delays through the delay cells are a function of the input signal. The control circuit uses a symmetric load replica in a control loop to control the level shift circuits of the delay cells such that the oscillating delay cell output signals have a constant amplitude. In a first advantageous aspect, due to the constant amplitude, the oscillator is operable over a wide frequency range. In a second advantageous aspect, the oscillator input signal to output signal oscillation frequency has a substantially linear relationship.
摘要翻译：振荡器包括控制电路和对称负载延迟单元的环。每个延迟单元包括两个新的对称负载。每个负载都涉及与电流源连接的晶体管并联的电平移位电路和二极管连接的晶体管。控制电路将振荡器输入信号转换成偏置控制信号，该偏置控制信号又控制对称负载的有效电阻，使得通过延迟单元的延迟是输入信号的函数。控制电路使用控制回路中的对称负载复制来控制延迟单元的电平移位电路，使得振荡延迟单元输出信号具有恒定的幅度。在第一有利的方面，由于恒定幅度，振荡器可在宽的频率范围内操作。在第二有利的方面，振荡器输入信号到输出信号振荡频率具有基本线性关系。

2. 发明申请

WO2010033607A1 VOLTAGE CLAMP 审中-公开
标题翻译：电压钳
公开(公告)号：WO2010033607A1
公开(公告)日：2010-03-25
申请号：PCT/US2009/057173
申请日：2009-09-16
申请人： QUALCOMM INCORPORATED , ELLERSICK, William F.
发明人： ELLERSICK, William F.
IPC分类号： H03F1/52 , H03F3/45 , H03G11/00
CPC分类号： H03F3/45188 , H03F1/523 , H03F3/45677 , H03F2200/426 , H03F2200/441 , H03F2200/453 , H03F2200/456 , H03F2200/462 , H03F2200/66 , H03F2203/45186 , H03F2203/45354 , H03F2203/45636 , H03F2203/45641 , H03F2203/45674 , H03G11/002 , H03G11/02
摘要： An active over-voltage clamp system includes at least one over-voltage detector that is responsive to an input voltage and provides a first current. The system also includes a replica over-voltage circuit that provides a second current, and circuitry subtracting the second current from the first current to produce a difference current. The system further includes a differential clamp activated in response to the difference current. The differential clamp prevents the input voltage from increasing beyond a target voltage.
摘要翻译：有源过电压钳位系统包括至少一个过电压检测器，其响应输入电压并提供第一电流。该系统还包括提供第二电流的复制过电压电路，以及从第一电流减去第二电流以产生差电流的电路。该系统还包括响应于差动电流而被激活的差分钳位。差分钳位器可防止输入电压超出目标电压。

3. 发明申请

WO2010132108A1 OPERATIONAL TRANS-CONDUCTANCE AMPLIFIER WITH OUTPUT CLAMP CIRCUIT 审中-公开
标题翻译：具有输出钳位电路的操作变压器放大器
公开(公告)号：WO2010132108A1
公开(公告)日：2010-11-18
申请号：PCT/US2010/001412
申请日：2010-05-11
申请人： ALTASENS, INC. , STANDLEY, David , BLANQUART, Laurent
发明人： STANDLEY, David , BLANQUART, Laurent
IPC分类号： H03F3/00
CPC分类号： H03F1/523 , H03F3/45192 , H03F2200/441 , H03F2203/45636
摘要： An operational trans-conductance amplifier circuit having a voltage clamp circuit. The clamp circuit utilizes low area and power overhead, has a sharp clamp characteristic, and little degradation in the small-signal DC gain at the "knee" of the clamp characteristic. The clamp circuit includes a comparator circuit and a current control circuit. The amplifier and clamp circuits may further include a clamp voltage generator circuit.
摘要翻译：一种具有电压钳位电路的运行的跨导放大器电路。钳位电路利用低面积和功率开销，具有尖锐的钳位特性，并且在钳位特性的“拐点”处的小信号DC增益几乎没有劣化。钳位电路包括比较器电路和电流控制电路。放大器和钳位电路还可以包括钳位电压发生器电路。

4. 发明申请

WO2007135139A1 CIRCUIT FOR LIMITING THE OUTPUT SWING OF AN AMPLIFIER 审中-公开
标题翻译：限制放大器输出振荡的电路
公开(公告)号：WO2007135139A1
公开(公告)日：2007-11-29
申请号：PCT/EP2007/054914
申请日：2007-05-22
申请人： THOMSON LICENSING , VOGEL, Stefan , LEHR, Steffen , MALLORY, Neil
发明人： VOGEL, Stefan , LEHR, Steffen , MALLORY, Neil
IPC分类号： H03F1/34 , H03F3/45 , H03F3/347 , H03F3/50 , G05F1/575 , H03G11/00
CPC分类号： H03F3/45183 , H03F1/34 , H03F3/347 , H03F3/505 , H03F2203/45102 , H03F2203/45552 , H03F2203/45636 , H03F2203/45722 , H03F2203/5031 , H03G11/00
摘要： A circuit for limiting the output signal swing of an amplifier (2) has an output stage (21) and a driving stage (22) connected to a control input (221) of the output stage (21). The output signal (OUT) of the amplifier (2) is fed back to a first input (231) of a differential amplifier (T1, T2). The differential amplifier (T1, T2) controls a decoupling stage (24) connected to the driving stage (22). A clamping signal (Vclamp) is supplied to a second input (232) of the differential amplifier (T1, T2). The decoupling stage (24) forces the driving stage (22) to adjust a control signal to the control input (221) of the output stage (21) in a negative feedback manner when the output signal (OUT) of the amplifier (2) exceeds the clamping signal (Vclamp), such that the output signal (OUT) of the amplifier (2) is limited to a value corresponding to the clamping signal (Vclamp).
摘要翻译：用于限制放大器（2）的输出信号摆幅的电路具有连接到输出级（21）的控制输入端（221）的输出级（21）和驱动级（22）。放大器（2）的输出信号（OUT）被反馈到差分放大器（T1，T2）的第一输入端（231）。差分放大器（T1，T2）控制连接到驱动级（22）的去耦级（24）。钳位信号（Vclamp）被提供给差分放大器（T1，T2）的第二输入端（232）。当放大器（2）的输出信号（OUT）为负时，解耦级（24）迫使驱动级（22）以负反馈方式将控制信号调整到输出级（21）的控制输入端（221）超过钳位信号（Vclamp），使得放大器（2）的输出信号（OUT）被限制为对应于钳位信号（Vclamp）的值。

5. 发明申请

WO2004015857A1 センサ信号出力回路审中-公开
标题翻译：传感器信号输出电路
公开(公告)号：WO2004015857A1
公开(公告)日：2004-02-19
申请号：PCT/JP2003/009791
申请日：2003-08-01
申请人：松下電器産業株式会社 , 黒田啓介 , 植村猛 , 野添利幸
发明人：黒田啓介 , 植村猛 , 野添利幸
IPC分类号： H03F3/45
CPC分类号： H03K5/08 , H03F3/45183 , H03F2203/45566 , H03F2203/45636 , H03F2203/45664 , H03F2203/45674
摘要：本発明のセンサ信号出力回路は、第一の差動増幅器（２６）と、第一の負荷抵抗（３０）と、第一のトランジスタ（５）と、第二のトランジスタ（６）と、リミッタ部とを有し、このリミッタ部は、その一方の入力端に出力端子（３２）を、その他方の入力端に第二の基準電圧設定部（３８）をそれぞれ接続した第二の差動増幅器（２７）と、この第二の差動増幅器（２７）の第二の負荷抵抗（３１）と、そのゲートに第二の差動増幅器（２７）の出力端を、そのソースに第二のトランジスタ（６）のゲートをそれぞれ接続した第三のトランジスタ（７）とから少なくとも構成されるものである。
摘要翻译：传感器信号输出电路包括第一差分放大器（26），第一负载电阻（30），第一晶体管（5），第二晶体管（6）和限幅器部分。限幅器部分至少包括一个第二差分放大器（27），其一个输入端连接到输出端子（32），另一个输入端连接到第二参考电压设置部分（38），第二负载电阻器）和第三晶体管（7），其栅极连接到第二放大器（27）的输出端并且其源极连接到第二晶体管（6）的栅极。

6. 发明申请

WO2008012334A1 AMPLIFIER ARRANGEMENT AND METHOD FOR AMPLIFICATION 审中-公开
标题翻译：放大器布置和放大方法
公开(公告)号：WO2008012334A1
公开(公告)日：2008-01-31
申请号：PCT/EP2007/057685
申请日：2007-07-25
申请人： AUSTRIAMICROSYSTEMS AG , SINGNURKAR, Pramod
发明人： SINGNURKAR, Pramod
IPC分类号： H03F3/45
CPC分类号： H03F3/45183 , H03F2203/45636
摘要： An amplifier arrangement comprises a first transistor (18), a first bias transistor (13) and a first field-effect transistor (51). A first input signal (VN) is supplied for amplification to a control terminal of the first transistor (18). The first bias transistor (13) is coupled to the first transistor (18) via a first node (12). The first field-effect transistor (51) is coupled for clamping of a first node voltage (V1) provided at the first node (12).
摘要翻译：放大器装置包括第一晶体管（18），第一偏置晶体管（13）和第一场效应晶体管（51）。第一输入信号（VN）被提供给第一晶体管（18）的控制端子进行放大。第一偏置晶体管（13）经由第一节点（12）耦合到第一晶体管（18）。第一场效应晶体管（51）被耦合用于钳位设置在第一节点（12）处的第一节点电压（V1）。

7. 发明申请

WO01076062A1 ELECTRONIC CIRCUIT FOR PROVIDING A DESIRED COMMON MODE VOLTAGE TO A DIFFERENTIAL OUTPUT OF AN AMPLIFIER STAGE 审中-公开
标题翻译：用于提供所需的共模电压到放大器级的差分输出的电子电路
公开(公告)号：WO01076062A1
公开(公告)日：2001-10-11
申请号：PCT/EP2001/003364
申请日：2001-03-22
IPC分类号： H03F1/22 , H03F3/45
CPC分类号： H03F3/45659 , H03F1/223 , H03F2203/45636 , H03F2203/45732
摘要： An electronic circuit for supplying a common mode voltage to a differential output of an amplifier stage (AMPSTG). The common mode voltage at the terminals (1) and (2) is approximately equal to the reference voltage (VCM). Transistors (T1 - T4) are biased in their linear region whereas transistors (T5 - T8) are biased in their saturation region. In order to choose the lowest possible reference voltage (VCM), the dimensioning of the transistors (T1 - T4) is such that the currents through the transistors (T1 - T3) have equal current densities, and the current through the transistor (T4) has a current density which is a factor N smaller than the former current densities. The factor N is determined by the ratio of the nominal value of the current through the transistor (T1) and the minimum value of the current through the transistor (T1).
摘要翻译：一种用于向放大器级（AMPSTG）的差分输出提供共模电压的电子电路。端子（1）和（2）的共模电压近似等于参考电压（VCM）。晶体管（T1-T4）偏置在其线性区域，而晶体管（T5-T8）在其饱和区域偏置。为了选择最低可能的参考电压（VCM），晶体管（T1-T4）的尺寸使得通过晶体管（T1-T3）的电流具有相等的电流密度，并且通过晶体管（T4）的电流具有比原来的电流密度小的因子N的电流密度。因子N由通过晶体管（T1）的电流的标称值与通过晶体管（T1）的电流的最小值的比确定。

8. 发明申请

WO1995030271A1 LOW-VOLTAGE CMOS COMPARATOR 审中-公开
标题翻译：低电压CMOS比较器
公开(公告)号：WO1995030271A1
公开(公告)日：1995-11-09
申请号：PCT/US1995005238
申请日：1995-04-27
申请人： ANALOG DEVICES, INC.
发明人： ANALOG DEVICES, INC. , GARAVAN, Patrick, J.
IPC分类号： H03F01/30
CPC分类号： H03F3/45479 , H03F1/303 , H03F3/45192 , H03F3/45475 , H03F3/45986 , H03F2203/45371 , H03F2203/45398 , H03F2203/45462 , H03F2203/45508 , H03F2203/45612 , H03F2203/45636 , H03F2203/45644
摘要： A CMOS comparator which includes a capacitor connected in an electrical path between two amplification stages. The comparator also includes a voltage source, and a switch is provided between the voltage source and the input of the second stage. A variability of electrical parameter of the voltage source can be matched with a parameter of the amplification stage. The comparator can also include another switch between another voltage source and a third stage, with the two voltage sources providing different voltages. A comparator gain stage includes circuitry for deriving a differential current from the two voltages. Circuitry is also provided for loading the differential current to derive an amplified difference voltage. Further circuitry is provided for bypassing the loading circuitry to reduce a quiescent voltage drop associated with the loading circuitry.
摘要翻译： CMOS比较器，其包括连接在两个放大级之间的电路中的电容器。比较器还包括电压源，并且在电压源和第二级的输入之间提供开关。电压源的电参数的变化可以与放大级的参数匹配。比较器还可以包括在另一个电压源和第三级之间的另一个开关，两个电压源提供不同的电压。比较器增益级包括用于从两个电压导出差分电流的电路。还提供电路用于加载差分电流以导出放大的差分电压。提供了进一步的电路来绕过负载电路以减少与负载电路相关联的静态电压降。

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