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    • 1. 发明申请
    • METHODS AND SYSTEMS FOR SECURE INTEROPERABILITY BETWEEN MEDICAL DEVICES
    • 用于确保医疗器械之间的相互适应性的方法和系统
    • WO2012026922A1
    • 2012-03-01
    • PCT/US2010/046460
    • 2010-08-24
    • SMITH & NEPHEW, INC.SMITH, Todd, E.
    • SMITH, Todd, E.
    • G06F19/00H04L29/06
    • H04L41/0809G06F13/10G06F13/105G06F13/126G06F19/00G06F19/321G06F19/3418G16H40/40H04L69/16H04L69/18H04W4/70
    • An interface device is configured to provide one or more links to first-party medical devices, each of which communicates using a proprietary protocol. The interface device can translate between the proprietary protocol and a second protocol that is accessible via a second link to the interface device. Details of the second protocol can be provided to third parties for configuring third-party medical devices to connect to the interface device via the second link. Using the second link, one or more third-party medical devices can send information to and/or receive information from the first-party medical devices without the need for the third-party device (or devices) to have any information about the proprietary protocol(s) of the first-party medical device(s). The first-party medical devices can include surgical tools and related support equipment and the third-party medical device can include a control station used to monitor and control the tools and support equipment.
    • 接口设备被配置为向第一方医疗设备提供一个或多个链路,其中每一个都使用专用协议进行通信。 接口设备可以在专用协议和可经由到接口设备的第二链路访问的第二协议之间进行转换。 可以向第三方提供第二协议的细节,用于配置第三方医疗设备经由第二链路连接到接口设备。 使用第二链路,一个或多个第三方医疗设备可以向第一方医疗设备发送信息和/或从第一方医疗设备接收信息,而不需要第三方设备(或设备)具有关于专有协议的任何信息 (s)的第一方医疗设备。 第一方医疗设备可以包括手术工具和相关的支持设备,第三方医疗设备可以包括用于监控和控制工具和支持设备的控制站。
    • 3. 发明申请
    • METHODS AND APPARATUS FOR INTERFACING BETWEEN A HOST PROCESSOR AND A COPROCESSOR
    • 用于在主机处理器和协处理器之间进行交接的方法和装置
    • WO2008042207A2
    • 2008-04-10
    • PCT/US2007020827
    • 2007-09-27
    • ANALOG DEVICES INCGARG SACHINKRIVACEK PAUL D
    • GARG SACHINKRIVACEK PAUL D
    • G06F9/38G06F13/12G06F13/42
    • G06F13/126G06F9/3881G06F13/4273Y02D10/14Y02D10/151
    • In one aspect, an interface adapted to transfer data between a host processor and an external coprocessor is provided. The interface may be adapted to operate in a plurality of write modes, wherein in a first write mode the write operation is transferred across the interface in two clock cycles and in a second write mode the write operation is transferred across the interface in a single clock cycle. In another aspect, the interface is adapted to perform a first read operation initiated by the host processor and a second read operation initiated by the external coprocessor. In another aspect, the interface includes a plurality of buffers to store read and write operations and a plurality of clock gates to selectively gate of clock signals provided to the plurality of buffers to synchronize transfer of data into and out of the buffers. In another aspect, the interface includes a selectable priority scheme capable of being modified to select between a plurality of priorities that control a preference in transferring operations over the interface when both read and write operations are queued for transfer.
    • 在一个方面,提供了一种适用于在主机处理器和外部协处理器之间传输数据的接口。 该接口可以适用于以多种写入模式操作,其中在第一写入模式中,写入操作在两个时钟周期内通过接口传送,并且在第二写入模式下,写入操作通过接口在单个时钟 周期。 另一方面,接口适于执行由主处理器启动的第一读取操作和由外部协处理器启动的第二读取操作。 在另一方面,接口包括用于存储读取和写入操作的多个缓冲器以及用于选择性地对提供给多个缓冲器的时钟信号进行选通的门以同步数据传入和传出缓冲器。 另一方面,接口包括能够被修改以在多个优先级之间进行选择的可选优先级方案,所述多个优先级在控制读取和写入操作排队等待传输时在接口上传输操作中的偏好。
    • 4. 发明申请
    • COMPUTER SOFTWARE CONTROL AND COMMUNICATION SYSTEM AND METHOD
    • 计算机软件控制与通信系统与方法
    • WO01013249A1
    • 2001-02-22
    • PCT/US2000/022073
    • 2000-08-11
    • G06F13/10G06F13/12G06F13/14
    • G06F13/126
    • The present invention is a computer system and method for facilitating communication between a primary software means (13) on a computer (9) and at least one secondary software means loaded on a computer circuit card (41n) via a communications bus (51). Boththe primary software means and the secondary software means have predefined register storage space for storing data, and in particular, for storing data relating to system and fault status, amongother things. The primary software means (13) communicates, directs and controls the data between itself and among the various secondary software means by interaction between the predefined registers (12). The primary software means (13) communicates, directs and controls the data through the use of common headers present in the registers (12).
    • 本发明是一种用于促进计算机(9)上的主要软件装置(13)与经由通信总线(51)加载在计算机电路卡(41n)上的至少一个辅助软件装置之间的通信的计算机系统和方法。 主要软件手段和辅助软件装置都具有用于存储数据的预定义寄存器存储空间,特别是用于存储与系统和故障状态有关的数据。 主要软件装置(13)通过预定义寄存器(12)之间的交互来通信,指导和控制它们之间和各种次级软件装置之间的数据。 主要软件装置(13)通过使用存在于寄存器(12)中的公用报头来传送,指导和控制数据。
    • 5. 发明申请
    • A METHOD AND APPARATUS FOR AUTOMATICALLY TRANSFERRING I/O BLOCKS BETWEEN A HOST SYSTEM AND A HOST ADAPTER
    • 用于自动传输主机系统和主机适配器之间的I / O块的方法和装置
    • WO00075789A1
    • 2000-12-14
    • PCT/US2000/040053
    • 2000-06-01
    • G06F13/12G06F13/28G06F13/38
    • G06F13/126
    • An input/output (I/O) host adapter (116) in an I/O system processes I/O requests from a host system (102) to a plurality of disk drives or other I/O devices (132-134). The host adapter (116) includes a circuit (202) to automatically transfer I/O requests (command blocks) from a request queue (110) in host memory (106) to a request buffer (210) in the host adapter's memory (138). The host adapter also includes a circuit (204) to automatically transfer I/O responses (status blocks) from a response buffer (212) in the host adapter's memory (138) to a response queue (112) of the host system's memory (102). By automating these transfer tasks, a processing load placed on a processor (112) of the host adapter (116) is reduced.
    • I / O系统中的输入/输出(I / O)主机适配器(116)处理从主机系统(102)到多个磁盘驱动器或其他I / O设备(132-134)的I / O请求。 主机适配器(116)包括电路(202),用于将主机存储器(106)中的请求队列(110)的I / O请求(命令块)自动传送到主机适配器的存储器(138)中的请求缓冲器(210) )。 主机适配器还包括电路(204),用于将主机适配器的存储器(138)中的响应缓冲器(212)的I / O响应(状态块)自动传送到主机系统的存储器(102)的响应队列(112) )。 通过使这些传送任务自动化,放置在主机适配器(116)的处理器(112)上的处理负载被减少。
    • 6. 发明申请
    • COMMUNICATION BUS SYSTEM
    • 通信总线系统
    • WO98031121A2
    • 1998-07-16
    • PCT/IB1998/000018
    • 1998-01-07
    • H04L29/02G06F13/12H04B1/20H04L1/12H04L1/16H04L12/40H04L12/64
    • H04L12/40058G06F13/126H04B1/205H04L1/16H04L12/40065H04L12/40117
    • Requesting stations can issue request packets via a bus. An execution station receives the request packets and executes commands modifiying the same aspect of a state of the execution station in response to request packets from different stations. The execution station keeps information concerning execution of commands which were last executed in response to request packets for all the different requesting stations. The requesting stations can read this information to determine whether the commands corresponding to their packets are executed, even when other requesting stations are also issuing request packets. Preferably, the execution station shows each requesting station only the information about the execution of commands executed in response to its own request packets.
    • 请求站可以通过总线发出请求数据包。 响应于来自不同站的请求分组,执行站接收请求分组并执行修改执行站状态的相同方面的命令。 执行站响应于所有不同请求站的请求分组保持关于最后执行的命令的执行的信息。 即使当其他请求站也发出请求分组时,请求站可以读取该信息来确定与其分组相对应的命令是否被执行。 优选地,执行站仅向每个请求站显示关于响应于其自己的请求分组执行的命令的执行的信息。
    • 9. 发明申请
    • SYSTEM AND METHOD FOR APPLICATION MIGRATION
    • 系统和应用程序迁移方法
    • WO2017095504A1
    • 2017-06-08
    • PCT/US2016/052498
    • 2016-09-19
    • ADVANCED MICRO DEVICES, INC.
    • CAMPBELL, Jonathan LawrenceSHEN, Yuping
    • G06F9/48G06T1/20
    • G06F13/126G06F1/1632G06F1/3293G06F13/4081
    • Described is a method and apparatus for application migration between a dockable device and a docking station in a seamless manner. The dockable device includes a processor and the docking station includes a high-performance processor. The method includes determining a docking state of a dockable device while at least an application is running. Application migration from the dockable device to a docking station is initiated when the dockable device is moving to a docked state. Application migration from the docking station to the dockable device is initiated when the dockable device is moving to an undocked state. The application continues to run during the application migration from the dockable device to the docking station or during the application migration from the docking station to the dockable device.
    • 描述了一种以可无缝方式在可对接设备和对接站之间进行应用迁移的方法和设备。 可对接设备包括处理器,并且对接站包括高性能处理器。 该方法包括在至少一个应用程序正在运行的同时确定可停靠装置的停靠状态。 当可停靠设备移动到停靠状态时,启动从停靠设备到扩展坞的应用程序迁移。 当可对接设备移动到未锁定状态时,从对接站向可对接设备的应用程序迁移开始。 在应用程序从可停靠设备迁移到扩展坞期间或在从扩展坞到可停靠设备的应用程序迁移过程中,应用程序会继续运行。
    • 10. 发明申请
    • MULTI-HOST SATA CONTROLLER
    • 多主机SATA控制器
    • WO2012140670A3
    • 2013-01-10
    • PCT/IN2012000254
    • 2012-04-09
    • INEDA SYSTEMS PVT LTDKANIGICHERLA BALAJITANDABOINA KRISHNA MOHANVOLETI SIVA RAGHURAMYADAV KARAMVEER
    • KANIGICHERLA BALAJITANDABOINA KRISHNA MOHANVOLETI SIVA RAGHURAMYADAV KARAMVEER
    • G06F13/42
    • G06F3/0632G06F3/0625G06F3/067G06F13/126
    • Described herein is a system having a multi-host SATA controller (102) configured to provide communication and control between two or more independent host processors (104) and a single SATA device (108). In one implementation, the multi-host SATA controller (102) includes the device switching layer (206), the device control layer (208), the link layer (210), and the physical layer (212). The device switching layer (206) allows the host processors (104) to issue commands concurrently rather than in sequential order. For this, the device switching layer (206) has independent set of host device registers (214) corresponding to each of the host processors (104). The device switching layer (206) also has independent DMA engines (216) to perform a command pre-fetching from respective host system memories (105). Further, a command switch engine (220) may arbitrate commands in case both the host processors (104) wish to access the SATA device (108) simultaneously.
    • 这里描述的是具有多主机SATA控制器(102)的系统,其被配置为提供两个或多个独立主机处理器(104)和单个SATA设备(108)之间的通信和控制。 在一个实现中,多主机SATA控制器(102)包括设备切换层(206),设备控制层(208),链路层(210)和物理层(212)。 设备切换层(206)允许主处理器(104)同时发布命令,而不是以顺序发布。 为此,设备切换层(206)具有对应于每个主处理器(104)的独立的主机设备寄存器(214)集合。 设备切换层(206)还具有独立的DMA引擎(216),以执行从相应主机系统存储器(105)预取的命令。 此外,命令切换引擎(220)可以在主机处理器(104)希望同时访问SATA设备(108)的情况下仲裁命令。