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3. 发明申请

WO2009022276A2 VERIFICATION OF DESIGN INFORMATION FOR CONTROLLING MANUFACTURE OF A SYSTEM ON A SHIP 审中-公开
标题翻译：船舶系统制造控制设计信息验证
公开(公告)号：WO2009022276A2
公开(公告)日：2009-02-19
申请号：PCT/IB2008/053194
申请日：2008-08-08
申请人： NXP B.V. , STUYT, Jan , DE RUYTER, Bernard, W. , DE JONG, Roelof, P. , STRUIK, Pieter , GEURTS, Joris, H., J.
发明人： STUYT, Jan , DE RUYTER, Bernard, W. , DE JONG, Roelof, P. , STRUIK, Pieter , GEURTS, Joris, H., J.
IPC分类号： G01R31/317
CPC分类号： G01R31/318536 , G01R31/318541
摘要： A system on a chip comprises a plurality of circuit blocks (18), a programmable processor (12) and a communication circuit (16) coupled between the processor (12) and the plurality of circuit blocks (18), the communication circuit (16) being configured to support program controlled access to registers in the circuit blocks (18) from the processor (12), a first and second one of the circuit blocks (18) of the plurality having direct mutual connection (19) for directly passing a signal between the first and second one of the circuit blocks (18) without communication through the communication circuit (12). Design information is used that comprises connection data including an identification of the direct mutual connection (19) and the first and second circuit blocks (18) coupled by the direct mutual connection (19). An additional register is added to the system on a chip coupled to the direct mutual connection (19) to capture and/or control signals at the direct mutual connection (19). The additional register (44, 46) is coupled to the communication circuit to support program controlled access to the additional register (44, 46). Interface programs for the processor (12) are used, each for a specific one of the circuit blocks (18), the interface programs for the first one of the circuit blocks (18) being configured to accept standardized access calls to access the additional register (44, 46). Verification programs are used, each for a respective one of the circuit blocks (18), the verification program for the second one of the circuit blocks (18) comprising instructions for the processor (12) to access registers in the second one of the circuit blocks (18), to use the connection data, or information derived therefrom to select the first one of the circuit blocks (18) on the basis of the identification of the first one of the circuit blocks (18) in the connection data, and to issue the standardized call to the interface program of the selected further one of the circuit blocks (18) to observe and/or control a signal via the direct mutual connection (19) during execution of the verification program for the second one of the circuit blocks (18). Operation of the system on a chip is monitored when operating under control of the verification program.
摘要翻译：芯片上的系统包括耦合在处理器（12）和多个电路块（18）之间的多个电路块（18），可编程处理器（12）和通信电路（16），通信电路（16））被配置为支持对来自处理器（12）的电路块（18）中的寄存器的程序控制访问，所述多个电路块（18）中的第一和第二电路块（18）具有直接相互连接（19），用于直接通过在第一和第二电路块（18）之间的信号，而不通过通信电路（12）通信。使用包括通过直接相互连接（19）和通过直接相互连接（19）耦合的第一和第二电路块（18）的标识的连接数据的设计信息。在耦合到直接相互连接（19）的芯片上的附加寄存器被添加到系统，以在直接相互连接（19）处捕获和/或控制信号。附加寄存器（44,46）耦合到通信电路以支持对附加寄存器（44,46）的程序控制访问。使用用于处理器（12）的接口程序，每个用于电路块（18）中的特定的一个，用于第一个电路块（18）的接口程序被配置为接受标准化访问呼叫以访问附加寄存器（44,46）。使用验证程序，每个用于电路块（18）中的相应一个，用于第二电路块（18）的验证程序包括用于处理器（12）访问电路的第二个中的寄存器的指令块（18），以使用连接数据或其导出的信息根据连接数据中的第一个电路块（18）的识别来选择电路块（18）中的第一个，以及发出对所选择的另一个电路块（18）的接口程序的标准化呼叫，以在电路的第二个的验证程序执行期间经由直接相互连接（19）观察和/或控制信号块（18）。在验证程序的控制下进行操作时，会对芯片上的系统进行操作。

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