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1. 发明申请

WO2018049403A1 ANGULAR RESOLVER IMBALANCE DETECTION 审中-公开
标题翻译：角度分辨率不平衡检测
公开(公告)号：WO2018049403A1
公开(公告)日：2018-03-15
申请号：PCT/US2017/051184
申请日：2017-09-12
申请人： TEXAS INSTRUMENTS INCORPORATED , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： CHELLAMUTHU, Shanmuganand , LI, Qunying , EASWARAN, Sri, Navaneethakrishnan
IPC分类号： B25J13/00 , G01P3/44 , G08C19/46 , H03M1/10
摘要： In described examples, an angular resolver system includes an imbalance detector (1600) for detecting degraded resolver output signals. The imbalance detector (1600) includes first (1602) and second (1604) power averaging circuits and a comparator circuit (1662, 1664, 1670). The first power averaging circuit (1602) includes a first integrator (1646) for generating over a first time window a first average power signal (Vcl) in response to resolver sensor output signals. The second power averaging circuit (1604) includes a second integrator (1648) for generating over a second time window a second average power signal (Vc2) in response to the resolver sensor output signals, where the first time window is longer than the second time window. The comparator circuit (1662, 1664, 1670) compares the first average power signal and the second average power signal and generates a fault signal (1670) when the first average power signal and the second average power signal differ by a selected voltage threshold (1654, 1658).
摘要翻译：在所描述的示例中，角旋转变压器系统包括用于检测退化的旋转变压器输出信号的不平衡检测器（1600）。不平衡检测器（1600）包括第一（1602）和第二（1604）功率平均电路以及比较器电路（1662,1664,1670）。第一功率平均电路（1602）包括第一积分器（1646），用于响应于旋转变压器传感器输出信号在第一时间窗口上产生第一平均功率信号（Vcl）。第二功率平均电路（1604）包括第二积分器（1648），用于响应于分解器传感器输出信号在第二时间窗口上生成第二平均功率信号（Vc2），其中第一时间窗口比第二时间窗口长窗口。当第一平均功率信号和第二平均功率信号相差选定的电压阈值（1654）时，比较器电路（1662,1664,1670）比较第一平均功率信号和第二平均功率信号并产生故障信号，1658）。

2. 发明申请

WO2011081966A2 REDUCED AREA DIGITAL-TO-ANALOG CONVERTER 审中-公开
标题翻译：减少区域数字到模拟转换器
公开(公告)号：WO2011081966A2
公开(公告)日：2011-07-07
申请号：PCT/US2010/060551
申请日：2010-12-15
申请人： TEXAS INSTRUMENTS INCORPORATED , LI, Qunying , TEXAS INSTRUMENTS JAPAN LIMITED
发明人： LI, Qunying
IPC分类号： H03M1/66
CPC分类号： H03M1/785 , H03M1/1061 , H03M1/667 , H03M1/687 , H03M1/808
摘要： One embodiment of the invention includes a digital-to-analog converter (DAC) system (10). A resistive ladder (16) comprises a plurality of resistors (20) having an approximately equal resistance and is arranged in a respective plurality of resistive rungs (18) between first and second ends of the resistive ladder. The first end of the resistive ladder can be coupled to an output and at least a portion of the plurality of resistors between the first end and the second end of the resistive ladder can have a physical size that is descending size-scaled in a direction from the first end of the resistive ladder to the second end of the resistive ladder. A switching circuit (22) is configured to connect each of the plurality of resistive rungs (18) to one of a first voltage and a second voltage based on a binary value of a digital input signal to generate a corresponding analog output voltage at the output.
摘要翻译：本发明的一个实施例包括数模转换器（DAC）系统（10）。电阻梯（16）包括具有大致相等电阻的多个电阻（20），并且布置在电阻梯的第一和第二端之间的相应的多个电阻梯级（18）中。电阻梯的第一端可以耦合到输出，并且电阻梯的第一端和第二端之间的多个电阻的至少一部分可以具有沿着从电阻梯的第一端到电阻梯的第二端。开关电路（22）被配置为基于数字输入信号的二进制值将多个电阻级（18）中的每一个连接到第一电压和第二电压中的一个，以在输出端产生相应的模拟输出电压。

3. 发明申请

WO2022170178A1 OUTPUT TERMINAL FAULT DETECTION CIRCUIT 审中-公开
公开(公告)号：WO2022170178A1
公开(公告)日：2022-08-11
申请号：PCT/US2022/015467
申请日：2022-02-07
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： DEMIRCI, Kemal, Safak , CHELLAMUTHU, Shanmuganand , LI, Qunying
IPC分类号： G01R31/54 , H03F1/20 , H03F3/195 , H03F15/00
摘要： A circuit includes a gain stage (112), first and second amplifiers (121, 122), and a comparison circuit (128). The gain stage (112) has an input and an output. The first amplifier (121) has an input and an output. The input of the first amplifier (121) is coupled to the input of the gain stage (112). The second amplifier (122) has an input and an output. The input of the second amplifier (122) is coupled to the output of the gain stage (112). The comparison circuit (128) is coupled to the outputs of the first and second amplifiers (121, 122). The comparison circuit (128) is configured to compare signals on the outputs of the first and second amplifiers (121, 122) and to generate a fault flag signal (129) responsive to the output signal from the first amplifier (121) being different than the output signal from the second amplifier (122).

4. 发明申请

WO2022265957A1 SOFT HANDOVER IN A COUPLED DUAL-OSCILLATOR SYSTEM 审中-公开
公开(公告)号：WO2022265957A1
公开(公告)日：2022-12-22
申请号：PCT/US2022/033180
申请日：2022-06-13
申请人： TEXAS INSTRUMENTS INCORPORATED
发明人： CHELLAMUTHU, Shanmuganand , LI, Qunying , MANI, Vikram, Joseph
IPC分类号： G01D3/08 , G01D3/10 , G01D5/20
摘要： A system (300) includes a sensor integrated circuit (IC) (302), including a driver (312) adapted to be coupled to an oscillator (316), the driver (312) including first (346) and second (352) transistors. The sensor IC (302) includes an amplitude control amplifier (308) coupled to the first transistor (346). The sensor IC (302) also includes a common mode control amplifier (314) coupled to the second transistor (352). The sensor IC (302) includes a handover control circuit (310) coupled to the amplitude control amplifier (308) and configured to hand off an operation from the sensor IC (302) to a different sensor IC (303), the handover control circuit (310) including a resistor network (338.1 - 338. n) coupled to a switch network (336.1 - 336. n).

5. 发明申请

WO2009023719A3 SQUARE-FUNCTION CIRCUIT 审中-公开
公开(公告)号：WO2009023719A3
公开(公告)日：2009-02-19
申请号：PCT/US2008/073027
申请日：2008-08-13
申请人： TEXAS INSTRUMENTS INCORPORATED , LI, Qunying
发明人： LI, Qunying
IPC分类号： H03K3/02
摘要： A square-function circuit (10) includes an input field-effect transistor (FET) (12) having a gate that is driven by an input voltage (V1N, V1N2) and is configured to conduct an output current (IOUT)- The circuit also includes a feedback circuit (14) coupled to a source of the input FET, the feedback circuit being configured to drive a source of the input FET based on the output current (IOUT) to set a magnitude of the output current (IOUT) to be substantially equal to a square of the input voltage (VIN, V1N2).

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