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1. 发明申请

WO2009020168A1 DISPLAY DEVICE AND ELECTRONIC DEVICE HAVING THE DISPLAY DEVICE, AND METHOD FOR MANUFACTURING THEREOF 审中-公开
标题翻译：具有显示装置的显示装置和电子装置及其制造方法
公开(公告)号：WO2009020168A1
公开(公告)日：2009-02-12
申请号：PCT/JP2008/064173
申请日：2008-07-31
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KOBAYASHI, Satoshi , MIYAGUCHI, Atsushi , MORIYA, Yoshitaka , KUROKAWA, Yoshiyuki , KAWAE, Daisuke
发明人： KOBAYASHI, Satoshi , MIYAGUCHI, Atsushi , MORIYA, Yoshitaka , KUROKAWA, Yoshiyuki , KAWAE, Daisuke
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/66765 , H01L29/04 , H01L29/41733 , H01L29/78696
摘要： To provide a display device including a thin film transistor in which high electric characteristics and reduction in off-current can be achieved. The display device having a thin film transistor includes a substrate, a gate electrode provided over the substrate, a gate insulating film provided over the gate electrode, a microcrystalline semiconductor film provided over the gate electrode with the gate insulating film interposed therebetween, a channel protection layer provided over and in contact with the microcrystalline semiconductor film, an amorphous semiconductor film provided over the gate insulating film and on a side surface of the microcrystalline semiconductor film and the channel protection layer, an impurity semiconductor layer provided over the amorphous semiconductor film, and a source electrode and a drain electrode provided over and in contact with the impurity semiconductor layer. The thickness of the amorphous semiconductor film is larger than that of the microcrystalline semiconductor film.
摘要翻译：提供一种显示装置，其具有可以实现高电特性和减少截止电流的薄膜晶体管。具有薄膜晶体管的显示装置包括基板，设置在基板上的栅极电极，设置在栅电极上的栅极绝缘膜，设置在栅极上的微晶半导体膜，栅极绝缘膜插入其间，沟道保护设置在所述微晶半导体膜上并与所述微晶半导体膜接触的非晶半导体膜，设置在所述栅极绝缘膜上并且在所述微晶半导体膜和所述沟道保护层的侧表面上的非晶半导体膜，设置在所述非晶半导体膜上的杂质半导体层，以及源极电极和漏极电极，其设置在杂质半导体层上并与其接触。非晶半导体膜的厚度大于微晶半导体膜的厚度。

2. 发明申请

WO2010125986A1 METHOD FOR MANUFACTURING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：制造半导体器件的方法
公开(公告)号：WO2010125986A1
公开(公告)日：2010-11-04
申请号：PCT/JP2010/057317
申请日：2010-04-20
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , AKIMOTO, Kengo , KAWAE, Daisuke
发明人： AKIMOTO, Kengo , KAWAE, Daisuke
IPC分类号： H01L29/786 , G02F1/1368 , H01L21/28 , H01L21/336 , H01L29/423 , H01L29/49 , H01L51/50 , H05B33/14
CPC分类号： H01L27/1225 , H01L27/1214 , H01L29/7869
摘要： A formation of a gate electrode provided over an oxide semiconductor layer of a thin film transistor is performed together with a patterning of the oxide semiconductor layer.
摘要翻译：在薄膜晶体管的氧化物半导体层上设置的栅电极的形成与氧化物半导体层的图案化一起进行。

3. 发明申请

WO2011068016A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011068016A1
公开(公告)日：2011-06-09
申请号：PCT/JP2010/070061
申请日：2010-11-04
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KAWAE, Daisuke , GODO, Hiromichi
发明人： YAMAZAKI, Shunpei , KAWAE, Daisuke , GODO, Hiromichi
IPC分类号： H01L29/786 , H01L21/28 , H01L21/8238 , H01L27/08 , H01L27/092 , H01L29/417
CPC分类号： H01L29/45 , H01L27/1225 , H01L29/7869
摘要： One object is to provide a p-channel transistor including an oxide semiconductor. Another object is to provide a complementary metal oxide semiconductor (CMOS) structure of an n-channel transistor including an oxide semiconductor and a p-channel transistor including an oxide semiconductor. A p-channel transistor including an oxide semiconductor includes a gate electrode layer, a gate insulating layer, an oxide semiconductor layer, and a source and drain electrode layers in contact with the oxide semiconductor layer. When the electron affinity and the band gap of an oxide semiconductor used for the oxide semiconductor layer in the semiconductor device, respectively, are ϰ (eV) and E g (eV), the work function ( ϕ m ) of the conductor used for the source electrode layer and the drain electrode layer satisfies ϕ m >ϰ+E g /2 and the barrier for holes ( ϕ Bp ) represented by ( ϰ+E g - ϕ m ) is less than 0.25 eV.
摘要翻译：一个目的是提供一种包括氧化物半导体的p沟道晶体管。另一个目的是提供包括氧化物半导体的n沟道晶体管和包括氧化物半导体的p沟道晶体管的互补金属氧化物半导体（CMOS）结构。包括氧化物半导体的p沟道晶体管包括与氧化物半导体层接触的栅极电极层，栅极绝缘层，氧化物半导体层以及源极和漏极电极层。当半导体器件中用于氧化物半导体层的氧化物半导体的电子亲和力和带隙分别为（eV）和Eg（eV）时，用于源电极层和漏电极层的导体的功函数（Δm）满足θ m +β+ Eg / 2，由（α+ Eg-Δm）表示的空穴阻挡层（ΔBp）小于0.25eV。

4. 发明申请

WO2011062057A1 SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件
公开(公告)号：WO2011062057A1
公开(公告)日：2011-05-26
申请号：PCT/JP2010/069545
申请日：2010-10-27
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KAWAE, Daisuke
发明人： YAMAZAKI, Shunpei , KAWAE, Daisuke
IPC分类号： H01L29/786 , H01L21/336
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/42392 , H01L29/78606 , H01L29/78642 , H01L29/78696
摘要： Provided is a semiconductor device for high power application including a novel semiconductor material with high productivity. Alternatively, provided is a semiconductor device having a novel structure in which the novel semiconductor material is used. Provided is a vertical transistor including a channel formation region formed using an oxide semiconductor which has a wider band gap than a silicon semiconductor and is an intrinsic semiconductor or a substantially intrinsic semiconductor with impurities that can serve as electron donors (donors) in the oxide semiconductor removed. The thickness of the oxide semiconductor is greater than or equal to 1 m, preferably greater than 3 m, more preferably greater than or equal to 10 m, and end portions of one of electrodes that are in contact with the oxide semiconductor is placed inside end portions of the oxide semiconductor.
摘要翻译：提供了一种用于高功率应用的半导体器件，包括具有高生产率的新型半导体材料。或者，提供了具有其中使用新型半导体材料的新颖结构的半导体器件。提供了一种垂直晶体管，其包括使用具有比硅半导体更宽的带隙的氧化物半导体形成的沟道形成区，并且是本征半导体或具有可用作氧化物半导体中的电子给体（供体）的杂质的本质半导体除去。氧化物半导体的厚度大于或等于1μm，优选大于3μm，更优选大于或等于10μm，并且与氧化物半导体接触的电极中的一个的端部位于内侧部分氧化物半导体。

5. 发明申请

WO2011052437A1 NON-LINEAR ELEMENT, DISPLAY DEVICE INCLUDING NON-LINEAR ELEMENT, AND ELECTRONIC DEVICE INCLUDING DISPLAY DEVICE 审中-公开
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：WO2011052437A1
公开(公告)日：2011-05-05
申请号：PCT/JP2010/068414
申请日：2010-10-13
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , KAWAE, Daisuke
发明人： YAMAZAKI, Shunpei , KAWAE, Daisuke
IPC分类号： H01L29/47 , H01L29/786 , H01L29/872 , H01L49/02
CPC分类号： H01L27/0255 , H01L27/1225 , H01L27/1255 , H01L29/78642 , H01L29/7869 , H01L29/861 , H02H9/044 , Y10S257/91
摘要： A non-linear element, such as a diode, in which an oxide semiconductor is used and a rectification property is favorable is provided. In a thin film transistor including an oxide semiconductor in which the hydrogen concentration is less than or equal to 5 x 10 19 /cm 3 , the work function ϕ ms of a source electrode in contact with the oxide semiconductor, the work function ϕ md of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy ϕ ms ≤ χ ϕ md. By electrically connecting a gate electrode and the drain electrode of the thin film transistor, a non-linear element with a more favorable rectification property can be achieved.
摘要翻译：提供了使用氧化物半导体的非线性元件，例如二极管，并且整流性能良好。在包含氢浓度小于或等于5×1019 / cm3的氧化物半导体的薄膜晶体管中，与氧化物半导体接触的源电极的功函数Δms，漏极的功函数ωmd 电极与氧化物半导体接触，电子亲和力的氧化物半导体满足Δms= ？MD。通过电连接薄膜晶体管的栅电极和漏电极，可以实现具有更好的整流特性的非线性元件。

6. 发明申请

WO2011096277A1 SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件和驱动器件的方法
公开(公告)号：WO2011096277A1
公开(公告)日：2011-08-11
申请号：PCT/JP2011/050908
申请日：2011-01-13
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KAWAE, Daisuke
发明人： KAWAE, Daisuke
IPC分类号： G11C11/405 , H01L21/8242 , H01L21/8247 , H01L27/108 , H01L27/115
CPC分类号： H01L27/115 , G11C11/403 , H01L27/1225
摘要： The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source electrode and a drain electrode of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a reading signal line connected to one of a source electrode and a drain electrode of the reading transistor so that a predetermined reading potential is supplied to the reading signal line, and then detecting a potential of the bit line.
摘要翻译：通过写入晶体管和读取晶体管共享位线来减少每单位存储单元的布线数量。通过接通写入晶体管来写入数据，使得位线的电位被提供给写入晶体管的源极和漏极之一以及读取晶体管的栅极电连接的节点，然后关闭写入晶体管，使得在节点中保持预定量的电荷。通过使用连接到读取晶体管的源电极和漏电极之一的读取信号线来读取数据，使得将预定的读取电位提供给读取信号线，然后检测位线的电位。

7. 发明申请

WO2011065209A1 NON-LINEAR ELEMENT, DISPLAY DEVICE INCLUDING NON-LINEAR ELEMENT, AND ELECTRONIC DEVICE INCLUDING DISPLAY DEVICE 审中-公开
标题翻译：非线性元件，包括非线性元件的显示装置和包括显示装置的电子装置
公开(公告)号：WO2011065209A1
公开(公告)日：2011-06-03
申请号：PCT/JP2010/069774
申请日：2010-11-01
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KAWAE, Daisuke , UOCHI, Hideki , YAMAZAKI, Shunpei
发明人： KAWAE, Daisuke , UOCHI, Hideki , YAMAZAKI, Shunpei
IPC分类号： H01L29/861 , G09F9/30 , H01L21/822 , H01L27/04 , H01L29/786
CPC分类号： H01L29/7869 , H01L27/1225 , H01L29/78606 , H01L29/78642 , H01L29/78645 , H01L29/78648 , H01L29/78696
摘要： A non-linear element (such as a diode) which includes an oxide semiconductor and has a favorable rectification property is provided. In a transistor including an oxide semiconductor in which the hydrogen concentration is 5 x 10 19 /cm 3 or lower, a work function ϕms of a source electrode in contact with the oxide semiconductor, a work function ϕmd of a drain electrode in contact with the oxide semiconductor, and electron affinity χ of the oxide semiconductor satisfy ϕms ≤ χ
摘要翻译：提供了包括氧化物半导体并且具有有利的整流特性的非线性元件（例如二极管）。在包含氢浓度为5×1019 / cm3以下的氧化物半导体的晶体管中，与氧化物半导体接触的源电极的功函数Δms，与氧化物半导体，电子亲和力？的氧化物半导体的接触面积满足λms=λ<λmd，并且漏电极和氧化物半导体之间的接触面积大于源电极和氧化物半导体之间的接触面积。通过电连接晶体管中的栅电极和漏电极，可以实现具有良好整流特性的非线性元件。

8. 发明申请

WO2011043175A1 LOGIC CIRCUIT AND DISPLAY DEVICE HAVING THE SAME 审中-公开
标题翻译：具有相同功能的逻辑电路和显示设备
公开(公告)号：WO2011043175A1
公开(公告)日：2011-04-14
申请号：PCT/JP2010/066110
申请日：2010-09-10
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KAWAE, Daisuke
发明人： KAWAE, Daisuke
IPC分类号： H03K19/0175
CPC分类号： H03K19/09407 , G02F1/1362 , G02F1/167 , G02F2001/1674
摘要： It is an object to provide a logic circuit which can be operated even when unipolar transistors are used. A logic circuit includes a source follower circuit and a logic circuit an input portion of which is connected to an output portion of the source follower circuit and all transistors are unipolar transistors. A potential of a wiring for supplying a low potential connected to the source follower circuit is lower than a potential of a wiring for supplying a low potential connected to the logic circuit which includes unipolar transistors. In this manner, a logic circuit which can be operated even with unipolar depletion transistors can be provided.
摘要翻译：本发明的目的是提供即使在使用单极晶体管时也可以进行操作的逻辑电路。逻辑电路包括源极跟随器电路和逻辑电路，其输入部分连接到源极跟随器电路的输出部分，所有晶体管都是单极晶体管。用于提供连接到源极跟随器电路的低电位的布线的电位低于用于提供连接到包括单极晶体管的逻辑电路的低电位的布线的电位。以这种方式，可以提供甚至可以用单极耗尽晶体管操作的逻辑电路。

9. 发明申请

WO2011096264A1 SEMICONDUCTOR DEVICE AND METHOD OF DRIVING SEMICONDUCTOR DEVICE 审中-公开
标题翻译：半导体器件和驱动器件的方法
公开(公告)号：WO2011096264A1
公开(公告)日：2011-08-11
申请号：PCT/JP2011/050614
申请日：2011-01-11
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , KAWAE, Daisuke , UOCHI, Hideki
发明人： KAWAE, Daisuke , UOCHI, Hideki
IPC分类号： G11C11/405 , G11C11/401 , H01L21/8242 , H01L27/108 , H01L29/786
CPC分类号： G11C11/405 , G11C16/02 , H01L27/105 , H01L27/1052 , H01L27/11521 , H01L27/1156 , H01L27/1203 , H01L27/1225
摘要： The number of wirings per unit memory cell is reduced by sharing a bit line by a writing transistor and a reading transistor. Data is written by turning on the writing transistor so that a potential of the bit line is supplied to a node where one of a source and drain electrodes of the writing transistor and a gate electrode of the reading transistor are electrically connected, and then turning off the writing transistor so that a predetermined amount of charge is held in the node. Data is read by using a signal line connected to a capacitor as a reading signal line or a signal line connected to one of a source and drain electrodes of the reading transistor as a reading signal line so that a reading potential is supplied to the reading signal line, and then detecting a potential of the bit line.
摘要翻译：通过由写入晶体管和读取晶体管共享位线来减少每单位存储单元的布线数量。通过接通写入晶体管来写入数据，使得位线的电位被提供给写入晶体管的源极和漏极之一以及读取晶体管的栅极电性连接的节点，然后关断写入晶体管，使得在节点中保持预定量的电荷。通过使用连接到电容器的信号线作为读取信号线或连接到读取晶体管的源极和漏极之一的信号线作为读取信号线来读取数据，使得读取电位被提供给读取信号线，然后检测位线的电位。

10. 发明申请

WO2011077966A1 SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURING THE SAME 审中-公开
标题翻译：半导体器件及其制造方法
公开(公告)号：WO2011077966A1
公开(公告)日：2011-06-30
申请号：PCT/JP2010/072185
申请日：2010-12-03
申请人： SEMICONDUCTOR ENERGY LABORATORY CO., LTD. , YAMAZAKI, Shunpei , GODO, Hiromichi , KAWAE, Daisuke
发明人： YAMAZAKI, Shunpei , GODO, Hiromichi , KAWAE, Daisuke
IPC分类号： H01L29/786 , H01L21/28 , H01L21/336 , H01L29/417
CPC分类号： H01L29/7869 , H01L29/1033 , H01L29/42384 , H01L29/4908 , H01L29/66477 , H01L29/78696
摘要： A semiconductor device which includes an oxide semiconductor layer, a source electrode and a drain electrode electrically connected to the oxide semiconductor layer, a gate insulating layer covering the oxide semiconductor layer, the source electrode, and the drain electrode, and a gate electrode over the gate insulating layer is provided. The thickness of the oxide semiconductor layer is greater than or equal to 1 nm and less than or equal to 10 nm. The gate insulating layer satisfies a relation where εr/d is greater than or equal to 0.08 (nm ∧-1) and less than or equal to 7.9 (nm ∧-1) when the relative permittivity of a material used for the gate insulating layer is r and the thickness of the gate insulating layer is d. The distance between the source electrode and the drain electrode is greater than or equal to 10 nm and less than or equal to 1 μm.
摘要翻译：一种半导体器件，包括氧化物半导体层，与氧化物半导体层电连接的源电极和漏电极，覆盖氧化物半导体层的栅绝缘层，源电极和漏电极以及栅电极提供栅极绝缘层。氧化物半导体层的厚度大于或等于1nm且小于或等于10nm。当用于栅极绝缘层的材料的相对介电常数为0时，栅绝缘层满足er / d大于或等于0.08（nm≤-1）且小于或等于7.9（nm≤-1）的关系是r，栅极绝缘层的厚度为d。源电极和漏电极之间的距离大于或等于10nm且小于或等于1μm。

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