会员体验
专利管家(专利管理)
工作空间(专利管理)
风险监控(情报监控)
数据分析(专利分析)
侵权分析(诉讼无效)
联系我们
交流群
官方交流:
QQ群: 891211   
微信请扫码    >>>
现在联系顾问~
热词
    • 2. 发明申请
    • ADJUSTING SOURCE VOLTAGE BASED ON STORED INFORMATION
    • 基于存储信息调整电源电压
    • WO2017069909A1
    • 2017-04-27
    • PCT/US2016/053120
    • 2016-09-22
    • QUALCOMM INCORPORATED
    • JAIN, PalkeshMEHROTRA, Manoj
    • G06F1/26H02J7/00
    • G06F1/26G06F1/28G06F1/32H02J7/0063H02J2007/0067
    • Apparatuses and methods to adjust a source voltage based on stored information are provided. The apparatus includes a circuit configured to receive power from a power source through a power distribution network, a storage medium storing data specifying one or more electrical characteristics of the circuit, and a control circuit configured to adjust a source voltage at the power source based on the data stored in the storage medium. The method includes receiving power by a circuit from a power source through a power distribution network, reading data specifying one or more electrical characteristics of the circuit from a storage medium, and adjusting a source voltage at the power source based on the data stored in the storage medium.
    • 提供了基于存储的信息来调整源电压的设备和方法。 该设备包括:配置为通过配电网络从电源接收电力的电路;存储指定电路的一个或多个电特性的数据的存储介质;以及配置成基于电压来调整电源处的电源电压的控制电路 存储在存储介质中的数据。 该方法包括由电路通过配电网络从电源接收电力,从存储介质读取指定电路的一个或多个电特性的数据,以及基于存储在存储介质中的数据调整电源处的电源电压 存储介质。
    • 3. 发明申请
    • SYSTEMS AND METHODS FOR ADAPTIVE CLOCK DESIGN
    • 用于自适应时钟设计的系统和方法
    • WO2017184396A1
    • 2017-10-26
    • PCT/US2017/027121
    • 2017-04-12
    • QUALCOMM INCORPORATED
    • JAIN, PalkeshBANSAL, VirendraMEHROTRA, ManojBOWMAN, Keith Alan
    • G06F1/08G06F1/30
    • The present disclosure is directed to mitigating voltage droops. An aspect includes outputting, by a clock module coupled to a multiplexor, a first clock signal to the multiplexor, the first clock signal generated by a clock delay component of the clock module, receiving, by the clock module, a second clock signal from a phase-locked loop (PLL), wherein the PLL outputs a third clock signal to a processor coupled to the PLL and the multiplexor, selecting, by the multiplexor, the first clock signal to output to the processor based on detecting a droop in voltage on a power supply, and selecting, by the multiplexor, the third clock signal to output to the processor based on detecting that the droop in the voltage on the power supply has passed, wherein the clock module and the processor are coupled to the power supply.
    • 本公开针对减轻电压下降。 一个方面包括通过耦合到多路复用器的时钟模块将第一时钟信号输出到多路复用器,第一时钟信号由时钟模块的时钟延迟元件产生,由时钟模块从第一时钟模块接收第二时钟信号 其中所述PLL向耦合到所述PLL和所述多路复用器的处理器输出第三时钟信号,通过所述多路复用器选择所述第一时钟信号以基于检测到所述第一时钟信号中的下垂电压 电源,并且所述多路复用器基于检测到所述电源上的所述电压下降已经过去而选择所述第三时钟信号输出到所述处理器,其中所述时钟模块和所述处理器耦合到所述电源。
    • 4. 发明申请
    • PROBABILISTIC THERMAL HOTSPOT ACCOMMODATION
    • 概率性的热套房住宿
    • WO2017184249A1
    • 2017-10-26
    • PCT/US2017/018601
    • 2017-02-20
    • QUALCOMM INCORPORATED
    • JAIN, PalkeshMEHROTRA, Manoj
    • G06F17/50
    • G06F17/5081G06F17/5036G06F17/5068G06F17/5072G06F2217/80
    • Implementations for probabilistic thermal hotspot accommodation are disclosed herein. In an example aspect, a cell library includes cells having respective leakage current characteristics that include a leakage current variability as well as a leakage current average. In another example aspect, a method obtains cell attribute collections for respective types of multiple cells, with each of the cell attribute collections including a leakage current average and a leakage current variability corresponding to a circuit device of a respective type of cell. The method also obtains an integrated circuit design that describes how multiple circuit devices are interconnected. The method then performs a thermal analysis of the integrated circuit design using the cell attribute collections for the respective types of multiple cells including at least the leakage current variability and the leakage current average.
    • 这里公开了用于概率热热调节的实现。 在一个示例性方面中,单元库包括具有各自泄漏电流特性的单元,所述泄漏电流特性包括泄漏电流可变性以及泄漏电流平均。 在另一个示例方面,一种方法获得用于各个类型的多个小区的小区属性收集,其中每个小区属性收集包括对应于相应类型的小区的电路设备的泄漏电流平均值和泄漏电流可变性。 该方法还获得描述多个电路器件如何互连的集成电路设计。 该方法然后使用用于各个类型的多个单元的单元属性集合来执行集成电路设计的热分析,所述多个单元至少包括泄漏电流变化性和泄漏电流平均值。
    • 5. 发明申请
    • ADJUST VOLTAGE FOR THERMAL MITIGATION
    • 调整电压以减轻热量
    • WO2017151274A2
    • 2017-09-08
    • PCT/US2017/016727
    • 2017-02-06
    • QUALCOMM INCORPORATED
    • JAIN, PalkeshMEHROTRA, ManojPAN, Yuancheng ChrisHU, Shih-Hsin Jason
    • G06F1/20G06F1/32
    • Apparatuses and methods to adjust voltage for thermal mitigation are provided. The apparatus includes a circuit, a plurality of switches configured to provide power of a power domain to the circuit, a plurality of thermal sensors disposed at different locations about the circuit and configured to detect temperatures at the different locations, and a control circuit configured to determine that one of the detected temperatures at one of the locations exceeds a temperature threshold, and in response, adjust one or more of the plurality of switches in proximity with the one location to reduce power provided to the circuit. The method includes providing power of a power domain through a plurality of switches, detecting a temperature at a location exceeding a temperature threshold, and adjusting the plurality of switches in proximity with the location to reduce the power provided, in response to the detecting the temperature exceeding the temperature threshold.
    • 提供了调节用于热减轻的电压的设备和方法。 该设备包括电路,被配置为向电路提供电力域的电力的多个开关,设置在电路周围的不同位置并且被配置为检测不同位置处的温度的多个热传感器,以及控制电路,被配置为 确定位置之一处的检测到的温度之一超过温度阈值,并且作为响应,调整与所述一个位置接近的所述多个开关中的一个或多个,以减少提供给所述电路的功率。 该方法包括通过多个开关提供电力域的电力,检测超过温度阈值的位置处的温度,并且响应于检测到温度而调整接近该位置的多个开关以减小提供的电力 超过温度阈值。