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1. 发明申请

WO2014123925A1 DYNAMIC POWER MANAGEMENT CONTROL 审中-公开
标题翻译：动态电源管理控制
公开(公告)号：WO2014123925A1
公开(公告)日：2014-08-14
申请号：PCT/US2014/014710
申请日：2014-02-04
申请人： QUALCOMM INCORPORATED
发明人： PATEL, Hardik M. , SUTTON, Todd R. , BOSSU, Frederic , ROSOLOWSKI, Chris M. , O'SHEA, Helena Deirdre
IPC分类号： H04W52/02 , H04W52/10
CPC分类号： H04W52/0225 , H04W52/0245 , Y02D70/00
摘要： Exemplary embodiments are related to enhancing power efficiency of an electronic device. A device may include a power management module and a radio-frequency (RF) module coupled to the power management module. The device may further include a digital module coupled to each of the power management module and the RF module and configured to dynamically adjust at least one setting of the power management module based on one or more RF conditions.
摘要翻译：示例性实施例涉及提高电子设备的功率效率。设备可以包括耦合到电源管理模块的电源管理模块和射频（RF）模块。该设备还可以包括耦合到每个电源管理模块和RF模块的数字模块，并且被配置为基于一个或多个RF条件来动态地调整功率管理模块的至少一个设置。

2. 发明申请

WO2014100661A1 DIVERSITY RECEIVER WITH SHARED LOCAL OSCILLATOR SIGNAL IN DIVERSITY MODE 审中-公开
标题翻译：多样性接收器，具有多种局部振荡信号
公开(公告)号：WO2014100661A1
公开(公告)日：2014-06-26
申请号：PCT/US2013/077080
申请日：2013-12-20
申请人： QUALCOMM INCORPORATED
发明人： GUDEM, Prasad Srinivasa Siva , LIU, Li , BOSSU, Frederic
IPC分类号： H04B1/26 , H04B7/08 , H04B1/00
CPC分类号： H03D7/1466 , H04B1/005 , H04B1/0064 , H04B7/0871 , Y02D70/40 , Y02D70/444
摘要： A multi-mode receiver is disclosed that is reconfigurable to share a local oscillator signal in diversity mode to save power consumption. In an exemplary embodiment, an apparatus includes a primary receiver having a primary mixer configured to down-convert a primary signal and a secondary mixer configured to down-convert a secondary signal in carrier aggregation mode. The apparatus also includes a supplemental mixer that uses a shared primary local oscillator (LO) signal generated by a shared primary frequency synthesizer in diversity mode to reduce power consumption. The apparatus further includes a controller configured to disable the secondary mixer and to enable the supplemental mixer to down-convert the secondary signal when operating in the diversity mode.
摘要翻译：公开了一种多模式接收机，其可重新配置以在分集模式下共享本地振荡器信号以节省功耗。在一个示例性实施例中，一种装置包括主接收机，其具有被配置为对主信号进行下变频的主混合器和被配置为在载波聚合模式中对二级信号进行下变频的二级混合器。该装置还包括补充混频器，其使用由分集模式中由共享主频率合成器产生的共享主本地振荡器（LO）信号以减少功耗。该装置还包括控制器，其被配置为在分集模式下操作时禁用辅助混合器并且使辅助混频器能够对次级信号进行下变频。

3. 发明申请

WO2014018179A1 LOW POWER LOCAL OSCILLATOR SIGNAL GENERATION 审中-公开
标题翻译：低功率本地振荡器信号产生
公开(公告)号：WO2014018179A1
公开(公告)日：2014-01-30
申请号：PCT/US2013/045381
申请日：2013-06-12
申请人： QUALCOMM INCORPORATED
发明人： LIU, Li , GUDEM, Prasad Srinivasa Siva , BOSSU, Frederic , NARATHONG, Chiewcharn
IPC分类号： H04W52/02
CPC分类号： H04B17/004 , H04B17/102 , H04B17/20 , H04W52/0274 , Y02D70/00
摘要： A method and apparatus for providing an oscillating signal within a transmitter/receiver circuit is described. The transmitter/receiver circuit may include an oscillator that generates an oscillating signal that may be provided to a low power, low gain mixer of the transmitter/receiver circuit along a shorter circuit path that includes low power circuitry, such as low power buffers and low power frequency dividers. The oscillating signal may also be provided to a high power, high gain mixer along a longer circuit path that includes high power circuitry, such as high power buffers and high power frequency dividers. Specifically, the low power circuitry is adapted to consume less power in an ON state than the high power circuitry in an ON state, and the shorter circuit path has a shorter electrical path length than the longer circuit path.
摘要翻译：描述了一种用于在发射机/接收机电路内提供振荡信号的方法和装置。发射机/接收机电路可以包括产生振荡信号的振荡器，该振荡信号可以沿着包括诸如低功率缓冲器和低功率缓冲器的低功率电路的较短电路路径提供给发射机/接收机电路的低功率低增益混频器功率分频器振荡信号还可以沿着包括高功率电路（例如高功率缓冲器和高功率分频器）的较长电路路径被提供给高功率高增益混频器。具体地，低功率电路适于在ON状态下消耗比处于ON状态的高功率电路处于ON状态的更少的功率，并且较短的电路路径具有比较长电路路径更短的电路径长度。

4. 发明申请

WO2013063506A2 IMPEDANCE BALANCING FOR TRANSMITTER TO RECEIVER REJECTION 审中-公开
标题翻译：发射机接收拒绝的阻抗平衡
公开(公告)号：WO2013063506A2
公开(公告)日：2013-05-02
申请号：PCT/US2012/062276
申请日：2012-10-26
申请人： QUALCOMM INCORPORATED
发明人： SAHOTA, Gurkanwal Singh , BOSSU, Frederic , CETINONERI, Berke
IPC分类号： H04B1/52 , H04B1/58
CPC分类号： H04B1/525 , H04B1/581
摘要： Exemplary embodiments are directed to impedance balancing within a transceiver. A device may include a transformer having a first side coupled to a transmit path and a second side coupled to a receive path. Further, the device may include an antenna tuning network coupled to a first portion of the first side and configured for coupling to an antenna. The device may also include an adjustment unit coupled to a second portion of the first side and configured for being adjusted to enable an impedance at the adjustment unit to be substantially equal to an impedance at the antenna tuning network.
摘要翻译：示范性实施例涉及收发器内的阻抗平衡。设备可以包括具有耦合到发射路径的第一侧和耦合到接收路径的第二侧的变压器。此外，设备可以包括耦合到第一侧的第一部分并被配置为耦合到天线的天线调谐网络。该装置还可以包括耦合到第一侧的第二部分并被配置为被调整以使调节单元处的阻抗基本上等于天线调谐网络处的阻抗的调节单元。

5. 发明申请

WO2018013406A1 FRACTIONAL-N PHASE LOCKED LOOP DELTA SIGMA MODULATOR NOISE REDUCTION USING CHARGE PUMP INTERPOLATION 审中-公开
标题翻译：使用电荷泵插值降低N相锁定环路DELTA SIGMA MODULATOR的噪声
公开(公告)号：WO2018013406A1
公开(公告)日：2018-01-18
申请号：PCT/US2017/040978
申请日：2017-07-06
申请人： QUALCOMM INCORPORATED
发明人： ZHUANG, Jingcheng , CHEN, Xinhua , BOSSU, Frederic , TANG, Yiwu
IPC分类号： H03L7/089 , H03L7/191 , H03L7/197
CPC分类号： H03L7/087 , H03L7/0898 , H03L7/099 , H03L7/191 , H03L7/1974 , H03L7/1976 , H04L7/033
摘要： A phase locked loop has a frequency divider included in a feedback path. The frequency divider generates a first output and a delayed output. The phase locked loop also includes a charge pump to generate an output current based on the first output and the delayed output of the frequency divider.
摘要翻译：锁相环具有包括在反馈路径中的分频器。分频器产生第一个输出和一个延迟输出。锁相环还包括一个电荷泵，用于根据分频器的第一输出和延迟输出产生输出电流。

6. 发明申请

WO2015183548A1 FEEDBACK RECEIVE PATH WITH RF FILTER 审中-公开
标题翻译：反馈采用射频滤波器接收路径
公开(公告)号：WO2015183548A1
公开(公告)日：2015-12-03
申请号：PCT/US2015/030403
申请日：2015-05-12
申请人： QUALCOMM INCORPORATED
发明人： RAI, Shailesh Shekhar , RANJAN, Mahim , GOLDBLATT, Jeremy Mark , BOSSU, Frederic , CHELLAPPA, Vijay
IPC分类号： H04B1/04
CPC分类号： H04B1/12 , H04B1/0475 , H04B15/00 , H04B2001/0416
摘要： An apparatus includes an elliptical inductance-capacitance (LC) filter and a resistive-capacitive (RC) notch filter serially coupled to the elliptical LC filter. The elliptical LC filter and the RC notch filter are configured to filter a radio-frequency (RF) signal received by a feedback receive path.
摘要翻译：一种装置包括串联耦合到椭圆LC滤波器的椭圆电感电容（LC）滤波器和电阻电容（RC）陷波滤波器。椭圆LC滤波器和RC陷波滤波器被配置为对由反馈接收路径接收的射频（RF）信号进行滤波。

7. 发明申请

WO2015183428A1 BIAS TECHNIQUES AND CIRCUIT ARRANGEMENTS TO REDUCE LEAKAGE CURRENT IN A CIRCUIT 审中-公开
标题翻译：偏置技术和电路安排降低电路中的漏电流
公开(公告)号：WO2015183428A1
公开(公告)日：2015-12-03
申请号：PCT/US2015/026922
申请日：2015-04-21
申请人： QUALCOMM INCORPORATED
发明人： BOSSU, Frederic , YOUSSEF, Ahmed Abdel Monem , HUNG, Tsai-Pi , GUDEM, Prasad Srinivasa Siva
IPC分类号： H01L27/02 , H02H9/04
CPC分类号： G05F1/46 , H01L27/0251 , H01L27/0255 , H01L27/0266 , H02H9/045 , H02H9/046
摘要： An apparatus includes an input/output (I/O) pin and an electrostatic discharge device. The electrostatic discharge device is coupled to the I/O pin and to a voltage regulator.
摘要翻译：一种装置包括输入/输出（I / O）引脚和静电放电装置。静电放电装置耦合到I / O引脚和电压调节器。

8. 发明申请

WO2015038381A1 RECEIVER CARRIER AGGREGATION FREQUENCY GENERATION 审中-公开
标题翻译：接收载波聚合频率生成
公开(公告)号：WO2015038381A1
公开(公告)日：2015-03-19
申请号：PCT/US2014/053862
申请日：2014-09-03
申请人： QUALCOMM INCORPORATED
发明人： ZHANG, Gang , BOSSU, Frederic
IPC分类号： H04B1/00
CPC分类号： H04L27/2647 , H04B1/005
摘要： Certain aspects of the present disclosure provide methods and apparatus for generating local oscillator (LO) signals for multiple receive chains. One example circuit for generating first and second signals generally includes a first voltage controlled oscillator (VCO) configured to output the first signal at a first frequency and associated with a first receive chain for receiving a first carrier of an aggregated resource; and a second VCO configured to output the second signal at a second frequency and associated with a second receive chain for receiving a second carrier of the aggregated resource. The second frequency is different than the first frequency. In this manner, pulling or coupling between the two VCOs may be avoided, even if the two VCOs are implemented on the same radio frequency integrated circuit (RFIC).
摘要翻译：本公开的某些方面提供了用于为多个接收链产生本地振荡器（LO）信号的方法和装置。用于产生第一和第二信号的示例电路通常包括被配置为以第一频率输出第一信号并与第一接收链相关联的第一压控振荡器（VCO），用于接收聚合资源的第一载波; 以及第二VCO，被配置为以第二频率输出第二信号并与第二接收链相关联，用于接收聚合资源的第二载波。第二频率与第一频率不同。以这种方式，即使两个VCO实现在相同的射频集成电路（RFIC）上，也可以避免两个VCO之间的拉或耦合。

9. 发明申请

WO2011008999A1 FREQUENCY DIVIDER WITH A CONFIGURABLE DIVIDING RATIO 审中-公开
标题翻译：具有可配置分频比的频率分频器
公开(公告)号：WO2011008999A1
公开(公告)日：2011-01-20
申请号：PCT/US2010/042191
申请日：2010-07-15
申请人： QUALCOMM INCORPORATED , QIAO, Dongjiang , BOSSU, Frederic
发明人： QIAO, Dongjiang , BOSSU, Frederic
IPC分类号： H03K21/00 , H03K23/40 , H03L7/18
CPC分类号： H03K23/40 , H03K21/00
摘要： A method for dividing the frequency of a signal using a configurable dividing ratio is disclosed. An input signal with a first frequency is received at clocked switches in a frequency divider with a configurable dividing ratio. Non-clocked switches inside the frequency divider are operated to select one of multiple dividing ratios. An output signal is output with a second frequency that is the first frequency divided by the selected dividing ratio.
摘要翻译：公开了一种使用可配置分频比对信号频率进行分频的方法。具有第一频率的输入信号在具有可配置分频比的分频器中的时钟开关处被接收。操作分频器内的非时钟开关可以选择多个分频比之一。输出信号以第一频率除以选择的分频比的第二频率输出。

10. 发明申请

WO2015183740A1 TRANSMITTER DIGITAL-TO-ANALOG CONVERTER (DAC)- BASEBAND FILTER (BBF) COMMON MODE INTERFACE 审中-公开
标题翻译：发射机数字到模拟转换器（DAC） - 基带滤波器（BBF）共模接口
公开(公告)号：WO2015183740A1
公开(公告)日：2015-12-03
申请号：PCT/US2015/032207
申请日：2015-05-22
申请人： QUALCOMM INCORPORATED
发明人： CHEN, Minghui , RANJAN, Mahim , GOLDBLATT, Jeremy Mark , BOSSU, Frederic
IPC分类号： H03F3/45
CPC分类号： H03F3/45479 , H02M2001/123 , H03F3/45475 , H03F3/45556 , H03F2203/45078 , H03F2203/45418 , H03F2203/45424 , H03F2203/45526 , H03M1/0607 , H03M1/66
摘要： Removing common-mode current from a pair of complementary current signals, including: generating a common-mode voltage of the pair of complementary current signals including at least a first current signal and a second current signal; measuring and outputting a difference voltage between the generated common-mode voltage and a common-mode reference voltage; and removing at least a portion of the common-mode current from the first current signal and the second current signal based on the difference voltage.
摘要翻译：从一对互补电流信号中去除共模电流，包括：产生包括至少第一电流信号和第二电流信号的一对互补电流信号的共模电压; 测量并输出所产生的共模电压和共模参考电压之间的差分电压; 以及基于所述差电压从所述第一电流信号和所述第二电流信号中去除所述共模电流的至少一部分。

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