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    • 1. 发明申请
    • FABRICATION OF ISOLATED NANOSTRUCTURES AND/OR ARRAYS OF NANOSTRUCTURES
    • 分离的纳米结构和/或纳米结构阵列的制造
    • WO2008018923A2
    • 2008-02-14
    • PCT/US2007/007101
    • 2007-03-22
    • PRESIDENT AND FELLOWS OF HARVARD COLLEGEXU, QiaobingBAO, JimingCAPASSO, FedericoWHITESIDES, George, M.
    • XU, QiaobingBAO, JimingCAPASSO, FedericoWHITESIDES, George, M.
    • B81C1/00031B08B17/065B82Y20/00B82Y30/00G01N21/658G02B2207/101
    • Methods for fabricating nanostructures and articles associated therewith are described. In some embodiments, an isolated nanostructure (e.g., a metal nanowire) or an array of nanostructures can be fabricated by depositing a material (e.g., a metal) on a surface having a plurality of protrusions or indentations. At least a portion of the deposited material may be embedded in an encapsulating material, and the encapsulating material can be cut, for instance, to form a thin slice that includes the deposited material at least partially embedded therein. In some instances, the slice can be positioned on a surface in a desired arrangement. The encapsulating material can be removed from the surface to form one or more isolated nanostructures of the deposited material. Advantageously, dimensions of the nanostructures can be controlled to, e.g., 15 run, to form nanostructures having a variety of shapes and geometries (e.g., wires, rings, and cylinders). Nanostructures can also be formed in a variety of materials, including metals, ceramics, and polymers. In addition, nanostructures can also be fabricated over large areas (e.g., greater than 1 mm 2 ). In some cases, these nanostructures are positioned in association with other components, e.g., to form a functional component of a device.
    • 描述了用于制造纳米结构和与其相关的制品的方法。 在一些实施例中,分离的纳米结构(例如金属纳米线)或纳米结构阵列可以通过在具有多个突起或凹陷的表面上沉积材料(例如金属)来制造。 至少一部分沉积材料可以嵌入封装材料中,并且可以切割封装材料,例如以形成包括至少部分嵌入其中的沉积材料的薄片。 在一些情况下,切片可以以期望的布置定位在表面上。 包封材料可从表面去除以形成沉积材料的一个或多个分离的纳米结构。 有利地,可以将纳米结构的尺寸控制为例如15nm,以形成具有各种形状和几何形状(例如线材,环和圆柱体)的纳米结构。 纳米结构也可以用各种材料形成,包括金属,陶瓷和聚合物。 另外,纳米结构也可以在大面积上制造(例如,大于1mm 2)。 在一些情况下,这些纳米结构与其他组分相关联地定位,例如以形成装置的功能组分。
    • 2. 发明申请
    • ELECTRICALLY-CONDUCTIVE AND SEMI-CONDUCTIVE FILMS
    • 导电和半导体膜
    • WO2007021741A2
    • 2007-02-22
    • PCT/US2006/031028
    • 2006-08-09
    • PRESIDENT AND FELLOWS OF HARVARD COLLEGECAO, TingbingXU, QiaobingWINKLEMAN, AdamWHITESIDES, George
    • CAO, TingbingXU, QiaobingWINKLEMAN, AdamWHITESIDES, George
    • G03F7/00
    • C23C14/20B82Y30/00C23C14/0005C23C14/588G01N33/48707H01L21/76838
    • Methods and apparatuses for generating electrically-conductive and/or semi-conductive films, and more specifically, methods and apparatuses for generating conductive and/or semi-conductive films having nanoscale features are provided. In one embodiment, an electrically-conductive or semi-conductive film (e.g., a gold layer of less than 50 nanometer thickness) is provided on a substrate (e.g., a poly(dimethylsiloxane) (PDMS) stamp). The substrate may optionally include patterns or features having raised and recessed portions. A first portion of the film may be removed from the substrate, e.g., by methods such as physically contacting the first portion of the film with a surface to which the first portion preferentially adheres. This process can leave a second portion of the film remaining on the substrate. In some embodiments, the second portion includes at least one region having a dimension substantially parallel to a portion of the substrate i.e., of less than 50 nanometers. The second portion of the film may be used to establish electrical communication with an electrical contact. Advantageously, electrically-conductive and/or semi-conductive films having nanoscale features can be fabricated over large areas (e.g., areas greater than 1 cm 2 ) in a single step.
    • 提供用于产生导电和/或半导电膜的方法和装置,更具体地,提供了用于产生具有纳米尺度特征的导电和/或半导电膜的方法和装置。 在一个实施例中,在衬底(例如,聚(二甲基硅氧烷)(PDMS)印模)上提供导电或半导电膜(例如,小于50纳米厚度的金层)。 衬底可以可选地包括具有凸起和凹陷部分的图案或特征。 膜的第一部分可以例如通过诸如使膜的第一部分与第一部分优先粘附的表面物理接触的方法从基材上除去。 该过程可以使膜的第二部分残留在基底上。 在一些实施例中,第二部分包括具有基本上平行于基底的一部分的尺寸的至少一个区域,即小于50纳米。 胶片的第二部分可用于与电触点建立电连通。 有利地,可以在单个步骤中在大面积(例如,大于1cm 2的区域)上制造具有纳米尺度特征的导电和/或半导电膜。