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1. 发明申请

WO1997008834A1 FOLDING A/D CONVERTER 审中-公开
标题翻译：折叠A / D转换器
公开(公告)号：WO1997008834A1
公开(公告)日：1997-03-06
申请号：PCT/IB1996000834
申请日：1996-08-26
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , VORENKAMP, Pieter , VAN DE PLASSCHE, Rudy, Johan
IPC分类号： H03M01/36
CPC分类号： H03M1/203 , H03M1/141
摘要： In a folding A/D converter, a comparison part (CPM) provides a plurality of comparison signals Sc1...Sc9 in response to an input signal Si. The transients in the comparison signals Sc1...Sc9 are mutually shifted and substantially overlap. Because of the overlap, only a relatively small input signal variation is needed to pass all the transients. A limiting part (LIM) effectively selects portions of the transients. A combining part (CBM) effectively multiplexes these selected portions into a folding signal Sf. The selection by the limiting part (LIM) prevents distortion of the folding signal Sf, despite the overlap.
摘要翻译：在折叠A / D转换器中，比较部分（CPM）响应于输入信号Si提供多个比较信号Sc1 ... Sc9。比较信号Sc1 ... Sc9中的瞬变相互偏移并且基本上重叠。由于重叠，只需要相对较小的输入信号变化来传递所有瞬变。限制部分（LIM）有效地选择部分瞬变。组合部分（CBM）将这些选择的部分有效地多路复用成折叠信号Sf。限制部分（LIM）的选择防止折叠信号Sf的失真，尽管重叠。

2. 发明申请

WO1996031948A2 DIFFERENTIAL AMPLIFIER WITH SIGNAL-DEPENDENT OFFSET, AND MULTI-STEP DUAL-RESIDUE ANALOG-TO-DIGITAL CONVERTER INCLUDING SUCH A DIFFERENTIAL AMPLIFIER 审中-公开
标题翻译：具有信号相关偏移的差分放大器，以及包含这种差分放大器的多级双重残留模数转换器
公开(公告)号：WO1996031948A2
公开(公告)日：1996-10-10
申请号：PCT/IB1996000195
申请日：1996-03-11
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , VORENKAMP, Pieter , VERDAASDONK, Johannes, Petrus, Maria
IPC分类号： H03F03/45
CPC分类号： H03M1/069 , H03F3/45071 , H03F3/45479 , H03F3/72 , H03F2203/45018 , H03F2203/45031 , H03F2203/45048 , H03F2203/45471 , H03M1/0682 , H03M1/165 , H03M1/363
摘要： A differential amplifier comprises two input transistors (T1, T2) and two cross-coupled transistors (T3, T4) arranged in a translinear loop, the difference voltage across the resistance (10) between the emitters of the cross-coupled transistors (T3, T4) being equal to the difference voltage across the input terminals (2, 4) plus the sum of the offset voltages across resistors (6, 8) arranged in series with the emitters of the input transistors (T1, T2). The difference current through the cross-coupled transistors (T3, T5) is replicated in output transistors (T5, T6), thereby enabling an output signal amplitude larger than the input signal amplitude to be obtained across the resistance between the emitters of the output transistors (T5, T6). The differential amplifier is suitable inter alia as an interpolating residue signal amplifier with additional underflow and overflow ranges in multi-step dual-residue analog-to-digital converters.
摘要翻译：差分放大器包括布置在跨线性环路中的两个输入晶体管（T1，T2）和两个交叉耦合晶体管（T3，T4），交叉耦合晶体管（T3，T4）的发射极之间的电阻（10） T4）等于输入端子（2,4）上的差分电压加上与输入晶体管（T1，T2）的发射极串联布置的电阻器（6,8）之间的偏移电压之和。通过交叉耦合晶体管（T3，T5）的差分电流被复制在输出晶体管（T5，T6）中，从而能够在输出晶体管的发射极之间的电阻之间获得大于输入信号幅度的输出信号幅度（T5，T6）。差分放大器特别适用于多步双残留模数转换器中具有附加下溢和溢出范围的内插残余信号放大器。

3. 发明申请

WO1997009788A2 A/D CONVERSION WITH FOLDING AND INTERPOLATION 审中-公开
标题翻译： A / D转换与折叠和插值
公开(公告)号：WO1997009788A2
公开(公告)日：1997-03-13
申请号：PCT/IB1996000869
申请日：1996-08-29
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , VORENKAMP, Pieter , VENES, Arnoldus, Gerardus, Wilhelmus , VAN DE PLASSCHE, Rudy, Johan
IPC分类号： H03M01/34
CPC分类号： H03M1/204 , H03M1/141
摘要： An A/D converter has an input part IS which provides transitions T1..Tx associated with different levels of an analog input signal Vin. An intermediate part IMS carries out folding and interpolation operations F1, I1 and F2, I2..IN on the transitions T1..Tx to obtain a set of bit-determining signals XO.. XQ. At least one of the operations, folding F1, F2,.. or interpolation I1, IN, is carried out more than once in alternation with the other operation, interpolation I1, IN or folding F1, F2,.. respectively. An output part OS provides a digital output signal Do on the basis of the bit-determining signals XO..XQ. Such an A/D converter can be implemented in a cost-efficient manner and may be combined with digital signal-processing circuitry.
摘要翻译： A / D转换器具有输入部分IS，其提供与模拟输入信号Vin的不同电平相关联的转换T1..Tx。中间部分IMS在转变T1..Tx上执行折叠和内插操作F1，I1和F2，I2..IN，以获得一组位确定信号XO .. XQ。与其他操作，插补I1，IN或折叠F1，F2，...分别交替执行多次折叠F1，F2或..或插值I1，IN的操作中的至少一个。输出部分OS基于比特确定信号XO ... XQ提供数字输出信号Do。这样的A / D转换器可以以成本有效的方式实现，并且可以与数字信号处理电路组合。

4. 发明申请

WO1997028603A1 DISTORTION COMPENSATION FOR A CAPACITIVELY LOADED FOLLOWER 审中-公开
标题翻译：用于电容式充电器的失真补偿
公开(公告)号：WO1997028603A1
公开(公告)日：1997-08-07
申请号：PCT/IB1997000032
申请日：1997-01-17
申请人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB
发明人： PHILIPS ELECTRONICS N.V. , PHILIPS NORDEN AB , VORENKAMP, Pieter
IPC分类号： H03K19/086
CPC分类号： H03F3/50 , H03F1/3223 , H03F2203/5015 , H03F2203/5021 , H03F2203/5024 , H03F2203/5031
摘要： The odd harmonic distortion components in the output signal (vo) of a capacitively loaded follower transistor (2) is reduced by means of an additional transistor (14) inserted between the emitter of the follower transistor (2) and the bias current source (12) of the follower transistor (2) and a second follower transistor (18) which receives the same input signal as the follower transistor (2) and which has its emitter coupled to the emitter of the additional transistor (14) via a compensation capacitor (20). The current iC through the compensation capacitor (20) is added to the output current (io) and compensates for the odd harmonic distortion.
摘要翻译：通过插入在跟随器晶体管（2）的发射极和偏置电流源（12）之间的附加晶体管（14），电容负载的跟随器晶体管（2）的输出信号（vo）中的奇次谐波失真分量被减小）和第二跟随器晶体管（18），其接收与跟随器晶体管（2）相同的输入信号，并且其发射极经由补偿电容器耦合到附加晶体管（14）的发射极 20）。通过补偿电容器（20）的电流iC与输出电流（io）相加，并补偿奇次谐波失真。

5. 发明申请

WO1996038920A1 A/D CONVERTER WITH INTERPOLATION 审中-公开
标题翻译： A / D转换器与插值
公开(公告)号：WO1996038920A1
公开(公告)日：1996-12-05
申请号：PCT/IB1996000536
申请日：1996-05-31
申请人： PHILIPS ELECTRONICS N.V.
发明人： PHILIPS ELECTRONICS N.V. , MORISSON, Richard , VORENKAMP, Pieter
IPC分类号： H03M01/44
CPC分类号： H03M1/205 , H03M1/365
摘要： An A/D converter is described in which an interpolation circuit (15, 16, 17, 18) makes weighted combinations of reference crossing signals (A/Ac, B/Bc) provided by an input circuit (100, 200), so as to obtain an expanded set of reference crossing signals (A/Ac + A1/Ac1..A7/Ac7, B/Bc + B1/Bc1..Bc7). The interpolation circuit (15, 16, 17, 18) is arranged to make at least one weighted combination of reference crossing signals with weighting factors which have a non-integer ratio so as to compensate for a non-linearity in the reference crossing signals (A/Ac, B/Bc). Accordingly, a better compromise is obtained between accuracy, on the one hand, and circuit complexity, on the other hand.
摘要翻译：描述了一种A / D转换器，其中内插电路（15,16,17,18）进行由输入电路（100,200）提供的参考交叉信号（A / Ac，B / Bc）的加权组合，从而以获得扩展的一组参考交叉信号（A / Ac + A1 / Ac1..A7 / Ac7，B / Bc + B1 / Bc1..Bc7）。插值电路（15,16,17,18）被布置成使参考交叉信号与具有非整数比的加权因子的至少一个加权组合以补偿参考交叉信号中的非线性（ A / Ac，B / Bc）。因此，另一方面，一方面在精度与电路复杂性之间获得更好的妥协。

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