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    • 1. 发明申请
    • SECRETS RENEWABILITY
    • 秘密可再生能力
    • WO2014106781A1
    • 2014-07-10
    • PCT/IB2013/055658
    • 2013-07-10
    • NDS LIMITEDKARA-IVANOV, MichaelKIPNIS, AviadREINMAN, TzachyMANGELL, EfraimWAISBARD, ErezBELENKY, Yaacov
    • KARA-IVANOV, MichaelKIPNIS, AviadREINMAN, TzachyMANGELL, EfraimWAISBARD, ErezBELENKY, Yaacov
    • H04L9/08
    • H04L9/0861H04L9/0869
    • A method, system and apparatus for deriving a secondary secret from a root secret are described, the method, system and apparatus including reserving a memory buffer included in an integrated circuit, the memory buffer being large enough to contain all of the bits which will include the secondary secret, receiving a plurality of bits from a root secret, the root secret being stored in a secure memory of the integrated circuit, inputting the plurality of bits from the root secret and at least one control bit into a permutation network, and thereby producing a multiplicity of output bits, the at least one control bit including one of one bit of a value g, and one bit an output of a function which receives g as an input, receiving the multiplicity of output bits from the permutation network, inputting the multiplicity of output bits from the permutation network into a plurality of logic gates, thereby combining the multiplicity of output bits, wherein a fixed number of bits is output from the logic gates, inputting the fixed number of bits output by the logic gates into an error correcting code module, the fixed number of bits output by the logic gates including a first group of intermediate output bits and a second group of intermediate output bits and receiving output bits from the error correcting code module, the output bits of the error correcting code module including the first group of intermediate output bits as changed by the error correcting code module, where the change depends on the second group of intermediate output bits, filling non-filled registers in the reserved memory buffer with the first group of intermediate output bits as changed by the error correcting code module, and repeating the steps of "receiving a plurality of bits from a root secret" through "filling non-filled registers in the reserved memory buffer" until the entire secondary secret is derived, wherein the steps of "receiving a plurality of bits from a root secret" through "filling non-filled registers in the reserved memory buffer" are performed in a single clock cycle of the integrated circuit. Related apparatus, methods and systems are also described.
    • 描述了用于从根秘密导出第二秘密的方法,系统和装置,所述方法,系统和装置包括保留包括在集成电路中的存储器缓冲器,所述存储器缓冲器足够大以包含将包括的所有位 第二秘密,从根秘密接收多个比特,根秘密被存储在集成电路的安全存储器中,从根秘密输入多个比特和至少一个控制比特进入置换网络,从而 产生多个输出比特,所述至少一个控制比特包括值g的一个比特中的一个,一个比特作为接收g作为输入的函数的输出,从置换网络接收多个输出比特,输入 从置换网络到多个逻辑门的多个输出比特,从而组合多个输出比特,其中固定比特数从 逻辑门,将由逻辑门输出的固定位数输入到纠错码模块中,逻辑门输出的固定位数包括第一组中间输出位和第二组中间输出位,并接收 来自纠错码模块的输出位,纠错码模块的输出位包括由纠错码模块改变的第一组中间输出位,其中改变取决于第二组中间输出位, 所述预留存储器缓冲器中的所述第一组中间输出位的补充寄存器被所述纠错码模块改变,并且重复“从根秘密接收多个位”的步骤,通过“将未填充寄存器 保留的存储器缓冲器“,直到导出完整的二级秘密,其中”通过“不填入”从“根秘密接收多个比特” 在保留的存储器缓冲器中的n个填充寄存器“在集成电路的单个时钟周期中执行。 还描述了相关装置,方法和系统。
    • 4. 发明申请
    • PREVENTION OF PLAYBACK ATTACKS USING OTP MEMORY
    • 使用OTP内存防止回击攻击
    • WO2013128244A1
    • 2013-09-06
    • PCT/IB2012/053074
    • 2012-06-19
    • NDS LIMITEDBELENKY, YaacovSUMNER, Reuben
    • BELENKY, YaacovSUMNER, Reuben
    • G06F21/24
    • H04L9/3247G06F3/0679G06F21/64
    • A method for data security includes receiving, in a processor having a one-time programmable (OTP) memory, which includes multiple bits and has a current state defined by the bits of the OTP that have been programmed, new information to be written to a data memory. Based on the new information and the current state, at least one further bit of the OTP memory is selected to be programmed, thereby defining a new state of the OTP memory. A new digital signature is computed over the new information and the new state. The new information and the new digital signature are saved in the data memory. After saving the new information and the new digital signature in the data memory, the at least one further bit of the OTP memory is programmed, whereby the new state becomes the current state. Related apparatus and methods are also disclosed.
    • 一种用于数据安全的方法包括在具有一次可编程(OTP)存储器的处理器中接收包括多个位并具有由已被编程的OTP的位定义的当前状态的待写入的新信息 数据存储器 基于新信息和当前状态,选择OTP存储器的至少另外一个位进行编程,从而定义OTP存储器的新状态。 对新信息和新状态计算新的数字签名。 新的信息和新的数字签名被保存在数据存储器中。 在将新信息和新的数字签名保存在数据存储器中之后,OTP存储器的至少另外一个位被编程,从而新的状态变为当前状态。 还公开了相关的装置和方法。
    • 5. 发明申请
    • KEY MANAGEMENT SYSTEM
    • 关键管理系统
    • WO2007113802A2
    • 2007-10-11
    • PCT/IL2007/000387
    • 2007-03-25
    • NDS LIMITEDSHEN-ORR, ChaimHIBSHOOSH, EliphazBELENKY, YaacovICKOWICZ, Gabi
    • SHEN-ORR, ChaimHIBSHOOSH, EliphazBELENKY, YaacovICKOWICZ, Gabi
    • G06F21/24
    • H04N7/162H04N5/913H04N21/4405H04N21/4408H04N21/4623H04N2005/91364
    • A key management method including receiving content scrambled with a first scrambling algorithm (FSA), determining whether to descramble the content according to a first rule and producing a first result, only if the first result indicates that the content should be descrambled, descrambling the content according to an FSA control word, determining whether to apply a second scrambling algorithm (SSA) according to a second rule and producing a second result, and only if the second result indicates that the SSA should be applied, applying the SSA, the applying the SSA including re-scrambling according to a SSA control word, wherein the FSA control word changes at an FSA control word change time, and the method also includes changing the SSA control word in lockstep fashion with the FSA control word, such that each change of the FSA control word causes a change of the SSA control word. Related methods and apparatus are also described.
    • 一种密钥管理方法,包括:接收利用第一加扰算法(FSA)加扰的内容,根据第一规则确定是否解密该内容并产生第一结果,只有当第一结果指示该内容应被解扰时,对该内容进行解扰 根据FSA控制字,确定是否根据第二规则应用第二加扰算法(SSA)并产生第二结果,并且仅当第二结果指示应用SSA时,应用SSA,应用 SSA包括根据SSA控制字的重新加扰,其中FSA控制字以FSA控制字改变时间改变,并且该方法还包括以FSA控制字的锁定方式改变SSA控制字,使得每个改变 FSA控制字导致SSA控制字的改变。 还描述了相关方法和装置。
    • 8. 发明申请
    • PERIOD KEYS
    • WO2007107976A3
    • 2007-09-27
    • PCT/IL2007/000083
    • 2007-01-22
    • NDS LIMITEDBELENKY, Yaacov
    • BELENKY, Yaacov
    • H04L9/00H04K1/00
    • A method for securing encryption keys is described, the method including providing a first device and a second device (110 and 120), the devices include secure and insecure hardware, generating in the secure hardware at least two period keys (150-165), generating in the secure hardware a plurality of session keys (170a-190a and 170b-190b), the session keys being stored in either the secure hardware or the insecure hardware, encrypting at least one of the plurality of session keys generated in the device according to a first of the two period keys (150-165) included in the secure hardware, encrypting at least one of the plurality of session keys (170a-190a and 170b-190b), generated according to a second of the two period keys (150-165), wherein the at least two period keys (150-165) included in the first device and the at least two period keys (150-165) included in the second device are periodically regenerated in order to produce new period keys (150-165), thereby rendering useless any session keys (170a-190a and 170b-190b) encrypted according to an old period key.
    • 9. 发明申请
    • DATA EXPANSION USING AN APPROXIMATE METHOD
    • 数据扩展使用近似方法
    • WO2011114197A1
    • 2011-09-22
    • PCT/IB2010/054257
    • 2010-09-21
    • NDS LIMITEDBELENKY, Yaacov
    • BELENKY, Yaacov
    • H04L9/08H04L9/30
    • H04L9/3263H04L9/0897H04L9/3093
    • A method for computation is described, the method including configuring a processor to expand input seed values into respective output data values using an approximated expansion process such that the output data values are not guaranteed to satisfy a required output data criterion, selecting a seed value so that an output data value generated by the processor by application of the approximated expansion process to the selected seed value will yield an output data value that satisfies the required output data criterion, and storing the selected seed value in a non-volatile memory to be accessed by the processor. Related apparatus and systems are also described.
    • 描述了一种用于计算的方法,所述方法包括配置处理器以使用近似扩展处理将输入种子值扩展为相应的输出数据值,使得输出数据值不能保证满足所需的输出数据标准,从而选择种子值 由处理器通过将所接近的扩展处理应用于选择的种子值而产生的输出数据值将产生满足所需输出数据准则的输出数据值,并将所选择的种子值存储在要访问的非易失性存储器中 由处理器。 还描述了相关装置和系统。