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1. 发明申请

WO2015112513A1 METHOD AND APPARATUS FOR EXCESS LOOP DELAY COMPENSATION IN DELTA-SIGMA MODULATOR 审中-公开
标题翻译：在DELTA-SIGMA调制器中进行循环延迟补偿的方法和装置
公开(公告)号：WO2015112513A1
公开(公告)日：2015-07-30
申请号：PCT/US2015/012098
申请日：2015-01-20
申请人： MEDIATEK SINGAPORE PTE. LTD. , LO, Chi-Lun , HO, Stacy
发明人： LO, Chi-Lun , HO, Stacy
IPC分类号： H03M3/00
CPC分类号： H03M3/422 , H03M3/37 , H03M3/424 , H03M3/50
摘要： A delta-sigma modulator includes a signal subtraction circuit, a loop filter, a quantizer, a digital-to-analog converter (DAC), and a control circuit. The signal subtraction circuit subtracts an analog feedback signal from an analog input signal to generate a difference signal. The loop filter performs a filtering operation upon the difference signal to generate a filtered signal. The quantizer quantizes the filtered signal into a digital output signal, wherein at least one inherent circuit characteristic of the quantizer are adjusted in response to a digital code input. The DAC generates the analog feedback signal according to the digital output signal. The control circuit generates the digital code input to the quantizer for setting an excess loop delay (ELD) compensation.
摘要翻译： Δ-Σ调制器包括信号减法电路，环路滤波器，量化器，数模转换器（DAC）和控制电路。信号减法电路从模拟输入信号中减去模拟反馈信号，生成差分信号。环路滤波器对差分信号执行滤波操作以产生滤波信号。量化器将经滤波的信号量化为数字输出信号，其中响应于数字代码输入调整量化器的至少一个固有电路特性。 DAC根据数字输出信号产生模拟反馈信号。控制电路产生输入到量化器的数字代码，用于设定多余的循环延迟（ELD）补偿。

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