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1. 发明申请

WO2013131082A1 CONFIGURABLE, HIGHLY-INTEGRATED SATELLITE RECEIVER 审中-公开
标题翻译：可配置，高度集成的卫星接收器
公开(公告)号：WO2013131082A1
公开(公告)日：2013-09-06
申请号：PCT/US2013/028860
申请日：2013-03-04
申请人： MAXLINEAR, INC. , REDDY, Madhukar , CHANG, Glenn , GALLAGHER, Timothy , SWAROOP, Shantha Murthy Prem , LING, Curtis , PULLELA, Raja
发明人： REDDY, Madhukar , CHANG, Glenn , GALLAGHER, Timothy , SWAROOP, Shantha Murthy Prem , LING, Curtis , PULLELA, Raja
IPC分类号： H04B1/16
CPC分类号： H04H40/90 , H04N21/6143
摘要： A direct broadcast satellite (DBS) reception assembly may comprise an integrated circuit that is configurable between or among a plurality of configurations based on content requested by client devices served by the DBS reception assembly. In a first configuration, multiple satellite frequency bands may be digitized by the integrated circuit as a single wideband signal. In a second configuration, the satellite frequency bands may be digitized by the integrated circuit as a plurality of separate narrowband signals. The integrated circuit may comprise a plurality of receive paths, each of the receive chains comprising a respective one of a plurality of low noise amplifiers and a plurality of analog-to-digital converters.
摘要翻译：直接广播卫星（DBS）接收组件可以包括可以基于由DBS接收组件服务的客户端设备请求的内容在多个配置之间或之间配置的集成电路。在第一配置中，多个卫星频带可以被集成电路数字化为单个宽带信号。在第二配置中，卫星频带可以由集成电路数字化为多个单独的窄带信号。集成电路可以包括多个接收路径，每个接收链包括多个低噪声放大器和多个模数转换器中的相应一个。

2. 发明申请

WO2014008319A1 METHOD AND SYSTEM FOR IMPROVEMENT CROSS POLARIZATION REJECTION AND TOLERATING COUPLING BETWEEN SATELLITE SIGNALS 审中-公开
标题翻译：用于改善卫星信号之间的极化极化抑制和抑制耦合的方法和系统
公开(公告)号：WO2014008319A1
公开(公告)日：2014-01-09
申请号：PCT/US2013/049172
申请日：2013-07-02
申请人： MAXLINEAR, INC. , PULLELA, Raja , CHANG, Glenn , GALLAGHER, Timothy
发明人： PULLELA, Raja , CHANG, Glenn , GALLAGHER, Timothy
IPC分类号： H03D1/04
CPC分类号： H04L1/0091 , H04H40/90
摘要： Methods and systems for improved cross polarization rejection and tolerating of coupling between satellite signals may comprise receiving radio frequency (RF) signals on a chip, where the RF signals comprising a desired signal and at least one crosstalk signal. The received RF signals may be down-converted to baseband frequencies, and the down-converted signals are converted to digital signals. Crosstalk may be determined by estimating complex coupling coefficients between the received RF signals utilizing a de-correlation algorithm across a frequency bandwidth comprising the desired and crosstalk signals. The down-converted signals may be low-pass filtered and summed with an output signal from a cancellation filter. The complex coupling coefficients may be determined utilizing the de-correlation algorithm on the summed signals, and may be used to configure the cancellation filter. Crosstalk may be canceled in a receiver path from a cancellation filter receiving low-pass filtered down-converted signals from another path.
摘要翻译：用于改进交叉极化抑制和卫星信号之间耦合的容忍的方法和系统可以包括在芯片上接收射频（RF）信号，其中RF信号包括期望的信号和至少一个串扰信号。所接收的RF信号可以被下变频到基带频率，并且下变频信号被转换成数字信号。可以通过利用包括期望和串扰信号的频率带宽上的去相关算法来估计接收的RF信号之间的复耦合系数来确定串扰。下变频信号可以被低通滤波，并与来自消除滤波器的输出信号相加。复数耦合系数可以利用求和信号上的去相关算法来确定，并且可以用于配置消除滤波器。从接收来自另一路径的低通滤波的下变频信号的消除滤波器的接收机路径中可能会消除串扰。

3. 发明申请

WO2011085027A1 HIGH DYNAMIC RANGE RADIO ARCHITECTURE WITH ENHANCED IMAGE REJECTION 审中-公开
标题翻译：高动态范围无线电建筑与增强图像抑制
公开(公告)号：WO2011085027A1
公开(公告)日：2011-07-14
申请号：PCT/US2011/020257
申请日：2011-01-05
申请人： MAXLINEAR, INC. , PULLELA, Raja , SU, Yu , CHEN, Wenjian
发明人： PULLELA, Raja , SU, Yu , CHEN, Wenjian
IPC分类号： G06G7/12
CPC分类号： H04L25/08 , H03D7/165 , H04B1/30
摘要： A circuit for down-converting an RF signal to a baseband signal includes a trans-admittance amplifier adapted to receive the RF signal and generate in response a pair of differential current signals. The circuit further includes a trans-impedance amplifier having at least four mixers and at least four linear amplifiers. The four mixers frequency down-convert the pair of differential current signals to generate four pairs of differential baseband current signals, wherein each pair of the differential baseband current signals has a different phase and is associated with each of the linear amplifiers. Additionally, the circuit includes a summing block that generates an in-phase signal using a first weighted sum of the four different baseband current signals and a quadrature signal using a second weighted sum of the four different baseband current signals. The circuit further includes an analog-to-digital converter for converting the in-phase and quadrature signals to respective digital
摘要翻译：用于将RF信号下变频为基带信号的电路包括适合于接收RF信号并响应于一对差分电流信号产生的导纳放大器。电路还包括具有至少四个混频器和至少四个线性放大器的跨阻抗放大器。四个混频器对一对差分电流信号进行下变频，以产生四对差分基带电流信号，其中每对差分基带电流信号具有不同的相位并且与每个线性放大器相关联。此外，该电路包括一个求和块，其使用四个不同基带电流信号的第一加权和产生同相信号，并使用四个不同基带电流信号的第二加权和产生正交信号。该电路还包括用于将同相和正交信号转换为相应数字的模拟 - 数字转换器

4. 发明申请

WO2014011862A2 METHOD AND SYSTEM FOR GAIN CONTROL FOR TIME-INTERLEAVED ANALOG-TO-DIGITAL CONVERTOR (ADC) 审中-公开
标题翻译：用于时间间隔模数转换器（ADC）的增益控制方法和系统
公开(公告)号：WO2014011862A2
公开(公告)日：2014-01-16
申请号：PCT/US2013/050056
申请日：2013-07-11
申请人： MAXLINEAR, INC. , PULLELA, Raja , LING, Curtis
发明人： PULLELA, Raja , LING, Curtis
IPC分类号： H03M1/50 , H03M1/12
CPC分类号： H03M1/50 , H03M1/12 , H03M1/1215 , H03M1/185 , H04B17/21 , H04B17/24
摘要： A system for processing signals may be configured to apply digital conversion to analog signals, and to apply, prior to the analog-to-digital conversion, a gain to at least a portion of the analog signals. The gain may be controlled and/or adjusted based on processing of digital output generated based on the analog-to-digital conversion. The system may comprise a plurality of sampling slices, which may be configured to provide the analog-to-digital conversion in interleaved (e.g., time-interleaved) manner. Each of the sampling slices may comprise a dedicated gain element, for applying gain to signals handled by the corresponding slice. The gain applied by the gain elements of the sampling slices may be controlled, independently, collectively, and/or in based on grouping into subsets. The gain may be controlled based on application of a particular gain control algorithm, which may be selected from a plurality of predefined algorithms.
摘要翻译：用于处理信号的系统可以被配置为将数字转换应用于模拟信号，并且在模数转换之前将增益应用于至少一部分模拟信号。可以基于基于模数转换产生的数字输出的处理来控制和/或调整增益。该系统可以包括多个采样片，其可以被配置为以交织（例如，时间交织）的方式提供模数转换。每个采样片可以包括专用增益元件，用于对由对应的片处理的信号施加增益。由采样片的增益元件施加的增益可以独立地，集体地和/或基于对子集的分组进行控制。可以基于可以从多个预定义算法中选择的特定增益控制算法的应用来控制增益。

5. 发明申请

WO2007047540A2 DOWNCONVERTING MIXER 审中-公开
标题翻译：疏水混合器
公开(公告)号：WO2007047540A2
公开(公告)日：2007-04-26
申请号：PCT/US2006/040281
申请日：2006-10-13
申请人： SKYWORKS SOLUTIONS, INC. , PULLELA, Raja , YE, Peihua , SOWLATI, Tirdad
发明人： PULLELA, Raja , YE, Peihua , SOWLATI, Tirdad
IPC分类号： H04B1/26
CPC分类号： H03D7/18 , H03D7/1433 , H03D7/1441 , H03D7/1458 , H03D7/165 , H03D2200/0047
摘要： A downconverter is provided. The downconverter includes a I mixer and a Q mixer. Each mixer includes a transconductance stage and a mixer core stage. The outputs of the transconductance stages of the mixers are shorted together, and a resistors are arranged in series with an input of the mixer core stages.
摘要翻译：提供下变频器。下变频器包括I混频器和Q混频器。每个混合器包括跨导级和混频器核级。混频器的跨导级的输出短路在一起，并且电阻器与混频器核心级的输入串联布置。

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