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1. 发明申请

WO2017168229A8 SYSTEMS AND METHODS FOR HEAD-MOUNTED DISPLAY ADAPTED TO HUMAN VISUAL MECHANISM 审中-公开
公开(公告)号：WO2017168229A8
公开(公告)日：2017-10-05
申请号：PCT/IB2017/000283
申请日：2017-03-10
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED
发明人： MOLONEY, David , BARRY, Brendan
IPC分类号： H04N13/04 , G02B27/01 , H04N19/167
摘要： Systems and methods are provided for rendering of a dual eye-specific display. The system tracks the user's eye movements and/or positions, in some implementations, based on electroencephalography (EEG) of the user, to correctly label the central (foveal) and peripheral (extra-foveal) areas of the display. Foveal data is fully rendered while extra-foveal data is reduced in resolution and, in some implementations, shared between the two displays.

2. 发明申请

WO2016170434A3 HARDWARE ACCELERATOR FOR HISTOGRAM OF GRADIENTS 审中-公开
公开(公告)号：WO2016170434A3
公开(公告)日：2016-10-27
申请号：PCT/IB2016/001102
申请日：2016-01-06
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED
发明人： RICHMOND, Richard , BRICK, Cormac , BARRY, Brendan , MOLONEY, David
IPC分类号： G06K9/46 , G06K9/00
摘要： One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.

3. 发明申请

WO2016016730A1 LOW POWER COMPUTATIONAL IMAGING 审中-公开
标题翻译：低功率计算成像
公开(公告)号：WO2016016730A1
公开(公告)日：2016-02-04
申请号：PCT/IB2015/001845
申请日：2015-07-29
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED
发明人： BARRY, Brendan , RICHMOND, Richard , CONNOR, Fergal , MOLONEY, David
IPC分类号： G06F1/32 , G06T1/20
CPC分类号： G06F1/3287 , G06T1/20 , Y02D10/171
摘要： The present application discloses a computing device (100) that can provide a low-power, highly capable computing platform for computational imaging. The computing device can include one or more processing units, for example one or more vector processors (102) and one or more hardware accelerators (104), an intelligent memory fabric (106), a peripheral device (108), and a power management module (110). The computing device can communicate with external devices, such as one or more image sensors, an accelerometer, a gyroscope, or any other suitable sensor devices.
摘要翻译：本申请公开了一种计算设备（100），其可以提供用于计算成像的低功率，高能力的计算平台。计算设备可以包括一个或多个处理单元，例如一个或多个矢量处理器（102）和一个或多个硬件加速器（104），智能存储器结构（106），外围设备（108）和电源管理模块（110）。计算设备可以与诸如一个或多个图像传感器，加速度计，陀螺仪或任何其它合适的传感器设备的外部设备进行通信。

4. 发明申请

WO2016016726A2 VECTOR PROCESSOR 审中-公开
标题翻译：矢量处理器
公开(公告)号：WO2016016726A2
公开(公告)日：2016-02-04
申请号：PCT/IB2015/001805
申请日：2015-07-27
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED
发明人： BARRY, Brendan , CONNOR, Fergal , O'RIORDAN, Martin , MOLONEY, David , POWER, Sean
CPC分类号： G06F9/3005 , G06F1/0307 , G06F1/035 , G06F9/30149 , G06F9/3814
摘要： A vector processor is disclosed including a variety of variable-length instructions. Computer-implemented methods are disclosed for efficiently carrying out a variety of operations in a time-conscious, memory-efficient, and power-efficient manner. Methods for more efficiently managing a buffer by controlling the threshold based on the length of delay line instructions are disclosed. Methods for disposing multi-type and multi-size operations in hardware are disclosed. Methods for condensing look-up tables are disclosed. Methods for in-line alteration of variables are disclosed.
摘要翻译：公开了一种矢量处理器，其包括各种可变长度指令。公开了计算机实现的方法，用于以时间意识，记忆效率和功率有效的方式有效地执行各种操作。公开了通过基于延迟线指令的长度控制阈值来更有效地管理缓冲器的方法。公开了在硬件中配置多尺寸和多尺寸操作的方法。公开了冷凝查找表的方法。公开了在线改变变量的方法。

5. 发明申请

WO2016170434A2 HARDWARE ACCELERATOR FOR HISTOGRAM OF GRADIENTS 审中-公开
标题翻译：硬件加速器用于等级的组织
公开(公告)号：WO2016170434A2
公开(公告)日：2016-10-27
申请号：PCT/IB2016/001102
申请日：2016-01-06
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED
发明人： RICHMOND, Richard , BARRY, Brendan , MOLONEY, David , BRICK, Cormac
CPC分类号： G06T5/40 , G06K9/00986 , G06K9/46 , G06K9/4642 , G06K9/52 , G06K2009/4666 , G06T2207/10004
摘要： One of the challenges in bringing computational imaging to a mass market is that computational imaging is inherently computationally expensive. The computational challenges associated with computational imaging are apparent with the computation of a histogram of gradient descriptors. Oftentimes, generating a histogram of gradient descriptors involves computing gradients of an image, binning the gradients according to their orientation, and, optionally, normalizing the bins using a non-linear function. Because each of these operations is expensive, the histogram of gradient descriptor computations is generally computationally expensive and is difficult to implement in a power efficient manner for mobile applications. The present application discloses a computing device that can provide a low-power, highly capable computing platform for computing a histogram of gradient descriptors.
摘要翻译：将计算成像带入大众市场的挑战之一是，计算成像在本质上是计算上昂贵的。通过计算梯度描述符的直方图，与计算成像相关的计算挑战是显而易见的。通常，生成梯度描述符的直方图包括计算图像的梯度，根据其方向对应梯度，以及可选地使用非线性函数归一化箱。因为这些操作中的每一个都是昂贵的，所以梯度描述符计算的直方图通常在计算上是昂贵的，并且难以以移动应用的功率有效的方式实现。本申请公开了一种计算设备，其可以提供用于计算梯度描述符的直方图的低功率，高功能的计算平台。

6. 发明申请

WO2015071771A2 APPARATUS, SYSTEMS, AND METHODS FOR REMOVING NOISE FROM AN IMAGE 审中-公开
标题翻译：用于从图像中去除噪声的装置，系统和方法
公开(公告)号：WO2015071771A2
公开(公告)日：2015-05-21
申请号：PCT/IB2014/003104
申请日：2014-11-17
申请人： LINEAR ALGEBRA TECHNOLOGIES LIMITED , DONOHOE, David , BARRY, Brendan , MOLONEY, David , RICHMOND, Richard , CONNOR, Fergal
发明人： DONOHOE, David , BARRY, Brendan , MOLONEY, David , RICHMOND, Richard , CONNOR, Fergal
IPC分类号： G06T5/00 , H04N5/217
CPC分类号： G06T5/002 , G06T2200/28 , G06T2207/20182 , H04N5/21 , H04N5/217
摘要： The disclosed embodiments include an apparatus implemented in a semiconductor integrated chip. The apparatus is configured to operate a composite function, comprising a first function and a second function, on a first patch of an image. The apparatus includes a first function operator configured to operate the first function on the group of pixel values to provide a first processed group of pixel values. The apparatus also includes a delay system configured to maintain the first processed group of pixel values for a predetermined period of time to provide a delayed processed group of pixel values. The apparatus further includes a second function operator configured to operate a second function on at least a second processed group of pixels and the delayed processed group to determine an output of the composite function.
摘要翻译：所公开的实施例包括在半导体集成芯片中实现的装置。该装置被配置为在图像的第一块上操作包括第一功能和第二功能的复合功能。该装置包括第一功能操作器，其被配置为对该组像素值操作第一功能以提供第一处理的像素值组。该装置还包括延迟系统，其被配置为在预定时间段内保持第一经处理的像素值组以提供延迟处理的像素值组。该装置还包括第二功能操作器，其被配置为在至少第二处理的像素组和延迟处理的组上操作第二功能以确定复合功能的输出。

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