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1. 发明申请

WO2012142399A3 METHOD FOR PRODUCING STABILIZED WHOLE WHEAT FLOUR 审中-公开
标题翻译：生产稳定的全麦片的方法
公开(公告)号：WO2012142399A3
公开(公告)日：2013-03-14
申请号：PCT/US2012033500
申请日：2012-04-13
申请人： KRAFT FOODS GLOBAL BRANDS LLC , ZHAO BIN , ZHOU NING , HANSEN TIMOTHY S , DUFFIN MICHAEL A , CASSONE DOMENICO R , GANNON DIANE L , HAYNES LYNN C , MANNS JAMES M , ZIMERI JEANNY E , WORFOLK PETER , PRACEK ANTHONY
发明人： ZHAO BIN , ZHOU NING , HANSEN TIMOTHY S , DUFFIN MICHAEL A , CASSONE DOMENICO R , GANNON DIANE L , HAYNES LYNN C , MANNS JAMES M , ZIMERI JEANNY E , WORFOLK PETER , PRACEK ANTHONY
IPC分类号： A21D6/00 , A23B9/26 , A23L7/10 , A23L7/104 , B02B1/08
CPC分类号： A23L1/1041 , A21D2/145 , A21D2/36 , A21D2/38 , A21D6/00 , A21D13/02 , A23L7/197 , A23L7/198 , A23V2002/00 , B02B1/08 , A23V2250/042 , A23V2250/214
摘要： A stabilized flour, such as stabilized whole grain wheat flour, exhibiting unexpectedly superior extended shelf life and superior biscuit baking functionality, may be produced with or without heating to inhibit lipase by subjecting whole grains or a bran and germ fraction or component to treatment with a lipase inhibitor, such as an acid or green tea extract. Treatment with the lipase inhibitor may be performed during tempering of the whole grains or berries or during hydration of the bran and germ fraction or component.
摘要翻译：可以通过或不加热来生产稳定的全谷物小麦粉，例如稳定的全谷物小麦粉，具有出人意料的优异的延长的保质期和优异的饼干烘烤功能，通过使全谷物或麸皮和胚芽级分或组分进行处理脂肪酶抑制剂，如酸或绿茶提取物。利用脂肪酶抑制剂的处理可以在整个谷物或浆果的回火期间或在麸和胚芽部分或组分的水合过程中进行。

2. 发明申请

WO2012044746A1 LUMINESCENT SYSTEMS WITH SURFACE CHARGE COMPENSATION AND METHOD OF MAKING 审中-公开
标题翻译：具有表面电荷补偿的发光系统及其制造方法
公开(公告)号：WO2012044746A1
公开(公告)日：2012-04-05
申请号：PCT/US2011053848
申请日：2011-09-29
申请人： UT BATTELLE LLC , IVANOV ILIA N , PURETZKY ALEXANDER A , ZHAO BIN , GEOHEGAN DAVID B , STYERS-BARNETT DAVID J , HU HUI
发明人： IVANOV ILIA N , PURETZKY ALEXANDER A , ZHAO BIN , GEOHEGAN DAVID B , STYERS-BARNETT DAVID J , HU HUI
IPC分类号： C09K11/02 , C09K11/06 , C09K11/65
CPC分类号： C09K11/06 , C09K11/025 , C09K11/65
摘要： A photoluminescent or electroluminescent system and method of making a non- luminescent nanostructured material into such a luminescent system is presented. The method of preparing the luminescent system, generally, comprises the steps of modifying the surface of a nanostructured material to create isolated regions to act as luminescent centers and to create a charge imbalance on the surface; applying more than one polar molecule to the charged surface of the nanostructured material; and orienting the polar molecules to compensate for the charge imbalance on the surface of the nanostructured material. The compensation of the surface charge imbalance by the polar molecules allows the isolated regions to exhibit luminescence.
摘要翻译：提出了一种使非发光纳米结构材料制成这种发光系统的光致发光或电致发光系统和方法。通常，制备发光系统的方法包括以下步骤：改变纳米结构材料的表面以产生作为发光中心的隔离区域并在表面上产生电荷不平衡; 将多于一个极性分子应用于纳米结构材料的带电表面; 并且使极性分子取向以补偿纳米结构材料表面上的电荷不平衡。通过极性分子对表面电荷的不平衡的补偿允许隔离区域发光。

3. 发明申请

WO2010014225A3 ASSAYS FOR DETECTION OF PHENYLALANINE AMMONIA-LYASE AND ANTIBODIES TO PHENYLALANINE AMMONIA-LYASE 审中-公开
标题翻译：检测苯丙氨酸氨基酸和苯丙氨酸氨基酸的抗体的测定
公开(公告)号：WO2010014225A3
公开(公告)日：2010-04-22
申请号：PCT/US2009004386
申请日：2009-07-30
申请人： BIOMARIN PHARM INC , FOEHR ERIK DAMIEN , ZHAO BIN , SANTAMARIA CARLOS FABRICIO
发明人： FOEHR ERIK DAMIEN , ZHAO BIN , SANTAMARIA CARLOS FABRICIO
IPC分类号： G01N33/573
CPC分类号： G01N33/6854 , G01N33/573 , G01N2333/988
摘要： Provided herein are methods of detecting the presence of a pegylated enzyme, an enzyme-specific antibody (e.g., a neutralizing antibody or of a particular isotype), or a polyethylene glycol (PEG)-specific antibody in a sample, such as a bodily fluid or tissue of a patient. In certain embodiments, the enzyme is phenylalanine ammonia-lyase (PAL), such as Anabaena variabilis (Av) PAL administered to the patient as part of an enzyme substitution therapy for diseases or disorders, such as phenylketonuria (PKU), or cancer therapy.
摘要翻译：本文提供了检测样品中的聚乙二醇化酶，酶特异性抗体（例如中和抗体或特定同种型）或聚乙二醇（PEG）特异性抗体的存在的方法，例如体液或组织。在某些实施方案中，酶是苯丙氨酸氨裂解酶（PAL），例如作为用于诸如苯丙酮尿症（PKU）或癌症治疗的疾病或病症的酶替代疗法的一部分而施用于患者的变异鱼腥藻（Av）PAL。

4. 发明申请

WO2009114279A3 LED DRIVER WITH DYNAMIC POWER MANAGEMENT 审中-公开
标题翻译：带动态电源管理的LED驱动器
公开(公告)号：WO2009114279A3
公开(公告)日：2009-12-17
申请号：PCT/US2009035284
申请日：2009-02-26
申请人： FREESCALE SEMICONDUCTOR INC , ZHAO BIN , CORNISH JACK W , HORNG BRIAN B , LEE VICTOR K , KAMEYA ANDREW M
发明人： ZHAO BIN , CORNISH JACK W , HORNG BRIAN B , LEE VICTOR K , KAMEYA ANDREW M
IPC分类号： G09G3/32 , G02F1/133 , G09G3/14 , G09G3/36 , H05B37/02
CPC分类号： H05B33/0827 , H05B33/0815 , Y02B20/347
摘要： Power management in a light emitting diode (LED) system (100) having a plurality of LED strings (102) is disclosed. A voltage source provides an output voltage to drive the LED strings (102). An LED driver (114) monitors the tail voltages of the active LED strings to identify the minimum, or lowest, tail voltage and adjusts the output voltage of the voltage source based on the lowest tail voltage. The LED driver (114) can adjust the output voltage so as to maintain the lowest tail voltage at or near a predetermined threshold voltage so as to ensure that the output voltage is sufficient to properly drive each active LED string with a regulated current in view of pulse width modulation (PWM) performance requirements without excessive power consumption.
摘要翻译：公开了具有多个LED串（102）的发光二极管（LED）系统（100）中的电力管理。电压源提供输出电压以驱动LED串（102）。 LED驱动器（114）监视有源LED串的尾电压以识别最小尾电压或最低尾电压，并且基于最低尾电压来调整电压源的输出电压。 LED驱动器（114）可以调节输出电压以便将最低尾电压维持在预定阈值电压或接近预定阈值电压，从而确保输出电压足以适当地驱动每个有源LED串，脉宽调制（PWM）性能要求，而无需过多的功耗。

5. 发明申请

WO2008082609A2 TRANSPARENT CONDUCTIVE NANO-COMPOSITES 审中-公开
标题翻译：透明导电纳米复合材料
公开(公告)号：WO2008082609A2
公开(公告)日：2008-07-10
申请号：PCT/US2007026421
申请日：2007-12-27
申请人： GEOHEGAN DAVID BRUCE , IVANOV ILYA N , PURETZKY ALEXANDER A , JESSE STEPHEN , HU BIN , GARRETT MATTHEW , ZHAO BIN
发明人： GEOHEGAN DAVID BRUCE , IVANOV ILYA N , PURETZKY ALEXANDER A , JESSE STEPHEN , HU BIN , GARRETT MATTHEW , ZHAO BIN
IPC分类号： H01J1/63 , C23C16/26
CPC分类号： H01L51/0048 , B82Y30/00 , B82Y40/00 , C01B32/16 , C01B32/17 , C01B32/174 , C01B2202/02 , C01B2202/08 , C01B2202/34 , C01B2202/36 , C08J5/005 , H01B1/24 , Y10S428/917
摘要： The present invention, in one embodiment, provides a method of forming an organic electric device that includes providing a plurality of carbon nanostructures; and dispersing the plurality of carbon nanostructures in a polymeric matrix to provide a polymeric composite, wherein when the plurality of carbon nanostructures are present at a first concentration an interface of the plurality of carbon nanostructures and the polymeric matrix is characterized by charge transport when an external energy is applied, and when the plurality of carbon nanostructures are present at a second concentration the interface of the plurality of carbon nanostructures and the polymeric matrix are characterized by exciton dissociation when an external energy is applied, wherein the first concentration is less than the second concentration.
摘要翻译：在一个实施方案中，本发明提供了形成有机电子器件的方法，其包括提供多个碳纳米结构; 以及将所述多个碳纳米结构分散在聚合物基体中以提供聚合物复合材料，其中当所述多个碳纳米结构以第一浓度存在时，所述多个碳纳米结构和所述聚合物基体的界面的特征在于当外部施加能量，并且当多个碳纳米结构以第二浓度存在时，当施加外部能量时，多个碳纳米结构与聚合物基质的界面通过激子离解来表征，其中第一浓度小于第二浓度浓度。

6. 发明申请

WO0246803A3 APPARATUS AND METHOD FOR WAVELENGTH DIVISION MULTIPLEXING 审中-公开
标题翻译：用于波长分割多路复用的装置和方法
公开(公告)号：WO0246803A3
公开(公告)日：2002-10-10
申请号：PCT/US0148591
申请日：2001-12-07
申请人： CIRVINE CORP , ZHAO BIN
发明人： ZHAO BIN
IPC分类号： G02B6/34 , H04J14/02
CPC分类号： G02B6/2938 , G02B6/29353 , G02B6/29355 , G02B6/29386 , H04J14/02
摘要： A dispersion mitigating interleaver assembly has a first unbalanced Mach-Zehnder interferometer (MZI) assembly which includes first and second output ports and which has first tranmission vs. wavelength curve and a first dispersion vs. wavelength curve. The dispersion mitigating interleaver assembly also includes a second unbalanced MZI assmbly which has a second transmission vs. wavelength curve and a second dispersion vs. wavelength curve. The second unbalanced MZI assembly receives an output from one of the first and second output ports of the first unbalanced MZI assembly. The second transmission vs. wavelength curve is substantially the same as the first transmission vs. wavelength curve and the second dispersion vs. wavelength curve is substantially opposite with rspect to the first dispersion vs. wavelength curve, such that dispersion is substantially cancelled by the cooperation of the first and second unbalanced MZI assemblies.
摘要翻译：分散减轻交错器组件具有第一不平衡马赫 - 曾德干涉仪（MZI）组件，其包括第一和第二输出端口，并且具有第一传输与波长曲线以及第一色散对波长曲线。色散减轻交织器组件还包括具有第二透射相对于波长曲线和第二色散相对于波长曲线的第二不平衡MZI组合。第二不平衡MZI组件从第一不平衡MZI组件的第一和第二输出端口之一接收输出。第二透射率与波长曲线基本上与第一透射率相对于波长曲线相同，并且第二色散对波长曲线与第一色散相对于波长曲线相比基本相反，使得色散基本上被合作消除的第一和第二不平衡MZI组件。

7. 发明申请

WO0201773A3 CHANNEL MULTIPLEXER AND DEMULTIPLEXER FOR OPTICAL COMMUNICATIONS 审中-公开
标题翻译：用于光通信的信道复用器和解复用器
公开(公告)号：WO0201773A3
公开(公告)日：2002-05-23
申请号：PCT/US0120321
申请日：2001-06-25
申请人： CIRVINE CORP , ZHAO BIN
发明人： ZHAO BIN
IPC分类号： G02B6/34 , G02B27/28 , G02F1/01 , H04B14/06
CPC分类号： G02B6/29302 , G02B6/272 , G02B6/2766 , G02B6/2773 , G02B6/29386
摘要： A low dispersion comb filter or interleaver comprises a first birefringent element assembly (3) having at least one birefringent element (4-6) and a second birefringent element assembly (10) having at least one other birefringent element (11-13). The first birefringent element assembly and the second birefringent element assembly are configured so as to cooperate with one another in a manner which mitigates dispersion of the interleaver. By aligning the polarization directions of the odd channels and the even channels so as to be parallel with respect to another prior to entering the second birefringent element assembly, zero or nearly zero dispersion is obtained simultaneously for both the odd and even channels.
摘要翻译：低色散梳状滤波器或交织器包括具有至少一个双折射元件（4-6）的第一双折射元件组件（3）和具有至少一个其他双折射元件（11-13）的第二双折射元件组件（10）。第一双折射元件组件和第二双折射元件组件被配置为以减轻交织器的扩散的方式相互协作。通过将奇数通道和偶数通道的偏振方向对齐，以便在进入第二双折射元件组件之前相对于另一个平行，所以对于奇数和偶数通道同时获得零或接近零色散。

8. 发明申请

WO2010120446A3 PEAK DETECTION WITH DIGITAL CONVERSION 审中-公开
标题翻译：峰值检测与数字转换
公开(公告)号：WO2010120446A3
公开(公告)日：2011-02-17
申请号：PCT/US2010028289
申请日：2010-03-23
申请人： FREESCALE SEMICONDUCTOR INC , ZHAO BIN
发明人： ZHAO BIN
IPC分类号： H03M1/12
CPC分类号： G01R19/2506 , H05B33/0815 , H05B33/0827
摘要： A peak detection/digitization circuit (100) includes a plurality of level detect units (121, 122, 123), each having a comparator (124) and a flip-flop (126) with a clock input responsive to the output of the comparator. For a detection period, each level detect unit configures a data output signal of the flip-flop (126) to a first data state responsive to a start of the detection period. Further, each level detect unit is configured to enable the comparator responsive to the data output signal having the first data state or a second data state, respectively. While the comparator (124) is enabled during the detection period, the level detect unit configures the data output signal of the flip-flop (126) responsive to a comparison of an input signal to a corresponding reference voltage level by the comparator (124). The data output signals of the flip-flops of the level detect units (121, 122, 123) at the end of the detection period are used to determine a digital value representative of a peak voltage level of the input signal.
摘要翻译：峰值检测/数字化电路（100）包括多个电平检测单元（121,122,123），每个电平检测单元具有响应于比较器的输出的时钟输入的比较器（124）和触发器（126）。对于检测周期，响应于检测周期的开始，每个电平检测单元将触发器（126）的数据输出信号配置为第一数据状态。此外，每个电平检测单元被配置为使得比较器能够分别响应于具有第一数据状态或第二数据状态的数据输出信号。当在检测周期期间比较器（124）被使能时，电平检测单元响应于比较器（124）将输入信号与对应的参考电压电平进行比较来配置触发器（126）的数据输出信号，。在检测周期结束时，电平检测单元（121,122,123）的触发器的数据输出信号用于确定表示输入信号的峰值电压电平的数字值。

9. 发明申请

WO2007145752A3 VOLTAGE UP-CONVERSION CIRCUIT USING LOW VOLTAGE TRANSISTORS 审中-公开
标题翻译：使用低电压晶体管的电压上变换电路
公开(公告)号：WO2007145752A3
公开(公告)日：2008-10-30
申请号：PCT/US2007011315
申请日：2007-05-10
申请人： SKYWORKS SOLUTIONS INC , ZHAO BIN
发明人： ZHAO BIN
IPC分类号： G05F1/00
CPC分类号： H02M3/07
摘要： According to one exemplary embodiment, a voltage up-conversion circuit includes a modulated voltage generator circuit, where the modulated voltage generator circuit is configured to receive an input voltage and generate a modulated voltage, and where the modulated voltage generator circuit includes at least one transistor. The voltage up- conversion circuit further includes a switching circuit coupled to the modulated voltage generator circuit, where the switching circuit is configured to couple the modulated voltage to a load capacitor when the modulated voltage is at a high level and decouple the modulated voltage to the load capacitor when the modulated voltage is at a low level. In the voltage up- conversion circuit, the load capacitor reaches a voltage greater a breakdown voltage of the at least one transistor in the modulated voltage generator circuit. The breakdown voltage can be a reliability breakdown voltage.
摘要翻译：根据一个示例性实施例，电压上变换电路包括调制电压发生器电路，其中调制电压发生器电路被配置为接收输入电压并产生调制电压，并且其中调制电压发生器电路包括至少一个晶体管。电压上变换电路还包括耦合到调制电压发生器电路的开关电路，其中开关电路被配置为当调制电压处于高电平时将调制电压耦合到负载电容器，并将调制电压去耦到当调制电压处于低电平时加载电容。在电压上变换电路中，负载电容器达到调制电压发生器电路中至少一个晶体管的击穿电压更大的电压。击穿电压可以是可靠性击穿电压。

10. 发明申请

WO2007149517A3 CIRCUIT AND METHOD FOR POWER MANAGEMENT 审中-公开
标题翻译：电源管理电路和方法
公开(公告)号：WO2007149517A3
公开(公告)日：2008-09-04
申请号：PCT/US2007014438
申请日：2007-06-21
申请人： SKYWORKS SOLUTIONS INC , ZHAO BIN
发明人： ZHAO BIN
IPC分类号： G06F1/26 , H03K17/00 , H03K19/003
CPC分类号： H03K19/018557 , H03K17/063 , H03K17/102 , H03K17/687
摘要： A semiconductor network (320) is interposed between first and second multiple-port Interfaces (310, 330) each having high-voltage, intermediate-voltage and ground ports to form a switch assembly The assembly includes a primary switch circuit (342), a support network (344), internal and external-port circuits (343, 345) and internal and external-port control circuits (346, 348) The primary switch circuit (342) is coupled to high-voltage ports of the multiple-port interfaces and to the support network (344) The internal and external-port circuits (343, 345) are coupled to intermediate-voltage ports of the multiple-port interfaces, the internal and external-port control circuits (346, 348) and the support network (344) The internal-port control circuit (346) is coupled to the internal-port circuit (343), the support network (344) and a ground port of a first multiple-port interface The external-port control circuit (348) is coupled to the external-port circuit (345), the support network (344) and a ground port of the second multiple-port interface The assembly has a low-leakage current in both open and closed states when exposed to a range of high voltages.
摘要翻译：半导体网络（320）被插入在具有高电压，中间电压和接地端口的第一和第二多端口接口（310,330）之间以形成开关组件。该组件包括初级开关电路（342）支持网络（344），内部和外部端口电路（343,345）以及内部和外部端口控制电路（346,348）。主开关电路（342）耦合到多端口接口的高电压端口和支持网络（344）内部和外部端口电路（343,345）耦合到多端口接口的中压端口，内部和外部端口控制电路（346,348）和支撑网络（344）内部端口控制电路（346）耦合到内部端口电路（343），支持网络（344）和第一多端口接口的接地端口外部端口控制电路（348 ）耦合到外部端口电路（345），支持网络 344）和第二多端口接口的接地端口当暴露于一定范围的高电压时，该组件在打开和关闭状态下都具有低漏电流。

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