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1. 发明申请

WO2015047797A1 FIELD EFFECT TRANSISTOR AND METHOD 审中-公开
标题翻译：场效应晶体管和方法
公开(公告)号：WO2015047797A1
公开(公告)日：2015-04-02
申请号：PCT/US2014/055881
申请日：2014-09-16
申请人： HRL LABORATORIES, LLC
发明人： CHU, Rongming , CHEN, Mary Y. , LI, Zijian "Ray" , BOUTROS, Karim S. , CHEN, Xu , BROWN, David F. , WILLIAMS, Adam J.
IPC分类号： H01L29/78 , H01L21/336
CPC分类号： H01L29/7827 , H01L29/2003 , H01L29/4236 , H01L29/42376 , H01L29/513 , H01L29/66462 , H01L29/66522 , H01L29/66666 , H01L29/7783 , H01L29/7786
摘要： A field-effect transistor (FET) includes a plurality of semiconductor layers, a source electrode and a drain electrode contacting one of the semiconductor layers, a first dielectric layer on a portion of a top semiconductor surface between the source and drain electrodes, a first trench extending through the first dielectric layer and having a bottom located on a top surface or within one of the semiconductor layers, a second dielectric layer lining the first trench and covering a portion of the first dielectric layer, a third dielectric layer over the semiconductor layers, the first dielectric layer, and the second dielectric layer, a second trench extending through the third dielectric layer and having a bottom located in the first trench on the second dielectric layer and extending over a portion of the second dielectric, and a gate electrode filling the second trench.
摘要翻译：场效应晶体管（FET）包括多个半导体层，与该半导体层中的一个接触的源电极和漏电极，在源极和漏极之间的顶部半导体表面的一部分上的第一介电层，第一沟槽延伸穿过第一介电层并具有位于顶表面或其中一个半导体层内的底部，衬在第一沟槽上并覆盖第一介电层的一部分的第二电介质层，半导体层上的第三电介质层第一介电层和第二介电层，延伸穿过第三介电层并且具有位于第二介电层上的第一沟槽中并在第二电介质的一部分上延伸的底部的第二沟槽，以及栅电极填充第二条沟。

2. 发明申请

WO2015009576A1 HEMT DEVICE AND METHOD 审中-公开
标题翻译： HEMT设备和方法
公开(公告)号：WO2015009576A1
公开(公告)日：2015-01-22
申请号：PCT/US2014/046438
申请日：2014-07-11
申请人： HRL LABORATORIES, LLC
发明人： KHALIL, Sameh G. , CORRION, Andrea , BOUTROS, Karim S.
IPC分类号： H01L29/778
CPC分类号： H01L29/66462 , H01L21/2654 , H01L21/30612 , H01L21/76895 , H01L29/2003 , H01L29/4236 , H01L29/7788 , H01L29/7789
摘要： A HEMT device comprising a III-Nitride material substrate, the surface of which follows a plane not parallel to the C-plane of the III-Nitride material; an epitaxial layer of III-Nitride material grown on said substrate; a recess etched in said epitaxial layer, having at least one plane wall parallel to a polar plane of the III-Nitride material; a carrier supply layer formed on a portion of the plane wall of the recess, such that a 2DEG region is formed along the portion of the plane wall of the recess; a doped source region formed at the surface of said epitaxial layer such that the doped source region is separated from said 2DEG region by a channel region of the epitaxial layer; a gate insulating layer formed on the channel region of the epitaxial layer; and a gate contact layer formed on the gate insulating layer.
摘要翻译：一种HEMT器件，其包括III-氮化物材料衬底，其表面遵循不平行于III-氮化物材料的C面的平面; 在所述衬底上生长的III-氮化物材料的外延层; 蚀刻在所述外延层中的凹槽，其具有平行于所述III-氮化物材料的极平面的至少一个平面壁; 形成在凹部的平面壁的一部分上的载体供给层，使得沿着凹部的平面壁的部分形成2DEG区域; 掺杂源区，形成在所述外延层的表面，使得所述掺杂源区与所述2DEG区分离由所述外延层的沟道区; 形成在所述外延层的沟道区上的栅极绝缘层; 以及形成在所述栅极绝缘层上的栅极接触层。

3. 发明申请

WO2015065596A1 HALF BRIDGE CIRCUIT 审中-公开
标题翻译：半桥电路
公开(公告)号：WO2015065596A1
公开(公告)日：2015-05-07
申请号：PCT/US2014/055020
申请日：2014-09-10
申请人： HRL LABORATORIES, LLC
发明人： HUGHES, Brian , BOUTROS, Karim S. , ZEHNDER, Daniel M. , KHALIL, Sameh G. , CHU, Rongming
IPC分类号： H02M1/00 , H01L29/00 , H01L27/00
CPC分类号： H03K17/04106 , H01L23/5385 , H01L23/642 , H01L23/645 , H01L25/072 , H01L25/16 , H01L2224/48091 , H01L2924/00014
摘要： A half bridge circuit including an isolation substrate, a metal layer on one surface of the isolation substrate, a power loop substrate on the metal layer, an upper switch on the power loop substrate, a lower switch on the power loop substrate and coupled to the upper switch, a capacitor on the power loop substrate and coupled to the upper switch, a first via through the power loop substrate and coupled between the lower switch and the metal layer, and a second via through the power loop substrate and coupled between the capacitor and the metal layer, wherein the power loop substrate has a height and separates the metal layer from the upper switch, lower switch and capacitor by the height.
摘要翻译：一种半桥电路，包括隔离衬底，隔离衬底的一个表面上的金属层，金属层上的功率回路衬底，功率回路衬底上的上开关，功率回路衬底上的下开关，上开关，功率回路衬底上的电容器并且耦合到上开关，通过功率回路衬底的第一通孔并且耦合在下开关和金属层之间，以及第二通孔，通过功率回路衬底并耦合在电容器和金属层，其中功率回路基板具有高度，并且将金属层与上开关，下开关和电容器分离高度。

4. 发明申请

WO2013184850A2 NORMALLY-OFF GALLIUM NITRIDE TRANSISTOR WITH INSULATING GATE AND METHOD OF MAKING SAME 审中-公开
标题翻译：具有绝缘门的正常的氮化镓晶体管及其制造方法
公开(公告)号：WO2013184850A2
公开(公告)日：2013-12-12
申请号：PCT/US2013/044383
申请日：2013-06-05
申请人： HRL LABORATORIES, LLC
发明人： CHU, Rongming , HUGHES, Brian , CORRION, Andrea , BURNHAM, Shawn D. , BOUTROS, Karim S.
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/66462 , H01L29/2003 , H01L29/207 , H01L29/7787
摘要： A normally-off transistor includes a channel layer, an electron supply layer overlaying the channel layer, a source electrode and a drain electrode on the electron supply layer, an area in the electrode supply layer between the source electrode and the drain electrode treated with a fluoride based plasma followed by a chlorine based plasma treatment, a gate insulator overlaying the area, and a gate electrode overlaying the gate insulator.
摘要翻译：常关晶体管包括沟道层，覆盖沟道层的电子供应层，电子供应层上的源电极和漏电极，源电极和漏电极之间的电极供应层中的区域氟化物基等离子体，然后进行氯基等离子体处理，覆盖该区域的栅极绝缘体和覆盖栅极绝缘体的栅电极。

5. 发明申请

WO2013019329A4 III-NITRIDE METAL INSULATOR SEMICONDUCTOR FIELD EFFECT TRANSISTOR 审中-公开
公开(公告)号：WO2013019329A4
公开(公告)日：2013-02-07
申请号：PCT/US2012/043114
申请日：2012-06-19
申请人： HRL LABORATORIES, LLC , CHU, Rongming , BROWN, David F. , CHEN, Xu , WILLIAMS, Adam J. , BOUTROS, Karim S.
发明人： CHU, Rongming , BROWN, David F. , CHEN, Xu , WILLIAMS, Adam J. , BOUTROS, Karim S.
IPC分类号： H01L29/772 , H01L21/335
摘要： A field effect transistor (FET) includes a Ill-Nitride channel layer, a III -Nitride barrier layer on the channel layer, wherein the barrier layer has an energy bandgap greater than the channel layer, a source electrode electrically coupled to one of the Ill-Nitride layers, a drain electrode electrically coupled to one of the Ill- Nitride layers, a gate insulator layer stack for electrically insulating a gate electrode from the barrier layer and the channel layer, the gate insulator layer stack including an insulator layer, such as SiN, and an AlN layer, the gate electrode in a region between the source electrode and the drain electrode and in contact with the insulator layer, and wherein the AlN layer is in contact with one of the III- Nitride layers.

6. 发明申请

WO2013176906A1 HEMT DEVICE AND METHOD OF MANUFACTURING THE SAME 审中-公开
标题翻译： HEMT装置及其制造方法
公开(公告)号：WO2013176906A1
公开(公告)日：2013-11-28
申请号：PCT/US2013/040447
申请日：2013-05-09
申请人： HRL LABORATORIES, LLC
发明人： KHALIL, Sameh , BOUTROS, Karim S.
IPC分类号： H01L29/778 , H01L21/335
CPC分类号： H01L29/66462 , H01L21/0274 , H01L21/3085 , H01L21/31144 , H01L29/0657 , H01L29/2003 , H01L29/4236 , H01L29/7786
摘要： A HEMT device has a substrate; a buffer layer disposed above the substrate; a carrier supplying layer disposed above the buffer layer; a gate element penetrating the carrier supplying layer; and a drain element disposed on the carrier supplying layer. The carrier supplying layer has a non-uniform thickness between the gate element and the drain element, the carrier supplying layer having a relatively greater thickness adjacent the drain element and a relatively thinner thickness adjacent the gate element. A non-uniform two-dimensional electron gas conduction channel is formed in the carrier supplying layer, the two-dimensional electron gas conduction channel having a non-uniform profile between the gate and drain elements.
摘要翻译： HEMT装置具有基板; 设置在所述基板上方的缓冲层; 设置在所述缓冲层上方的载体供给层; 穿过载体供给层的栅极元件; 以及设置在载体供给层上的漏极元件。载体供应层在栅极元件和漏极元件之间具有不均匀的厚度，载体供应层具有与漏极元件相邻的相对较大的厚度，并且邻近栅极元件具有相对较薄的厚度。在载体供给层中形成不均匀的二维电子气导电通道，二维电子气导电通道在栅极和漏极元件之间具有不均匀的轮廓。

7. 发明申请

WO2013176905A4 A HIGH ELECTRON MOBILITY FIELD EFFECT TRANSISTOR AND METHOD OF MANUFACTURING THE SAME 审中-公开
公开(公告)号：WO2013176905A4
公开(公告)日：2013-11-28
申请号：PCT/US2013/040441
申请日：2013-05-09
申请人： HRL LABORATORIES, LLC
发明人： KHALIL, Sameh , BOUTROS, Karim S.
IPC分类号： H01L29/778 , H01L21/335
摘要： A high electron mobility field effect transistor (HEMT) includes a two dimensional electron gas (2DEG) in the drift region between the gate and the drain that has a non-uniform lateral 2DEG distribution that increases in a direction in the drift region from the gate to the drain.

8. 发明申请

WO2013002900A1 AlGaN/GaN HYBRID MOS-HFET 审中-公开
标题翻译： AlGaN / GaN混合MOS-HFET
公开(公告)号：WO2013002900A1
公开(公告)日：2013-01-03
申请号：PCT/US2012/037833
申请日：2012-05-14
申请人： HRL LABORATORIES, LLC , CORRION, Andrea , BOUTROS, Karim S. , CHEN, Mary Y. , KIM, Samuel J. , CHU, Rongming , BURNHAM, Shawn D.
发明人： CORRION, Andrea , BOUTROS, Karim S. , CHEN, Mary Y. , KIM, Samuel J. , CHU, Rongming , BURNHAM, Shawn D.
IPC分类号： H01L29/78 , H01L29/778 , H01L21/336
CPC分类号： H01L29/4236 , H01L29/2003 , H01L29/66462 , H01L29/7786
摘要： A field effect transistor (FET) includes source and drain electrodes, a channel layer, a barrier layer over the channel layer, a passivation layer covering the barrier layer for passivating the barrier layer, a gate electrode extending through the barrier layer and the passivation layer, and a gate dielectric surrounding a portion of the gate electrode that extends through the barrier layer and the passivation layer, wherein the passivation layer is a first material and the gate dielectric is a second material, and the first material is different than the second material.
摘要翻译：场效应晶体管（FET）包括源极和漏极，沟道层，沟道层上的势垒层，覆盖阻挡层以钝化势垒层的钝化层，延伸穿过阻挡层的栅电极和钝化层以及围绕所述栅电极的延伸穿过所述阻挡层和所述钝化层的部分的栅极电介质，其中所述钝化层是第一材料，并且所述栅极电介质是第二材料，并且所述第一材料不同于所述第二材料。

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