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1. 发明申请

WO2006047027A2 SPIN-TRANSFER BASED MRAM USING ANGULAR-DEPENDENT SELECTIVITY 审中-公开
标题翻译：基于旋转转移的MRAM使用角度依赖选择性
公开(公告)号：WO2006047027A2
公开(公告)日：2006-05-04
申请号：PCT/US2005/034260
申请日：2005-09-27
申请人： FREESCALE SEMICONDUCTOR, INC. , MANCOFF, Frederick, B. , ENGEL, Bradley, N. , RIZZO, Nicholas, D.
发明人： MANCOFF, Frederick, B. , ENGEL, Bradley, N. , RIZZO, Nicholas, D.
IPC分类号： G11C11/00
CPC分类号： G11C11/1675 , G11C11/161 , G11C11/1659
摘要： A magnetic random access memory ("MRAM") device (200) can be selectively written using spin-transfer reflection mode techniques. Selectivity of a designated MRAM cell within an MRAM array is achieved by the dependence of the spin-transfer switching current on the relative angle between the magnetizations of the polarizer element (204) and the free magnetic element (208) in the MRAM cell. The polarizer element has a variable magnetization that can be altered in response to the application of a current, e.g ., a digit line current (226). When the magnetization of the polarizer element is in the natural default orientation, the data in the MRAM cell is preserved. When the magnetization of the polarizer element is switched, the data in the MRAM cell can be written in response to the application of a relatively low write current (224).
摘要翻译：可以使用自旋转移反射模式技术来选择性地写入磁性随机存取存储器（“MRAM”）器件（200）。 MRAM阵列内的指定MRAM单元的选择性通过自旋转移开关电流与MRAM单元中的偏振器元件（204）和自由磁性元件（208）的磁化之间的相对角度的相关性来实现。偏振器元件具有可变响应于可应用电流例如数字线电流（226）而改变的磁化。当偏振器元件的磁化处于自然默认方向时，MRAM单元格中的数据将被保留。当偏振器元件的磁化被切换时，MRAM单元中的数据可以响应于施加相对低的写入电流而被写入（224）。

2. 发明申请

WO2006058224A1 REDUCED POWER MAGNETORESISTIVE RANDOM ACCESS MEMORY ELEMENTS 审中-公开
标题翻译：降低功率磁阻随机访问存储元件
公开(公告)号：WO2006058224A1
公开(公告)日：2006-06-01
申请号：PCT/US2005/042764
申请日：2005-11-21
申请人： FREESCALE SEMICONDUCTOR, INC. , RIZZO, Nicholas, D. , DAVE, Renu, W. , ENGEL, Bradley, N. , JANESKY, Jason, A. , SUN, Jijun
发明人： RIZZO, Nicholas, D. , DAVE, Renu, W. , ENGEL, Bradley, N. , JANESKY, Jason, A. , SUN, Jijun
IPC分类号： G11C19/08 , G11C15/02 , G11C11/00
CPC分类号： G11C11/16 , H01L27/222 , H01L43/08
摘要： Low power magnetoresistive random access memory elements and methods for fabricating the same are provided. In one embodiment, a magnetoresistive random access device (100) has an array of memory elements (102). Each element (102) comprises a fixed magnetic portion (106), a tunnel barrier portion (108), and a free SAF structure (104). The array has a finite magnetic field programming window Hwin represented by the equation H win ≈ (〈Hsat〉 - Nσ sat ) - (〈Hsw〉 + Nσ sw ), where 〈Hsw〉 is a mean switching field for the array, 〈Hsat〉 is a mean saturation field for the array, and Hsw for each memory element (102) is represented by the equation H sw ≅ √ H k H SAT , where H k represents a total anisotropy and H SAT represents an anti-ferromagnetic coupling saturation field for the free SAF structure of each memory element (102). N is an integer greater than or equal to 1. H k , H SAT , and N for each memory element are selected such that the array (100) requires current to operate that is below a predetermined current value.
摘要翻译：提供了低功率磁阻随机存取存储元件及其制造方法。在一个实施例中，磁阻随机存取装置（100）具有一组存储元件（102）。每个元件（102）包括固定磁性部分（106），隧道势垒部分（108）和自由SAF结构（104）。该阵列具有以下公式表示的有限磁场编程窗口Hwin：（＆lt; HSAT＆gt; - Ns＆lt; S＆lt; S＆lt; 其中是数组的平均切换字段，是阵列的平均饱和字段，每个存储元件（102）的Hsw由等式H < ？其中H k表示总各向异性，并且HATAT表示反铁磁性耦合，其中H < 饱和场，用于每个存储元件（102）的空闲SAF结构。 N是大于或等于1的整数。选择每个存储元件的H S，H SAT，N，使得阵列（100）需要电流操作低于预定电流值。

3. 发明申请

WO2005006450A1 OBLIQUE DEPOSITION TO INDUCE MAGNETIC ANISOTROPY FOR MRAM CELLS 审中-公开
标题翻译：用于诱导MRAM细胞的磁性ANISOTROPY的OBLIQUE沉积
公开(公告)号：WO2005006450A1
公开(公告)日：2005-01-20
申请号：PCT/US2004/020156
申请日：2004-06-22
申请人： FREESCALE SEMICONDUCTOR, INC. , RIZZO, Nicholas, D. , ENGEL, Bradley, N. , JANESKY, Jason, A. , SLAUGHTER, Jon, M. , SUN, Jijun
发明人： RIZZO, Nicholas, D. , ENGEL, Bradley, N. , JANESKY, Jason, A. , SLAUGHTER, Jon, M. , SUN, Jijun
IPC分类号： H01L29/82
CPC分类号： H01F10/3254 , B82Y25/00 , B82Y40/00 , G11C11/16 , H01F10/3272 , H01F41/18 , H01F41/303 , H01L43/12
摘要： A method of fabricating a magnetoresistive tunneling junction cell comprising the steps of providing a substrate with a surface, depositing a first magnetic region (17) having a resultant magnetic moment vector onto the substrate, depositing an electrically insulating material (16) onto the first magnetic region, and depositing a second magnetic region (15) onto the electrically insulating material, wherein at least a portion of one of the first and second magnetic regions is formed by depositing said region at a nonzero deposition angle relative to a direction perpendicular to the surface of the substrate to create an induced anisotropy.
摘要翻译：一种制造磁阻隧道结电池的方法，包括以下步骤：向衬底提供表面;将具有合成磁矩矢量的第一磁区（17）沉积到衬底上;将电绝缘材料（16）沉积到第一磁并且将第二磁性区域（15）沉积到所述电绝缘材料上，其中所述第一和第二磁性区域中的一个的至少一部分相对于垂直于所述表面的方向以非零沉积角沉积所述区域而形成的基底以产生诱导各向异性。

4. 发明申请

WO2006118653A2 TRIPLE PULSE METHOD FOR MRAM TOGGLE BIT CHARACTERIZATION 审中-公开
标题翻译：用于MRAM TOGGLE位特征的三重脉冲方法
公开(公告)号：WO2006118653A2
公开(公告)日：2006-11-09
申请号：PCT/US2006/007450
申请日：2006-03-02
申请人： FREESCALE SEMICONDUCTOR , RIZZO, Nicholas, D. , DEHERRERA, Mark, F. , JANESKY, Jason, A.
发明人： RIZZO, Nicholas, D. , DEHERRERA, Mark, F. , JANESKY, Jason, A.
IPC分类号： G11C11/14
CPC分类号： G11C11/16 , G11C29/50
摘要： A method is provided for testing magnetic bits (3, 104, 514) of an array. A train of first (702), second (704), and third (706) pulses is provided to a desired bit, the first and second pulses beginning at a substantially similar low field and increasing in similar amounts with respect to successive trains of the first, second, and third pulses, the third pulse having a current amplitude sufficient to toggle the magnetic bit. A representative count is recorded in response to switching of the bit. The above steps are repeated and a determination is made of the current amplitude required to write and toggle the bit.
摘要翻译：提供了一种用于测试阵列的磁头（3,104,514）的方法。将第一（702），第二（704）和第三（706）脉冲串提供给期望的位，第一和第二脉冲以基本相似的低场开始，并且相对于第一，第二和第三脉冲，第三脉冲具有足以切换磁头的电流幅度。响应于位的切换记录代表计数。重复上述步骤，并确定写入和切换位所需的当前幅度。

5. 发明申请

WO2005043547A1 MRAM AND METHODS FOR READING THE MRAM 审中-公开
标题翻译： MRAM和读取MRAM的方法
公开(公告)号：WO2005043547A1
公开(公告)日：2005-05-12
申请号：PCT/US2003/036564
申请日：2003-11-14
申请人： FREESCALE SEMICONDUCTOR, INC.
发明人： DURLAM, Mark, A. , ANDRE, Thomas, W. , DEHERRERA, Mark, F. , ENGEL, Bradley, N. , GARNI, Bradley, J. , NAHAS, Joseph, J. , RIZZO, Nicholas, D. , TEHRANI, Saied
IPC分类号： G11C11/16
CPC分类号： G11C11/16 , G11C11/15
摘要： An MRAM is provided that minimizes the limits in MRAM density imposed by utilization of an isolation or select device in each memory cell. In addition, methods are provided for reading an MTJ in a ganged memory cell of the MRAM. The method includes determining an electrical value that is at least partially associated with a resistance of a ganged memory cell of the MRAM. The MTJ in the ganged memory cell is toggled and a second electrical value, which is at least partially associated with the resistance of the ganged memory cell, is determined after toggling the MTJ. Once the electrical value prior to the toggling and after the toggling is determined, the difference between the two electrical values is analyzed to determine the value of the MTJ.
摘要翻译：提供了一种MRAM，其通过利用每个存储单元中的隔离或选择装置来最小化MRAM密度的限制。另外，提供了用于读取MRAM的联动存储单元中的MTJ的方法。该方法包括确定至少部分地与MRAM的联动存储器单元的电阻相关联的电气值。切换联合存储器单元中的MTJ，并且在切换MTJ之后确定至少部分地与联动存储器单元的电阻相关联的第二电值。一旦确定了切换之前和切换之后的电气值，则分析两个电气值之间的差异，以确定MTJ的值。

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