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1. 发明申请

WO2010026448A1 METHOD AND APPARATUS FOR TRANSMITTING DATA 审中-公开
标题翻译：用于发送数据的方法和装置
公开(公告)号：WO2010026448A1
公开(公告)日：2010-03-11
申请号：PCT/IB2008/053605
申请日：2008-09-05
申请人： FREESCALE SEMICONDUCTOR, INC. , KELLEHER, Paul , O'BRIEN, Michael , O'KEEFFE, Conor
发明人： KELLEHER, Paul , O'BRIEN, Michael , O'KEEFFE, Conor
IPC分类号： H04B1/40 , H04B15/02
CPC分类号： H04W56/0045 , H04B1/40 , H04B15/02 , H04B2215/067
摘要： A semiconductor device (110, 120, 200, 600) comprising interface logic (210, 610) for transmitting data bursts across an interface (105, 205, 605). The interface logic (210, 610) is arranged to transmit bursts of data across the interface (105, 205, 605) such that the start of a burst of data is substantially aligned with a symbol interval (Sl) boundary. The interface logic (210, 610) is further arranged to apply an offset to the SI boundary at the start of the burst of data.
摘要翻译：包括用于通过接口（105,205,605）发送数据脉冲串的接口逻辑（210,610）的半导体器件（110,120,200,600）。接口逻辑（210,610）被布置成通过接口（105,205,605）传输数据脉冲串，使得数据突发的开始基本上与符号间隔（S1）边界对齐。接口逻辑（210,610）还被布置为在数据突发的开始处向SI边界应用偏移。

2. 发明申请

WO2009141680A1 METHOD FOR SAMPLING DATA AND APPARATUS THEREFOR 审中-公开
标题翻译：采样数据及其设备的方法
公开(公告)号：WO2009141680A1
公开(公告)日：2009-11-26
申请号：PCT/IB2008/051950
申请日：2008-05-19
申请人： FREESCALE SEMICONDUCTOR, INC. , O'KEEFFE, Conor , KASE, Kiyoshi , KELLEHER, Paul
发明人： O'KEEFFE, Conor , KASE, Kiyoshi , KELLEHER, Paul
IPC分类号： H04L7/033
CPC分类号： H04L7/0337
摘要： A semiconductor device (201) comprises sampling logic (300, 600), comprising: input sample path selection logic (350, 650) arranged to enable at least one input sample path; sampler logic (330, 630, 635, 637) arranged to receive and sample an input data signal (328, 628) in a serial data stream in accordance with a phase of the at least one enabled input sample path; and transition detection logic (340, 640, 645) arranged to detect transitions within the received input data signal (328, 628). The input sample path selection logic (350, 650) is further arranged, upon detection of a transition within the received input data signal, to determine if the phase of the at least one input sample path is a phase having a largest window between logic values; and if it is determined that the phase of the at least one input sample path is not the phase having a largest window between logic values, to enable at least one input sample path comprising a more appropriate phase.
摘要翻译：半导体器件（201）包括采样逻辑（300,600），包括：输入采样路径选择逻辑（350,650），被布置为使能至少一个输入采样路径; 采样器逻辑（330,630,635,637），被布置为根据所述至少一个使能的输入采样路径的相位接收和采样串行数据流中的输入数据信号（328,628）; 以及布置成检测所接收的输入数据信号（328,628）内的转变的转换检测逻辑（340,640,645）。输入采样路径选择逻辑（350,650）在检测到所接收的输入数据信号中的转换之前被进一步布置以确定至少一个输入采样路径的相位是否是在逻辑值之间具有最大窗口的相位 ; 并且如果确定所述至少一个输入采样路径的相位不是在逻辑值之间具有最大窗口的相位，以使能至少一个包括更适当相位的输入采样路径。

3. 发明申请

WO2006102922A1 METHOD AND DEVICE FOR TRANSMITTING A SEQUENCE OF TRANSMISSION BURSTS 审中-公开
标题翻译：用于传输传输脉冲串序列的方法和装置
公开(公告)号：WO2006102922A1
公开(公告)日：2006-10-05
申请号：PCT/EP2005/003491
申请日：2005-03-30
申请人： FREESCALE SEMICONDUCTOR, INC. , O'KEEFFE, Conor , DINEEN, Denis , KELLEHER, Paul
发明人： O'KEEFFE, Conor , DINEEN, Denis , KELLEHER, Paul
IPC分类号： H04B7/26
CPC分类号： H04W56/00 , H04B7/2681 , H04J3/0682 , H04W72/12
摘要： Methods and device for transmitting a sequence of transmission bursts in a wireless device. The method includes transmitting (430) a sequence of transmission bursts according to a transmission schedule. The method is characterized by: receiving, (420) at a radio frequency integrated circuit, prior to a transmission of at least one transmission burst of the sequence, information representative of the timing of the transmission of the at least one transmission burst; and generating (440) timing signals, by the radio frequency integrated circuit that implement the transmission schedule. A wireless device (100) includes a base band integrated circuit (110) adapted to determine a transmission schedule of a sequence of transmission bursts. The wireless device is characterized by including a radio frequency integrated circuit (200, 300) that is adapted receive information representative of the timing schedule and to autonomously control a transmission of the sequence of transmission bursts.
摘要翻译：用于在无线设备中发送传输突发序列的方法和设备。该方法包括根据传输调度传输（430）传输突发序列（430）。该方法的特征在于：在发射该序列的至少一个传输突发之前，在射频集成电路处接收（420）表示至少一个传输突发传输定时的信息; 以及通过实现传输调度的射频集成电路产生（440）定时信号。无线设备（100）包括适于确定传输脉冲序列的传输调度的基带集成电路（110）。该无线设备的特征在于包括一个射频集成电路（200,300），该射频集成电路适于接收表示定时调度的信息，并自动地控制传输脉冲序列的传输。

4. 发明申请

WO2010026446A1 METHOD AND APPARATUS FOR TRANSMITTING DATA 审中-公开
标题翻译：用于发送数据的方法和装置
公开(公告)号：WO2010026446A1
公开(公告)日：2010-03-11
申请号：PCT/IB2008/053592
申请日：2008-09-04
申请人： FREESCALE SEMICONDUCTOR, INC. , O'BRIEN, Michael , KELLEHER, Paul , O'KEEFFE, Conor
发明人： O'BRIEN, Michael , KELLEHER, Paul , O'KEEFFE, Conor
IPC分类号： H04B15/02 , H04L25/49
CPC分类号： H04B15/02
摘要： A semiconductor device (200) comprising an interface logic module (220) for transmitting data frames across an interface (215), and controller logic module (210) arranged to control a rate at which the interface logic (220) transmits data across the interface (215). Upon receipt of data frames to transmit across the interface (215), the controller logic module (210) is arranged to determine a sequence of data rates with which to transmit sequential data frames across the interface (215), and to configure the transmission of the data frames across the interface (215) according to the determined data rate sequence. The selection of these data rates will be dependent on specific critical RF frequencies where EMI impacts have to be minimised.
摘要翻译：一种半导体器件（200），包括用于通过接口（215）传输数据帧的接口逻辑模块（220），以及控制器逻辑模块（210），其被配置为控制所述接口逻辑（220）跨越所述接口传输数据的速率（215）。在接收到通过接口（215）发送的数据帧之后，控制器逻辑模块（210）被安排为确定通过接口（215）发送顺序数据帧的数据速率序列，并且配置根据确定的数据速率序列跨接口（215）的数据帧。这些数据速率的选择将取决于必须最小化EMI影响的特定关键RF频率。

5. 发明申请

WO2009019539A1 ARRANGEMENT OF RADIOFREQUENCY INTEGRATED CIRCUIT AND METHOD FOR MANUFACTURING THEREOF 审中-公开
标题翻译：无线电综合集成电路的布置及其制造方法
公开(公告)号：WO2009019539A1
公开(公告)日：2009-02-12
申请号：PCT/IB2007/053166
申请日：2007-08-09
申请人： FREESCALE SEMICONDUCTOR, INC. , KELLEHER, Paul , CROWLEY, Michael , O'KEEFFE, Conor
发明人： KELLEHER, Paul , CROWLEY, Michael , O'KEEFFE, Conor
IPC分类号： H04B1/38
CPC分类号： H04B1/40
摘要： A master radiofrequency integrated circuit (RF IC) (30) and a slave radiofrequency integrated circuit (32) include a master radiofrequency module and a slave radiofrequency module, respectively. Both RF ICs include a radiofrequency side contact (314,315) connectable to an antenna (4), for receiving radiofrequency signals, via the antenna (4), from a wireless communications network and a baseband side contact (312,313) connected to the radiofrequency module and connectable to a contact of a baseband integrated circuit (2), for transmitting the baseband signals from the master radiofrequency module to the baseband integrated circuit (2). The RF module is connected to the radiofrequency side contact, for converting the radiofrequency signals into baseband signals. The master radiofrequency module includes a slave control unit (300) for controlling the slave radiofrequency module. The master RF IC has a slave side contact (316) connected to the slave control unit (300) and to the slave RF IC, for transferring a control signal or data from and/or to slave radiofrequency module when the slave radiofrequency module is connected to the contact of the baseband integrated circuit (2). The slave RF IC includes a master side contact (334) connected to a control interface (320) of the slave RF module and connectable to a master radiofrequency module on another RF IC, for receiving the control signals from the master radiofrequency module.
摘要翻译：主射频集成电路（RF IC）（30）和从射频集成电路（32）分别包括主射频模块和从射频模块。两个RF IC包括可连接到天线（4）的射频侧接点（314,315），用于经由天线（4）从无线通信网络和连接到射频模块的基带侧接点（312,313）接收射频信号;以及可连接到基带集成电路（2）的触点，用于将基带信号从主射频模块传送到基带集成电路（2）。 RF模块连接到射频侧触点，用于将射频信号转换为基带信号。主射频模块包括用于控制从射频模块的从属控制单元（300）。主RF IC具有连接到从控制单元（300）和从RF IC的从属侧触点（316），用于在从射频模块连接时向从射频模块传送控制信号或数据到基带集成电路（2）的接触。从RF IC包括连接到从RF模块的控制接口（320）并可连接到另一RF IC上的主射频模块的主侧触点（334），用于从主射频模块接收控制信号。

6. 发明申请

WO2008152455A1 WIRELESS COMMUNICATION UNIT 审中-公开
标题翻译：无线通信单元
公开(公告)号：WO2008152455A1
公开(公告)日：2008-12-18
申请号：PCT/IB2007/052239
申请日：2007-06-13
申请人： FREESCALE SEMICONDUCTOR, INC. , O'KEEFFE, Conor , KELLEHER, Paul
发明人： O'KEEFFE, Conor , KELLEHER, Paul
IPC分类号： H04B1/40
CPC分类号： H04B1/40
摘要： A wireless communication unit (1 ) includes a baseband module (2) and a radiofrequency module (3). A communication interface connects the baseband module (2) to the radiofrequency module (3). Data can be communicated from the baseband module to the radiofrequency module and/or vice versa via the interface. The communication interface includes one or more data compression arrangement, for compressing original data to be transmitted over the communication interface, from a transmitting side of the communication interface to a receiving side of the communication interface, into compressed data and decompressing the compressed data after transmission and restoring the original data. The data compression arrangement may include a data compression unit at the transmitting side of the communication interface, and a data decompression unit at the receiving side of the communication interface.
摘要翻译：无线通信单元（1）包括基带模块（2）和射频模块（3）。通信接口将基带模块（2）连接到射频模块（3）。数据可以通过接口从基带模块传送到射频模块和/或反之亦然。通信接口包括一个或多个数据压缩装置，用于将通过通信接口发送的原始数据从通信接口的发送侧压缩到通信接口的接收侧，成为压缩数据，并且在传输之后解压缩压缩数据并恢复原始数据。数据压缩装置可以包括在通信接口的发送侧的数据压缩单元，以及在通信接口的接收侧的数据解压缩单元。

7. 发明申请

WO2008146090A1 WIRELESS COMMUNICATION UNIT, BASEBAND MODULE, RADIO FREQUENCY MODULE, WIRELESS TERMINAL AND COMPUTER PROGRAM PRODUCT 审中-公开
标题翻译：无线通信单元，基带模块，无线电频率模块，无线终端和计算机程序产品
公开(公告)号：WO2008146090A1
公开(公告)日：2008-12-04
申请号：PCT/IB2007/051979
申请日：2007-05-25
申请人： FREESCALE SEMICONDUCTOR, INC. , KELLEHER, Paul , O'KEEFFE, Conor , SCHWARTZ, Daniel B , TRAYLOR, Kevin
发明人： KELLEHER, Paul , O'KEEFFE, Conor , SCHWARTZ, Daniel B , TRAYLOR, Kevin
IPC分类号： H04B1/40
CPC分类号： H04B1/406 , H03L7/1976
摘要： A wireless communication unit (1) has two or more communication modes including one or more mobile phone mode. The unit (1) includes a baseband module (2) and a radio frequency module (3). A radio frequency interface (RF Int) of the baseband module (2) is connected to the radio frequency module (3). The radio frequency module (3) includes a baseband interface (BB Int). A clock system (22, 31) is connected to the radio frequency interface and the baseband interface. The clock system can provide a clock signal with a clock rate to the radio frequency interface and the baseband interface in one or more of the one or more mobile phone modes.
摘要翻译：无线通信单元（1）具有包括一个或多个移动电话模式的两个或多个通信模式。单元（1）包括基带模块（2）和射频模块（3）。基带模块（2）的射频接口（RF Int）被连接到射频模块（3）。射频模块（3）包括基带接口（BB Int）。时钟系统（22,31）连接到射频接口和基带接口。时钟系统可以在一个或多个移动电话模式中的一个或多个中提供具有到射频接口和基带接口的时钟速率的时钟信号。

8. 发明申请

WO2008083850A1 ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD FOR SELECTING OF AN OPTIMAL SAMPLING CLOCK PHASE 审中-公开
标题翻译：电子设备，集成电路和选择最佳采样时钟相位的方法
公开(公告)号：WO2008083850A1
公开(公告)日：2008-07-17
申请号：PCT/EP2007/050188
申请日：2007-01-09
申请人： FREESCALE SEMICONDUCTOR, INC. , KELLEHER, Paul , MCSWINEY, Diarmuid , O'KEEFFE, Conor
发明人： KELLEHER, Paul , MCSWINEY, Diarmuid , O'KEEFFE, Conor
IPC分类号： H04L7/04
CPC分类号： H04L7/042 , H04B1/005 , H04B1/70753 , H04L7/0337
摘要： An electronic device (100) comprises a number of sub-systems (110, 120) coupled via an interface. One of the number of sub-systems (110, 120) comprises logic for receiving a frame of input data having a plurality of phases on respective data paths. The electronic device (100) further comprises logic for performing cross correlation on the received input data with a pre-determined bit pattern (510), operably coupled to selection logic, for selecting a single phase from the plurality of phases sent to the interface to sample the received input data in a middle region of a data bit period in response to the cross correlation.
摘要翻译：电子设备（100）包括通过接口耦合的多个子系统（110,120）。多个子系统（110,120）中的一个包括用于接收在相应数据路径上具有多个相位的输入数据的帧的逻辑。电子设备（100）还包括用于以可选择地耦合到选择逻辑的预定位模式（510）对所接收的输入数据执行互相关的逻辑，用于从发送到接口的多个阶段中选择单个相位响应于互相关，在数据比特周期的中间区域中对接收到的输入数据进行采样。

9. 发明申请

WO2008083849A1 ELECTRONIC DEVICE, INTEGRATED CIRCUIT AND METHOD THEREFOR 审中-公开
标题翻译：电子设备，集成电路及其方法
公开(公告)号：WO2008083849A1
公开(公告)日：2008-07-17
申请号：PCT/EP2007/050186
申请日：2007-01-09
申请人： FREESCALE SEMICONDUCTOR, INC. , KELLEHER, Paul , MCSWINEY, Diarmuid , O'KEEFFE, Conor , QUIROGA, Emilio , SONI, Samir
发明人： KELLEHER, Paul , MCSWINEY, Diarmuid , O'KEEFFE, Conor , QUIROGA, Emilio , SONI, Samir
IPC分类号： H04L7/033
CPC分类号： H04L7/0338 , H04L7/042
摘要： A wireless communication device (100) comprises a number of sub-systems (110, 120) and clock generation logic arranged to generate at least one clock signal to be applied to the number of subsystems (110, 120). One of the number of sub-systems (110, 120) comprises sampling logic for receiving input data and performing initial sampling on an input data bit using multiple separated phases of a clock period of the at least one clock signal applied to the sampling logic thereby producing multiple phase separated sampled outputs of the input data bit. The sampling logic is configured to perform a number of re-sampling operations on the multiple phase separated sampled outputs at a number of intermediate phases thereby producing multiple phase separated intermediate sampled outputs prior to performing a final sample of the multiple phase separated intermediate sampled outputs at a single phase of the at least one clock signal to produce a sampled input data signal.
摘要翻译：无线通信设备（100）包括多个子系统（110,120）和时钟生成逻辑，时钟生成逻辑被配置为产生要施加到子系统（110,120）的数量的至少一个时钟信号。多个子系统（110,120）中的一个包括用于接收输入数据的采样逻辑，并且使用应用于采样逻辑的至少一个时钟信号的时钟周期的多个分离相位对输入数据位执行初始采样，产生输入数据位的多相分离采样输出。采样逻辑被配置为在多个中间相位的多相分离采样输出上执行多个重采样操作，从而在执行多相分离的中间采样输出的最终采样之前产生多相分离中间采样输出所述至少一个时钟信号的单相以产生采样的输入数据信号。

10. 发明申请

WO2006063619A1 FREQUENCY GENERATION IN A WIRELESS COMMUNICATION UNIT 审中-公开
标题翻译：无线通信单元中的频率生成
公开(公告)号：WO2006063619A1
公开(公告)日：2006-06-22
申请号：PCT/EP2004/053500
申请日：2004-12-15
申请人： FREESCALE SEMICONDUCTOR, INC , KELLEHER, Paul , O'KEEFFE, Conor
发明人： KELLEHER, Paul , O'KEEFFE, Conor
IPC分类号： H04B1/40 , H03J7/06 , H03L7/197
CPC分类号： H03L7/1976
摘要： A wireless communication device (100) comprises a frequency generation circuit employing a crystal oscillator operably coupled to a fractional-based synthesiser and a voltage-controlled oscillator. The fractional-based synthesiser utilises a ratio between an integer value and a fractional value to set a radio frequency signal of the voltage-controlled oscillator. An automatic frequency control (AFC) scaling sub-system (226) is operably coupled to a fractional-based synthesiser and configured to receive and use an AFC word (228) to frequency scale the fractional value in a multiplicative manner to set a radio frequency supported by the fractional-based synthesiser. Preferably, an automatic frequency generation sub-system 123 utilises Absolute Radio Frequency Channel Number (ARFCN) and the cyclical nature of the fractional value. In this manner, a saving on hardware and software overheads associated with frequency channel selection for fractional-N type synthesizers can be made.
摘要翻译：无线通信设备（100）包括采用可操作地耦合到基于分数的合成器和压控振荡器的晶体振荡器的频率产生电路。基于分数的合成器利用整数值和分数值之间的比率来设置压控振荡器的射频信号。自动频率控制（AFC）缩放子系统（226）可操作地耦合到基于分数的合成器，并且被配置为接收和使用AFC字（228）以乘法方式对分数值进行频率缩放以设置射频由基于分数的合成器支持。优选地，自动频率生成子系统123利用绝对射频信道号（ARFCN）和小数值的周期性质。以这种方式，可以节省与分数N型合成器的频率信道选择相关联的硬件和软件开销。

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