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1. 发明申请

WO2012127287A3 COMPOSITIONS AND METHODS FOR TREATING MULTI-DRUG RESISTANT MALARIA 审中-公开
公开(公告)号：WO2012127287A3
公开(公告)日：2012-09-27
申请号：PCT/IB2011/053962
申请日：2011-09-10
申请人： FEBRIS BIO-TECH LIMITED , SMITH, Garth Selwyn , ZHANG, Lixin , DAI, Huanqin
发明人： SMITH, Garth Selwyn , ZHANG, Lixin , DAI, Huanqin
IPC分类号： A01N65/00 , A61K36/00
摘要： A method is provided for treating an individual for a malarial infection, in particular drug-resistant species of Plasmodium, including administering to the individual in need of such treatment a composition comprising an extract containing an effective amount of one or more anti-malarial di- or tri-terpene compounds. Potent and effective extracts containing the anti-malarial compounds can be derived from Luo Han fruit and Stevia leaves, including combinations of the same, for the purpose of treating and preventing malaria in an inexpensive manner from readily available commodities. In one embodiment, the composition is administered orally in a solid or liquid ingestible form.

2. 发明申请

WO2010090942A3 SPAR HULL BELLY STRAKE DESIGN AND INSTALLATION METHOD 审中-公开
公开(公告)号：WO2010090942A3
公开(公告)日：2010-08-12
申请号：PCT/US2010/022364
申请日：2010-01-28
申请人： TECHNIP FRANCE , LUO, Michael Y.H. , MOHR, Harvey O. , ZHANG, Lixin
发明人： LUO, Michael Y.H. , MOHR, Harvey O. , ZHANG, Lixin
IPC分类号： B63B22/02 , B63B35/44 , B63B39/00 , B63B39/06 , B63B1/04
摘要： A spar hull for a floating vessel can include a hard tank having a belly portion, a fixed strake coupled to the outer surface of the tank and a folding strake coupled to the belly portion of the tank, the folding strake having one or more strake panels and one or more support frames. A method for installing folding belly strakes on a spar hull may include providing a floating spar hull having a hard tank with a belly side, rotating the spar so that the belly side is in a first workable position, coupling at least one folding strake to the belly side of the spar, and coupling the strake in a folded position for transport. The method may include positioning the spar hull offshore in a transport position, upending the spar hull, unfolding the strake, fixing the strake in the unfolded position and installing the spar hull.

3. 发明申请

WO2004044176A3 ADENOVIRAL VECTOR VACCINE 审中-公开
公开(公告)号：WO2004044176A3
公开(公告)日：2004-05-27
申请号：PCT/US2003/036237
申请日：2003-11-12
申请人： DEISSEROTH, Albert, B. , ZHANG, Lixin
发明人： DEISSEROTH, Albert, B. , ZHANG, Lixin
IPC分类号： C12N15/64
摘要： Provided are adenoviral vectors for generating an immune response to antigen. The vectors comprise a transcription unit encoding a secretable polypeptide, the polypeptide comprising a secretory signal sequence upstream of a tumor antigen upstream of CD40 ligand, which is missing all or substantially all of the transmembrane domain rendering CD40L secretable. Also provided are methods of generating an immune response against cells expressing a tumor antigen by administering an effective amount of the invention vector. Further provided are methods of generating an immune response against cancer expressing a tumor antigen in an individual by administering an effective amount of the invention vector. Still further provided are methods of generating immunity to infection by human papilloma virus (HPV) by administering an effective amount of the invention vector which enocodes the E6 or E7 protein of HPV. The immunity generated is long term.

4. 发明申请

WO2011032834A1 READ AND WRITE AWARE CACHE 审中-公开
标题翻译：阅读和写AWARE CACHE
公开(公告)号：WO2011032834A1
公开(公告)日：2011-03-24
申请号：PCT/EP2010/062735
申请日：2010-08-31
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , LI, Jian , RAJAMONY, Ramakrishnan , SPEIGHT, William Evan , ZHANG, Lixin
发明人： LI, Jian , RAJAMONY, Ramakrishnan , SPEIGHT, William Evan , ZHANG, Lixin
IPC分类号： G06F12/08
CPC分类号： G06F12/0848 , G06F2212/271 , Y02D10/13
摘要： A mechanism is provided in a cache for providing a read and write aware cache. The mechanism partitions a large cache into a read-often region and a write-often region. The mechanism considers read/write frequency in a non-uniform cache architecture replacement policy. A frequently written cache line is placed in one of the farther banks. A frequently read cache line is placed in one of the closer banks. The size ratio between read-often and write-often regions may be static or dynamic. The boundary between the read-often region and the write-often region may be distinct or fuzzy.
摘要翻译：在缓存中提供了一种机制，用于提供读写感知高速缓存。该机制将大型缓存分区分为常读区域和经常写区域。该机制将读/写频率视为非均匀缓存架构替换策略。经常写入的高速缓存行放置在更远的存储区之一中。经常读取的高速缓存行被放置在其中一个较近的存储体中。常读区域和经常写区域之间的大小比可以是静态的或动态的。经常读区域和经常写区域之间的边界可能是不同的或模糊的。

5. 发明申请

WO2011000748A2 RESOURCE ALLOCATION IN VIRTUALIZED ENVIRONMENTS 审中-公开
标题翻译：虚拟环境中的资源分配
公开(公告)号：WO2011000748A2
公开(公告)日：2011-01-06
申请号：PCT/EP2010/058884
申请日：2010-06-23
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , ELNOZAHY, Elmootazbellah, Nabil , SPEIGHT, William, Evan , ZHANG, Lixin , RAJAMONY, Ramakrishnan
发明人： ELNOZAHY, Elmootazbellah, Nabil , SPEIGHT, William, Evan , ZHANG, Lixin , RAJAMONY, Ramakrishnan
IPC分类号： G06F9/455
CPC分类号： G06F9/50 , G06F9/455 , G06F9/5005 , G06F9/5011 , G06F9/5061 , G06F13/00
摘要： A method, a system, an apparatus, and a computer program product for allocating resources of one or more shared devices to one or more partitions of a virtualization environment within a data processing system. At least one user defined resource assignment is received for one or more devices associated with the data processing system. One or more registers, associated with the one or more partitions are dynamically set to execute the at least one resource assignment, whereby the at least one resource assignment enables a user defined quantitative measure (number and/or percentage) of devices to operate when the one or more transactions are executed via the partition. The system enables the one or more devices to execute one or more transactions at a bandwidth/capacity that is less than or equal to the user defined resource assignment and minimizes performance interference among partitions.
摘要翻译：一种用于将一个或多个共享设备的资源分配给数据处理系统内的虚拟化环境的一个或多个分区的方法，系统，设备和计算机程序产品。为与数据处理系统相关联的一个或多个设备接收至少一个用户定义的资源分配。与所述一个或多个分区相关联的一个或多个寄存器被动态地设置为执行所述至少一个资源分配，由此所述至少一个资源分配使得用户定义的定量测量（数量和/或百分比）能够在设备一个或多个事务通过分区执行。该系统使得一个或多个设备能够以小于或等于用户定义的资源分配的带宽/容量来执行一个或多个事务，并且最小化分区之间的性能干扰。

6. 发明申请

WO2011147884A1 FAST REMOTE COMMUNICATION AND COMPUTATION BETWEEN PROCESSORS 审中-公开
标题翻译：处理器之间的快速远程通信和计算
公开(公告)号：WO2011147884A1
公开(公告)日：2011-12-01
申请号：PCT/EP2011/058582
申请日：2011-05-25
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , CARTER, John, Bruce , ZHANG, Lixin , RAJAMANI, Karthick , SPEIGHT, William, Evan , ELNOZAHY, Elmootazbellah, Nabil , GHEITH, Ahmed , VAN HENSBERGEN, Eric
发明人： CARTER, John, Bruce , ZHANG, Lixin , RAJAMANI, Karthick , SPEIGHT, William, Evan , ELNOZAHY, Elmootazbellah, Nabil , GHEITH, Ahmed , VAN HENSBERGEN, Eric
IPC分类号： G06F9/46 , G06F15/167
CPC分类号： G06F9/544
摘要： A method, system, and computer usable program product for fast remote communication and computation between processors are provided in the preferred embodiments. A direct core to core communication unit (DCC) is configured to operate with a first processor, the first processor being a remote processor. A memory associated with the DCC receives a set of bytes, the set of bytes being sent from a second processor. An operation specified in the set of bytes is executed at the remote processor such that the operation is invoked without causing a software thread to execute.
摘要翻译：在优选实施例中提供了用于处理器之间的快速远程通信和计算的方法，系统和计算机可用程序产品。核心通信单元（DCC）的直接核心被配置为与第一处理器一起操作，第一处理器是远程处理器。与DCC相关联的存储器接收一组字节，该字节集合是从第二处理器发送的。在远程处理器中执行在该组字节中指定的操作，使得在不使软件线程执行的情况下调用该操作。

7. 发明申请

WO2011147727A1 IMPROVED REGISTER ALLOCATION FOR SIMULTANEOUS MULTITHREADED PROCESSORS 审中-公开
标题翻译：改进同步多路处理器的注册分配
公开(公告)号：WO2011147727A1
公开(公告)日：2011-12-01
申请号：PCT/EP2011/058078
申请日：2011-05-18
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , ZHANG, Lixin , SPEIGHT, William, Evan , RAWSON III, Freeman, Leigh
发明人： ZHANG, Lixin , SPEIGHT, William, Evan , RAWSON III, Freeman, Leigh
IPC分类号： G06F9/30 , G06F9/38 , G06F9/50
CPC分类号： G06F9/3851 , G06F9/30098 , G06F9/30123 , G06F9/30138 , G06F9/384 , G06F9/5016
摘要： A method, system, and computer usable program product for improved register allocation in a simultaneous multithreaded processor. A determination is made that a thread of an application in the data processing environment needs more physical registers than are available to allocate to the thread. The thread is configured to utilize a logical register that is mapped to a memory register. The thread is executed utilizing the physical registers and the memory registers.
摘要翻译：一种用于改进同时多线程处理器中的寄存器分配的方法，系统和计算机可用程序产品。确定数据处理环境中的应用程序的线程需要比可用于分配给线程的物理寄存器更多的物理寄存器。线程被配置为利用映射到存储器寄存器的逻辑寄存器。使用物理寄存器和存储器寄存器执行线程。

8. 发明申请

WO2011077098A1 INHIBITORS OF AKT ACTIVITY 审中-公开
标题翻译： AKT活动的抑制剂
公开(公告)号：WO2011077098A1
公开(公告)日：2011-06-30
申请号：PCT/GB2010/002329
申请日：2010-12-23
申请人： ALMAC DISCOVERY LIMITED , ZHANG, Lixin , TREVITT, Graham, Peter , MIEL, Hughes , BURKAMP, Frank , HARRISON, Timothy , WILKINSON, Andrew, John , FABRITIUS, Charles-Henry
发明人： ZHANG, Lixin , TREVITT, Graham, Peter , MIEL, Hughes , BURKAMP, Frank , HARRISON, Timothy , WILKINSON, Andrew, John , FABRITIUS, Charles-Henry
IPC分类号： C07D471/04 , C07D498/04 , C07D498/14 , A61K31/4741 , A61P35/00
CPC分类号： C07D498/04 , C07D471/04 , C07D498/14
摘要： The invention relates to a series of compounds with particular activity as inhibitors of the serine-threonine kinase AKT. Also provided are pharmaceutical compositions comprising same as well as methods for treating cancer.
摘要翻译：本发明涉及作为丝氨酸 - 苏氨酸激酶AKT抑制剂的特定活性的一系列化合物。还提供了包含其的药物组合物以及用于治疗癌症的方法。

9. 发明申请

WO2005051303A2 SCREENING FOR SYNERGISTIC COMPOUNDS 审中-公开
标题翻译：筛选合成化合物
公开(公告)号：WO2005051303A2
公开(公告)日：2005-06-09
申请号：PCT/US2004/039086
申请日：2004-11-19
申请人： ZHANG, Lixin
发明人： ZHANG, Lixin
IPC分类号： A61K
CPC分类号： A61K31/00 , A61K31/496 , A61K31/70 , G01N33/94 , A61K2300/00
摘要： This invention provides a powerful systematic approach to discovering next generation of chemical compounds or formulation that acts synergistically with the low dosage of known drugs. Existing drug or dropped drug candidate is selected. Then a library of either natural products or synthetic chemicals (pure or combinatorial) including macromolecules like nucleic acids and proteins is created. A functional assay including biochemical, cell based assays, animal models or clinical treatments are established, and a sub-optimal dose (10 % - 40 % of the maximum activity) of the selected drug is determined. Under this condition, the library at different titration would be screened in a high throughput manner that should give a 0.1 % to 1 % hit rate. The synergistic co-drug hit should generate 70 % - 100 % of the maximum activity by combination with the sub-optimal concentration of existing drug. Finally, the co-drug hits would be purified and identified. The co-drug could be a pure synthetic molecule, a compound from a combinatorial synthetic library or a mixture from nature or synthetic resources.
摘要翻译：本发明提供了一种强有力的系统方法来发现与低剂量的已知药物协同作用的下一代化合物或制剂。选择现有药物或药物候选药物。然后创建包括大分子如核酸和蛋白质的天然产物或合成化学品（纯或组合）的文库。建立了包括生物化学，基于细胞的测定，动物模型或临床治疗的功能测定，并确定所选药物的次优剂量（最大活性的10％-40％）。在这种情况下，不同滴定的文库将以高通量的方式进行筛选，这样可以得到0.1％至1％的命中率。通过与现有药物的次优浓度组合，协同共同药物的攻击应产生70％〜100％的最大活性。最后，共同药物的命中将被纯化和鉴定。共同药物可以是纯合成分子，来自组合合成文库的化合物或来自天然或合成资源的混合物。

10. 发明申请

WO2011147669A1 ASSIGNING MEMORY TO ON-CHIP COHERENCE DOMAINS 审中-公开
标题翻译：将存储器分配给片上相关域
公开(公告)号：WO2011147669A1
公开(公告)日：2011-12-01
申请号：PCT/EP2011/057407
申请日：2011-05-09
申请人： INTERNATIONAL BUSINESS MACHINES CORPORATION , IBM UNITED KINGDOM LIMITED , ZHANG, Lixin , SPEIGHT, William, Evan
发明人： ZHANG, Lixin , SPEIGHT, William, Evan
IPC分类号： G06F12/08
CPC分类号： G06F12/0831
摘要： A mechanism is provided for assigning memory to on-chip cache coherence domains. The mechanism assigns caches within a processing unit to coherence domains. The mechanism then assigns chunks of memory to the coherence domains. The mechanism monitors applications running on cores within the processing unit to identify needs of the applications. The mechanism may then reassign memory chunks to the cache coherence domains based on the needs of the applications running in the coherence domains. When a memory controller receives the cache miss, the memory controller may look up the address in a lookup table that maps memory chunks to cache coherence domains. Snoop requests are sent to caches within the coherence domain. If a cache line is found in a cache within the coherence domain, the cache line is returned to the originating cache by the cache containing the cache line either directly or through the memory controller. If a cache line is not found within the coherence domain, the memory controller accesses the memory to retrieve the cache line.
摘要翻译：提供了一种用于将存储器分配给片上高速缓存一致性域的机制。该机制将处理单元内的高速缓存分配给相干域。该机制然后将大块内存分配给一致性域。该机制监视在处理单元内的核心上运行的应用程序，以识别应用程序的需求。然后，该机制可以基于在相干域中运行的应用的需要将存储块重新分配给高速缓存一致性域。当存储器控制器接收高速缓存未命中时，存储器控制器可以查找映射内存块到高速缓存一致性域的查找表中的地址。侦听请求被发送到连贯域内的缓存。如果在相干域内的高速缓存中找到高速缓存行，则通过直接或通过存储器控制器的高速缓存行的高速缓存将高速缓存行返回到始发高速缓存。如果在相干域内没有找到高速缓存行，则内存控制器访问内存以检索高速缓存行。

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