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1. 发明申请

WO2006068984A1 HIGH SPEED DIFFERENTIAL RESISTIVE VOLTAGE DIGITAL-TO-ANALOG CONVERTER 审中-公开
标题翻译：高速差分电阻式数字到模拟转换器
公开(公告)号：WO2006068984A1
公开(公告)日：2006-06-29
申请号：PCT/US2005/045832
申请日：2005-12-16
申请人： EXAR CORPORATION , FOTOUHI, Bahram
发明人： FOTOUHI, Bahram
IPC分类号： H03M1/78
CPC分类号： H03M1/68 , H03M1/76 , H03M1/765
摘要： A differential digital-to-analog voltage converter (VDAC) includes, in part, a resistor, and at least two decoding stages. The resistor is divided into N equal segments each disposed in a different one of N decoders forming a first decoding stage. The resistor segment in each decoder is further divided into M equal segments to provide M tapped nodes. Each decoder of the first decoding stage delivers two of the M tapped voltages to a pair of associated output nodes, and that are complementary with respect to a voltage present at the center of the resistor segment disposed in that decoder. A second decoding stage receives the first and second voltages delivered by each of the N decoders and delivers two of these voltages, that are complementary with respect to a voltage present at the center of the resistor, to a pair of third and fourth output nodes.
摘要翻译：差分数模转换器（VDAC）部分包括电阻器和至少两个解码级。电阻器被分成N个相等的片段，每个N个等分片段分别设置在形成第一解码级的N个解码器的不同的一个中。每个解码器中的电阻器段进一步分成M个相等的段以提供M个抽头节点。第一解码级的每个解码器将两个M抽头电压传送到一对相关联的输出节点，并且相对于存在于设置在该解码器中的电阻器段的中心处的电压互补。第二解码级接收由N个解码器中的每一个传送的第一和第二电压，并且将相对于存在于电阻器中心的电压互补的这些电压中的两个输出到一对第三和第四输出节点。

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