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1. 发明申请

WO0068997A9 MOSFET WITH FIELD REDUCING TRENCHES IN BODY REGION 审中-公开
标题翻译： MOSFET在场地减少现场
公开(公告)号：WO0068997A9
公开(公告)日：2002-07-18
申请号：PCT/US0012191
申请日：2000-05-05
申请人： C P CLARE CORP
发明人： NEILSON JOHN M S , ZAFRANI MAXIME , POLCE NESTORE , JONES SCOTT
IPC分类号： H01L29/06 , H01L29/10 , H01L29/78 , H01L29/00 , H01L29/76 , H01L29/94 , H01L31/062 , H01L31/113 , H01L31/119
CPC分类号： H01L29/408 , H01L29/0634 , H01L29/0649 , H01L29/1095 , H01L29/7802
摘要： A MOSFET device (100) that exhibits low power loss characteristics by minimizing source-to-drain channel on resistance includes a semiconductor block having at least two surfaces and a drift region (110) disposed within the semiconductor block; the drift region is characterized by a first conduction type and a first predetermined dopant concentration. A body region (104) with a second conduction type is disposed within the semiconductor block between and adjacent to the first surface and the drift region. A source region (142) is disposed within the semiconductor block, and is embedded in the body region so as to be adjacent to the body region and the first surface. The MOSFET device further includes at least one drain region disposed in the semiconductor block between the second surface and the drift region. An opening is formed in the body region, extending from the first surface and into the semiconductor block. The opening has one or more interior walls (106) that are doped with a dopant of the same conduction type as the body region, and at a second predetermined dopant concentration, so as to form a depletable region near the walls. A blocking voltage applied across the MOSFET device depletes charge carriers within the semiconductor block, so as to substantially prevent electrical current from flowing through the MOSFET between the source region and the drain region. The opening, or trench (102), in the device forces the depletion region to spread laterally within the drift region as blocking voltage increases.
摘要翻译：通过使源极至漏极沟道电阻最小化而显示低功率损耗特性的MOSFET器件（100）包括具有至少两个表面的半导体块和设置在该半导体块内的漂移区（110）; 漂移区的特征在于第一导电类型和第一预定掺杂剂浓度。具有第二导电类型的主体区域（104）设置在半导体块内，并且与第一表面和漂移区域相邻。源极区域（142）设置在半导体块内，并且被嵌入在主体区域中以与身体区域和第一表面相邻。 MOSFET器件还包括设置在第二表面和漂移区域之间的半导体块中的至少一个漏极区域。在本体区域中形成有从第一表面延伸到半导体块中的开口。开口具有一个或多个内壁（106），其被掺杂有与体区相同导电类型的掺杂剂，并且以第二预定掺杂剂浓度掺杂，以在壁附近形成可消耗区域。施加在MOSFET器件两端的阻断电压耗尽半导体块内的电荷载流子，从而基本上防止电流流过源极区和漏极区之间的MOSFET。当阻塞电压增加时，器件中的开口或沟槽（102）迫使耗尽区域在漂移区域内横向扩展。

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