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1. 发明申请

WO2006124244A2 REDUNDANT COLUMN READ IN A MEMORY ARRAY 审中-公开
标题翻译：冗余列在内存阵列中读取
公开(公告)号：WO2006124244A2
公开(公告)日：2006-11-23
申请号：PCT/US2006016381
申请日：2006-04-26
申请人： ATMEL CORP , PERISETTY SRINIVAS
发明人： PERISETTY SRINIVAS
IPC分类号： G11C29/00
CPC分类号： G11C29/84 , G11C29/846
摘要： A nonvolatile memory device (200) requires no additional dummy bytes between receipt of a read instruction and a scanning out of data from a first target memory location requiring incorporation of redundant memory bits (217) . A set of most significant redundant memory bits corresponding to a range of regular memory locations may be read speculatively after a particular set of the highest order address bits are received. After a complete address is received, any requirement for substitution of redundant memory bits is known. If no substitution is required, the regular memory contents (215) are read. Any requirement for a substitution of memory bits may require replacement of the entire location. A regular read operation continues after the first location is read. In this way, complete and correct data for the memory location are available after receipt of a read instruction with no additional delay for including any required redundant memory bits.
摘要翻译：非易失性存储器件（200）在接收到读取指令和从需要并入冗余存储器位（217）的第一目标存储单元的扫描数据之间不需要额外的虚拟字节。对应于常规存储器位置的范围的一组最重要的冗余存储器位可以在接收到最高位地址位的特定集合之后被推测地读取。在接收到完整的地址之后，对于替代冗余存储器位的任何要求是已知的。如果不需要替换，则读取常规存储器内容（215）。对存储位置换的任何要求都可能需要更换整个位置。读取第一个位置后，会继续进行常规的读取操作。以这种方式，在接收到读取指令之后，可以使用完整和正确的存储器位置数据，而不需要额外的延迟来包括任何所需的冗余存储器位。

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