专利快速检索-快速检索全球专利，免费商用专利数据库-IPRDB

1. 发明申请

WO2008039908A3 PROCESSING ARCHITECTURES WITH TYPED INSTRUCTION SETS 审中-公开
标题翻译：使用特定指令集处理架构
公开(公告)号：WO2008039908A3
公开(公告)日：2008-10-30
申请号：PCT/US2007079678
申请日：2007-09-27
申请人： 3DLABS INC LTD , BLOOMFIELD JONATHAN , ROBSON JOHN DAVID , MURPHY NICHOLAS J N
发明人： BLOOMFIELD JONATHAN , ROBSON JOHN DAVID , MURPHY NICHOLAS J N
IPC分类号： G06F15/00
CPC分类号： G06F9/30145 , G06F9/3013 , G06F9/30178 , G06F9/30185 , G06F9/30192 , G06F9/3822
摘要： An architecture fear microprocessors and the like in which instructions include a type identifier, which selects one of several inteipretation registers. The mterpretation registers hold Mopnatiøn for interpreting the opcode of each instruction, so that a stream of compressed instructions (with type identifiers) can be translated into a stream of expanded instructions. Preferably the type identifiers also distinguish sequencer instructions from processing-element instructions, and can even distinguish among different types of sequencer instructions (as well as among different types of processing-element instructions).
摘要翻译：一种体系结构恐惧微处理器等，其中指令包括类型标识符，该类型标识符选择若干个内插寄存器中的一个。解释寄存器保存Mopnatiøn用于解释每条指令的操作码，以便可以将带有类型标识符的压缩指令流转换为扩展指令流。优选地，类型标识符还将定序器指令与处理元件指令区分开，并且甚至可以区分不同类型的定序器指令（以及不同类型的处理元件指令之间）。

2. 发明申请

WO2008042700A3 FLEXIBLE MICROPROCESSOR REGISTER FILE 审中-公开
标题翻译：灵活的微处理器寄存器文件
公开(公告)号：WO2008042700A3
公开(公告)日：2008-10-30
申请号：PCT/US2007079701
申请日：2007-09-27
申请人： 3DLABS INC LTD , BLOOMFIELD JOHNATHAN , ROBSON JOHN DAVID , MURPHY NICHOLAS J N
发明人： BLOOMFIELD JOHNATHAN , ROBSON JOHN DAVID , MURPHY NICHOLAS J N
IPC分类号： G06F7/38 , G06F9/00 , G06F9/44 , G06F15/00
CPC分类号： G06F9/30098 , G06F9/30032 , G06F9/30036 , G06F9/30109 , G06F9/30134 , G06F9/30141
摘要： Architectures and methods for viewing data in multiple formats within a register file. Various disclosed embodiments allow a plurality of consecutive registers within one register file to appear to be temporarily transposed by one instruction, such that each transposed register contains one byte or word from multiple consecutive registers. A program can arbitrarily reorganize the bytes within a register by swapping the value stored in any byte within the register with the value stored in any other byte within the same register. Indirect register access is also provided, without additional scoreboarding hardware, as an apparent move from one register to another. The functionality of a hardware data FIFO at the I/O is also provided, without the power consumption of register-to-register transfers. However, the size of the FTFO can be changed under program control.
摘要翻译：用于在寄存器文件内以多种格式查看数据的体系结构和方法。各种公开的实施例允许一个寄存器文件内的多个连续寄存器看起来被一个指令暂时转置，使得每个转置的寄存器包含来自多个连续寄存器的一个字节或字。程序可以通过将存储在寄存器内的任何字节中的值与存储在同一寄存器内的任何其他字节中的值交换来任意重新组织寄存器内的字节。还提供间接寄存器访问，无需额外的记分板硬件，从一个寄存器移动到另一个寄存器。还提供了I / O上硬件数据FIFO的功能，没有寄存器到寄存器传输的功耗。但是，FTFO的大小可以在程序控制下更改。

你已经成功收藏专利！

检索式保存成功!

IPRDB

热门服务

关于我们

友情链接

联系方式