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    • 3. 发明申请
    • FLIP-CHIP LIGHT EMITTING DIODE WITH A THERMALLY STABLE MULTIPLE LAYER REFLECTIVE P-TYPE CONTACT
    • 带有热稳定型多层反射型P型接触器的片状光发光二极管
    • WO2004084320A3
    • 2005-04-14
    • PCT/US2004008514
    • 2004-03-19
    • GELCORE LLCVENUGOPALAN HARI S
    • VENUGOPALAN HARI S
    • H01L33/32H01L33/38H01L33/40H01L33/00
    • H01L33/40H01L33/32H01L2224/14H01L2224/16225
    • A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).
    • 公开了用于倒装芯片接合的p型触点(30),并且使III族氮化物倒装芯片发光二极管管芯(10)的p型III族氮化物层(28)与接合焊盘(60)电接触 )。 第一钯层(42)设置在p型III族氮化物层(28)上。 第一钯层(42)通过p型III族氮化物层(28)的天然氧化物扩散以与p型III族氮化物层(28)电接触。 反射银层(44)设置在第一钯层(42)上。 第二钯层(46)设置在银层(44)上。 包括至少两层(50,52,54)的粘合堆叠(48)设置在第二钯层(46)上。 接合堆叠(48)适于将p型层(28)倒装成键合到接合焊盘(60)。
    • 5. 发明申请
    • FLIP-CHIP LIGHT EMITTING DIODE WITH A THERMALLY STABLE MULTIPLE LAYER REFLECTIVE P-TYPE CONTACT
    • 带有热稳定型多层反射型P型接触器的片状光发光二极管
    • WO2004084320A2
    • 2004-09-30
    • PCT/US2004/008514
    • 2004-03-19
    • GELCORE LLCVENUGOPALAN, Hari, S.
    • VENUGOPALAN, Hari, S.
    • H01L33/00
    • H01L33/40H01L33/32H01L2224/14H01L2224/16225
    • A p-type contact (30) is disclosed for flip chip bonding and electrically contacting a p-type group III-nitride layer (28) of a group III-nitride flip chip light emitting diode die (10) with a bonding pad (60). A first palladium layer (42) is disposed on the p-type group III-nitride layer (28). The first palladium layer (42) is diffused through a native oxide of the p-type group III-nitride layer (28) to make electrical contact with the p-type group III-nitride layer (28). A reflective silver layer (44) is disposed on the first palladium layer (42). A second palladium layer (46) is disposed on the silver layer (44). A bonding stack (48) including at least two layers (50, 52, 54) is disposed on the second palladium layer (46). The bonding stack (48) is adapted for flip chip bonding the p-type layer (28) to the bonding pad (60).
    • 公开了用于倒装芯片接合的p型触点(30),并且使III族氮化物倒装芯片发光二极管管芯(10)的p型III族氮化物层(28)与接合焊盘(60)电接触 )。 第一钯层(42)设置在p型III族氮化物层(28)上。 第一钯层(42)通过p型III族氮化物层(28)的天然氧化物扩散以与p型III族氮化物层(28)电接触。 反射银层(44)设置在第一钯层(42)上。 第二钯层(46)设置在银层(44)上。 包括至少两层(50,52,54)的粘合堆叠(48)设置在第二钯层(46)上。 接合堆叠(48)适于将p型层(28)倒装成键合到接合焊盘(60)。