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1. 发明申请

WO2006017074A2 LOW-DOPED SEMI-INSULATING SIC CRYSTALS AND METHOD 审中-公开
标题翻译：低密度半导体绝缘SIC晶体和方法
公开(公告)号：WO2006017074A2
公开(公告)日：2006-02-16
申请号：PCT/US2005023796
申请日：2005-07-06
申请人： II VI INC , CHEN JIHONG , ZWIEBACK ILYA , GUPTA AVINASH K , BARRETT DONOVAN L , HOPKINS RICHARD H , SEMENAS EDWARD , ANDERSON THOMAS A , SOUZIS ANDREW E
发明人： CHEN JIHONG , ZWIEBACK ILYA , GUPTA AVINASH K , BARRETT DONOVAN L , HOPKINS RICHARD H , SEMENAS EDWARD , ANDERSON THOMAS A , SOUZIS ANDREW E
IPC分类号： H01L51/05
CPC分类号： H01L29/1608 , C30B23/00 , C30B29/36 , H01L21/02378 , H01L21/02529 , H01L21/02581 , H01L21/02631
摘要： The invention relates to substrates of semi-insulating silicon carbide used for semiconductor devices and a method for making the same. The substrates have a resistivity above 106 Ohm-cm, and preferably above 108 Ohm-cm, and most preferably above 109 Ohm-cm, and a capacitance below 5 pF/mm2 and preferably below 1 pF/mm2. The electrical properties of the substrates are controlled by a small amount of added deep level impurity, large enough in concentration to dominate the electrical behavior, but small enough to avoid structural defects. The substrates have concentrations of unintentional background impurities, including shallow donors and acceptors, purposely reduced to below 5°1016 cm-3, and preferably to below 1°1016 cm-3, and the concentration of deep level impurity is higher, and preferably at least two times higher, than the difference between the concentrations of shallow acceptors and shallow donors. The deep level impurity comprises one of selected metals from the periodic groups IB, IIB, IIIB, IVB, VB, VIB, VIIB and VIIIB. Vanadium is a preferred deep level element. In addition to controlling the resistivity and capacitance, a further advantage of the invention is an increase in electrical uniformity over the entire crystal and reduction in the densityof crystal defects.
摘要翻译：本发明涉及用于半导体器件的半绝缘碳化硅的衬底及其制造方法。基板的电阻率高于106欧姆 - 厘米，优选高于108欧姆 - 厘米，最优选高于109欧姆 - 厘米，电容低于5 pF / mm2，最好低于1 pF / mm2。基板的电学特性由少量的加入的深度杂质控制，其浓度足够大以控制电气行为，但足够小以避免结构缺陷。底物具有无意的背景杂质浓度，包括浅供体和受体，故意降低至5×1016cm-3以下，优选低于1×1016cm-3，深层杂质浓度较高，优选为比浅受体和浅供体的浓度差异高两倍以上。深层杂质包括选自周期性基团IB，IIB，IIIB，IVB，VB，VIB，VIIB和VIIIB的金属之一。钒是首选的深层元素。除了控制电阻率和电容之外，本发明的另一个优点是在整个晶体上的电均匀性增加和晶体缺陷密度的降低。

2. 发明申请

WO2006113657A1 METHOD OF AND SYSTEM FOR FORMING SIC CRYSTALS HAVING SPATIALLY UNIFORM DOPING IMPURITIES 审中-公开
标题翻译：用于形成具有空间均匀掺杂污染物的SIC晶体的方法和系统
公开(公告)号：WO2006113657A1
公开(公告)日：2006-10-26
申请号：PCT/US2006/014463
申请日：2006-04-18
申请人： II-VI INCORPORATED , GUPTA, Avinash, K. , SEMENAS, Edward , ZWIEBACK, Ilya , BARRETT, Donovan, L. , SOUZIS, Andrew, E.
发明人： GUPTA, Avinash, K. , SEMENAS, Edward , ZWIEBACK, Ilya , BARRETT, Donovan, L. , SOUZIS, Andrew, E.
IPC分类号： C30B29/36 , C30B23/00
CPC分类号： C30B29/36 , C30B23/00 , Y10T117/10 , Y10T117/1008 , Y10T117/1016 , Y10T117/108
摘要： In a physical vapor transport method and system, a growth chamber charged with source material and a seed crystal in spaced relation is provided. At least one capsule having at least one capillary extending between an interior thereof and an exterior thereof, wherein the interior of the capsule is charged with a dopant, is also provided. Each capsule is installed in the growth chamber. Through a growth reaction carried out in the growth chamber following installation of each capsule therein, a crystal is formed on the seed crystal using the source material, wherein the formed crystal is doped with the dopant.
摘要翻译：在物理蒸气传输方法和系统中，提供了充满源材料的生长室和间隔开的晶种。至少一个胶囊具有在其内部和外部之间延伸的至少一个毛细管，其中胶囊的内部充有掺杂剂。每个胶囊安装在生长室中。通过在每个胶囊安装之后在生长室中进行的生长反应，使用源材料在晶种上形成晶体，其中所形成的晶体掺杂有掺杂剂。

3. 发明申请

WO2006017074A3 LOW-DOPED SEMI-INSULATING SIC CRYSTALS AND METHOD 审中-公开
公开(公告)号：WO2006017074A3
公开(公告)日：2006-02-16
申请号：PCT/US2005/023796
申请日：2005-07-06
申请人： II-VI INCORPORATED , CHEN, Jihong , ZWIEBACK, Ilya , GUPTA, Avinash, K. , BARRETT, Donovan, L. , HOPKINS, Richard, H. , SEMENAS, Edward , ANDERSON, Thomas, A. , SOUZIS, Andrew, E.
发明人： CHEN, Jihong , ZWIEBACK, Ilya , GUPTA, Avinash, K. , BARRETT, Donovan, L. , HOPKINS, Richard, H. , SEMENAS, Edward , ANDERSON, Thomas, A. , SOUZIS, Andrew, E.
IPC分类号： C30B25/12
摘要： The invention relates to substrates of semi-insulating silicon carbide used for semiconductor devices and a method for making the same. The substrates have a resistivity above 106 Ohm-cm, and preferably above 108 Ohm-cm, and most preferably above 109 Ohm-cm, and a capacitance below 5 pF/mm2 and preferably below 1 pF/mm2. The electrical properties of the substrates are controlled by a small amount of added deep level impurity, large enough in concentration to dominate the electrical behavior, but small enough to avoid structural defects. The substrates have concentrations of unintentional background impurities, including shallow donors and acceptors, purposely reduced to below 5•1016 cm-3, and preferably to below 1•1016 cm-3, and the concentration of deep level impurity is higher, and preferably at least two times higher, than the difference between the concentrations of shallow acceptors and shallow donors. The deep level impurity comprises one of selected metals from the periodic groups IB, IIB, IIIB, IVB, VB, VIB, VIIB and VIIIB. Vanadium is a preferred deep level element. In addition to controlling the resistivity and capacitance, a further advantage of the invention is an increase in electrical uniformity over the entire crystal and reduction in the densityof crystal defects.

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