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1. 发明申请

WO1997009839A1 SWITCH WITH ONE-BIT RESOLUTION 审中-公开
标题翻译：开关与单位分辨率
公开(公告)号：WO1997009839A1
公开(公告)日：1997-03-13
申请号：PCT/FI1996000473
申请日：1996-09-04
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN, Markku , KALLIONIEMI, Tapio
发明人： NOKIA TELECOMMUNICATIONS OY
IPC分类号： H04Q11/04
CPC分类号： H04Q11/04
摘要： The invention relates to implementing switching in a switch in a digital telecommunications system. N incoming signals are introduced to the switch, each comprising successive one-bit time slots that form successive frames each comprising K time slots. The contents of the time slots for the incoming signals are stored in a memory at a memory location determined by a write address in such a way that a word having the width of at least one bit is stored at one memory location. One word at a time is read out from the memory, wherefrom the desired bit is selected for the outbound signal from the switch. To optimize the size and power consumption of the switch, the incoming signals are distributed to X multiplexers (A1...Ax), each interleaving the incoming signals thereto into a single serial output signal (IN1...INX), and writing into memory is carried out by writing the contents of the time slots of the output signals into the same memory location having a width of at least X bits, the memory location changing from one time slot of the output signals of the multiplexers to another.
摘要翻译：本发明涉及实现数字电信系统中交换机的切换。 N个输入信号被引入到交换机，每个包括连续的一个时隙，其形成连续的帧，每个帧包括K个时隙。用于输入信号的时隙的内容被存储在由写地址确定的存储器位置的存储器中，使得具有至少一位的宽度的字被存储在一个存储器位置。从存储器中读出一次一个字，从交换机选择出站信号所需的位。为了优化开关的尺寸和功耗，输入信号分配到X多路复用器（A1 ... Ax），每个将输入信号交织为单个串行输出信号（IN1 ... INX），并写入通过将输出信号的时隙的内容写入具有至少X位的宽度的相同存储位置来执行存储器，存储器位置从多路复用器的输出信号的一个时隙改变到另一个。

2. 发明申请

WO9602877A3 METHOD AND SYSTEM FOR AUTOMATIC COMPENSATION OF LINE DELAY IN A CLOCK DISTRIBUTION SYSTEM 审中-公开
标题翻译：时钟分配系统中线路延迟自动补偿的方法和系统
公开(公告)号：WO9602877A3
公开(公告)日：1996-03-14
申请号：PCT/FI9500400
申请日：1995-07-10
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN MARKKU
发明人： RUUSKANEN MARKKU
IPC分类号： G06F1/10 , H04J3/06 , H04L7/00
CPC分类号： H04J3/0685 , G06F1/10 , H04J3/0682
摘要： The invention relates to a method and system for automatic compensation of line delay in a clock distribution system which comprises a clock signal generator (1) which supplies a master clock signal through a clock path (2) to a number of decentralized clock signal buffers (P1...PN). According to the invention, the system further comprises a counter, or a similar device, which measures the propagation time of a measuring signal from the corresponding clock signal buffer to the end (B) of the line (3) and back.

3. 发明申请

WO1996002877A2 METHOD AND SYSTEM FOR AUTOMATIC COMPENSATION OF LINE DELAY IN A CLOCK DISTRIBUTION SYSTEM 审中-公开
标题翻译：时钟分配系统中线路延迟自动补偿的方法和系统
公开(公告)号：WO1996002877A2
公开(公告)日：1996-02-01
申请号：PCT/FI1995000400
申请日：1995-07-10
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN, Markku
发明人： NOKIA TELECOMMUNICATIONS OY
IPC分类号： G06F01/10
CPC分类号： H04J3/0685 , G06F1/10 , H04J3/0682
摘要： The invention relates to a method and system for automatic compensation of line delay in a clock distribution system which comprises a clock signal generator (1) which supplies a master clock signal through a clock path (2) to a number of decentralized clock signal buffers (P1...PN). According to the invention, the system further comprises a counter, or a similar device, which measures the propagation time of a measuring signal from the corresponding clock signal buffer to the end (B) of the line (3) and back.
摘要翻译：本发明涉及一种用于自动补偿时钟分配系统中的线路延迟的方法和系统，其包括时钟信号发生器（1），时钟信号发生器（1）通过时钟路径（2）将主时钟信号提供给多个分散时钟信号缓冲器 P1 ... PN）。根据本发明，该系统还包括一个计数器或类似的装置，其测量测量信号从相应的时钟信号缓冲器到线路（3）的末端（B）的传播时间并返回。

4. 发明申请

WO9945688A2 REDUNDANT SWITCHING ARRANGEMENT 审中-公开
标题翻译：冗余切换安排
公开(公告)号：WO9945688A2
公开(公告)日：1999-09-10
申请号：PCT/FI9900175
申请日：1999-03-05
申请人： NOKIA TELECOMMUNICATIONS OY , HURTTA ARI , TUOMINEN ANTTI , RUUSKANEN MARKKU
发明人： HURTTA ARI , TUOMINEN ANTTI , RUUSKANEN MARKKU
IPC分类号： H04M3/22
CPC分类号： H04M3/22
摘要： The invention relates to a redundant switching arrangement using a first and second switching network (SWF_A, SWF_B) or other switching element. The switching elements are used to carry out switching operations in the same way, so that one of the switching elements serves as an active switching element whose switching operations are utilised, while the other switching element serves as a passive switching element backing up the active switching element. To ensure that any faults occurring in the switching elements in such a redundant switching arrangement are detected as quickly as possible, their operation is monitored by comparing the data of the corresponding output channels of the first and second switching elements, and if such a comparison shows that the data contained in any of the corresponding output channels are not identical, an internal test is carried out for at least one of the switching elements to verify the data of the output channel involved. The internal compare test(s) is/are used as a basis for selecting the switching element to continue to serve as the active switching element.
摘要翻译：本发明涉及使用第一和第二开关网络（SWF_A，SWF_B）或其他开关元件的冗余开关装置。开关元件用于以相同的方式执行开关操作，使得其中一个开关元件用作其开关操作被利用的有源开关元件，而另一个开关元件用作无源开关元件，从而支持有源开关元件。为了确保尽可能快地检测在这种冗余开关装置中的开关元件中出现的任何故障，通过比较第一和第二开关元件的相应输出通道的数据来监控它们的操作，并且如果这样的比较示出包含在任何相应输出通道中的数据不相同，则对至少一个开关元件执行内部测试以验证涉及的输出通道的数据。内部比较测试被用作选择开关元件以继续用作有源开关元件的基础。

5. 发明申请

WO1994010752A1 A METHOD AND A DEVICE FOR A CHANGEOVER OF ASYNCHRONOUS CLOCK SIGNALS 审中-公开
标题翻译：用于改变异步时钟信号的方法和装置
公开(公告)号：WO1994010752A1
公开(公告)日：1994-05-11
申请号：PCT/FI1993000430
申请日：1993-10-20
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN, Markku
发明人： NOKIA TELECOMMUNICATIONS OY
IPC分类号： H03K05/135
CPC分类号： H03K5/135 , G06F1/08
摘要： The invention relates to a method of and a device for providing redundacy for an asynchronous clock signal (MC), in which the redundant asynchronous clock signals (M1, M2) are changed over for being used as a clock signal by means of a separate selection signal (MS). According to the invention, a changeover is performed by setting the outgoing clock signal (MC) at the edge of the used clock signal (M1 or M2) to a constant state, and the clock signal to be used (M1 or M2) is activated to constitute the outgoing clock signal (MC) at such an edge of itself which is at least the second in order counted from the moment at which the outgoing clock signal (MC) is set to the constant state.
摘要翻译：本发明涉及一种用于为异步时钟信号（MC）提供冗余的方法和装置，其中冗余异步时钟信号（M1，M2）被改变以便通过单独选择被用作时钟信号信号（MS）。根据本发明，通过将所使用的时钟信号（M1或M2）的边缘处的输出时钟信号（MC）设置为恒定状态来执行切换，并且使用的时钟信号（M1或M2）被激活以在从输出时钟信号（MC）被设置为恒定状态的时刻开始计数的至少第二个的这样的边缘处构成输出时钟信号（MC）。

6. 发明申请

WO0201731A2 METHOD AND SYSTEM FOR PROCESSING TELECOMMUNICATION SIGNALS 审中-公开
标题翻译：用于处理电信信号的方法和系统
公开(公告)号：WO0201731A2
公开(公告)日：2002-01-03
申请号：PCT/FI0100572
申请日：2001-06-15
申请人： NOKIA CORP , RUUSKANEN MARKKU , LEPPAENEN REIJO
发明人： RUUSKANEN MARKKU , LEPPAENEN REIJO
IPC分类号： H04Q11/04 , H04B
CPC分类号： H04Q11/04
摘要： The present invention relates to a method and a system of implementing a signal processing facility in a digital transmission system environment. In the invention, the signal between the switching field (GSW) and the interface unit ETS1 is divided into a first (DEOS, DSOE) and second signal (DGO, DSO). The first signal is directed through the signal processing unit and the second signal past it. Either one of the signals is selected and activated depending on the need of the signal processing and the operational status of the signal processing unit; this information the interface unit gets from the control unit.
摘要翻译：本发明涉及在数字传输系统环境中实现信号处理设备的方法和系统。在本发明中，切换场（GSW）和接口单元ETS1之间的信号被分成第一（DEOS，DSOE）和第二信号（DGO，DSO）。第一信号被引导通过信号处理单元，并且第二信号经过它。根据信号处理的需要和信号处理单元的操作状态，选择并激活信号中的任何一个; 该信息是接口单元从控制单元获得的。

7. 发明申请

WO1995015030A1 METHOD AND DEVICE FOR SYMMETRIZING A CLOCK SIGNAL 审中-公开
标题翻译：用于对准时钟信号的方法和装置
公开(公告)号：WO1995015030A1
公开(公告)日：1995-06-01
申请号：PCT/FI1994000525
申请日：1994-11-24
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN, Markku
发明人： NOKIA TELECOMMUNICATIONS OY
IPC分类号： H03K05/156
CPC分类号： H03K5/1565
摘要： The present invention relates to a method and device for symmetrizing a clock signal. The leading or trailing edge of each pulse of the clock signal (Fin) to be symmetrized is used for forming the first edge of the pulse of the corresponding symmetrized clock signal (Fout). The pulse ratio of the symmetrized clock signal is measured; and on the basis of the measured pulse ratio, the time constant circuit (R1, C1), determining the location of the second edge of the pulse of the symmetrized clock signal, is adjusted by means of a control loop (R6, C2, A) in such a manner that the second edge of the pulse of the symmetrized clock signal (Fout) settles in a desired position in the symmetrized clock signal.
摘要翻译：本发明涉及用于对称时钟信号的方法和装置。要对称化的时钟信号（Fin）的每个脉冲的前沿或后沿用于形成对应的对称时钟信号（Fout）的脉冲的第一个边沿。测量对称时钟信号的脉冲比; 并且基于所测量的脉冲比，通过控制回路（R6，C2，A）调整确定对称时钟信号的脉冲的第二边缘的位置的时间常数电路（R1，C1）），使得对称化时钟信号（Fout）的脉冲的第二边缘落在对称化时钟信号中的期望位置。

8. 发明申请

WO1994015400A1 A METHOD OF LOCKING A SIGNAL PHASE ADAPTIVELY TO A REFERENCE SIGNAL PHASE AND A PHASE LOCK ADAPTIVE TO THE FREQUENCY OF THE REFERENCE SIGNAL 审中-公开
标题翻译：一种将信号相位锁定到参考信号相位的方法和适应于参考信号频率的相位锁相
公开(公告)号：WO1994015400A1
公开(公告)日：1994-07-07
申请号：PCT/FI1993000558
申请日：1993-12-28
申请人： NOKIA TELECOMMUNICATIONS OY , RUUSKANEN, Markku
发明人： NOKIA TELECOMMUNICATIONS OY
IPC分类号： H03L07/07
CPC分类号： H03L7/085 , H03L7/10 , H03L7/18
摘要： The invention relates to a method of locking a clock signal (FOUT) phase adaptively to the phase of different reference signals (FIN) and to a phase lock implementing the method. According to the invention, the frequency of an input reference signal is determined by measuring and the determined reference signal (FIN) is converted by dividing to a signal (FDIN), the frequency of which is some integer multiple of the frequency of the clock signal (FOUT) to be phase locked, or the frequency of the clock signal to be phase locked divided by some integer. The signal (FDIN) and the clock singal (FOUT) to be phase locked or a signal (FD) proportional thereto are used as reference signals of a phase comparator (2) for locking the clock signal phase in a manner known per se.
摘要翻译：本发明涉及一种将时钟信号（FOUT）相位自适应地锁定到不同参考信号（FIN）的相位的方法以及实现该方法的相位锁定的方法。根据本发明，通过测量来确定输入参考信号的频率，并且通过将所确定的参考信号（FIN）分频为信号（FDIN）来转换，其频率是时钟信号的频率的整数倍（FOUT）相位锁定，或将要锁相的时钟信号的频率除以某个整数。要相位锁定的信号（FDIN）和时钟信号（FOUT）或与其成比例的信号（FD）被用作用于以本身已知的方式锁定时钟信号相位的相位比较器（2）的参考信号。

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