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1. 发明申请

WO2009059906A1 MEMORY CELLS 审中-公开
标题翻译：记忆细胞
公开(公告)号：WO2009059906A1
公开(公告)日：2009-05-14
申请号：PCT/EP2008/064459
申请日：2008-10-24
申请人： ICERA INC , MONK KENNETH, Trevor
发明人： MONK KENNETH, Trevor
IPC分类号： H01L27/11
CPC分类号： H01L27/1104 , G11C11/412 , H01L27/0207 , H01L27/11
摘要： A method of manufacturing an integrated circuit (IC), comprising: defining a plurality of continuous active areas; forming conducting lines extending over the active areas; and using the conducting lines as a mask, introducing dopant into the active areas. Connections are provided between doped regions and conducting lines to form first and second circuit portions, at least one active area being continuous between those portions. In that active area, connections are provided between doped regions and conducting lines to form a pair of diode-connected transistors in reverse bias to one another between the first and second circuit portions, connected so as to leave a shared, unconnected doped region between the pair. The present invention also relates to a corresponding IC.
摘要翻译：一种制造集成电路（IC）的方法，包括：限定多个连续有效区域; 形成延伸在有效区域上的导线; 并且使用导线作为掩模，将掺杂剂引入到有源区域中。在掺杂区域和导线之间提供连接以形成第一和第二电路部分，至少一个有效区域在这些部分之间是连续的。在该有源区域中，在掺杂区域和导电线之间提供连接以在第一和第二电路部分之间彼此反向偏压地形成一对二极管连接的晶体管，这些晶体管连接成在第一和第二电路部分之间留下共用的未连接的掺杂区域对。本发明还涉及相应的IC。

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