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    • 1. 发明申请
    • DIGITAL TO ANALOGUE CONVERTER CIRCUITS AND METHODS OF OPERATION THEREOF
    • 数字到模拟转换器电路及其操作方法
    • WO2009030933A1
    • 2009-03-12
    • PCT/GB2008/003030
    • 2008-09-08
    • WOLFSON MICROELECTRONICS PLCQUINN, Simon, KennethHOWLETT, Andrew, James
    • QUINN, Simon, KennethHOWLETT, Andrew, James
    • H03M1/06H03M1/08H03M1/80H03M3/04
    • H03M1/0614H03M1/0872H03M1/804H03M3/358H03M3/376H03M3/502
    • A multi-bit digital to analogue converter is implemented by a switched-capacitor arrangement in which a reservoir capacitor (Cf) accumulates charge representing the desired analogue output signal (Vout+/Vout-). An array of further capacitors (C0-CN) correspond in number at least to the number of data bits (D0-DN) to be converted. The capacitors (Cf, C0-CN) are selectively interconnected with one another and with reference voltage sources (Vmid, Vdd, Vss) in a repetitive sequence of phases including (i) a sampling phase (P2) in which said further capacitors are connected (S3, S4) to reference voltages selected in accordance with the values of said data bits, (ii) an equalisation phase (P6a) in which said further capacitors are connected (S2) in parallel with one another without connecting them in parallel with the first capacitor, followed by (iii) a transfer phase (P6b) in which the parallel connected further capacitors are connected (S1, S5) in parallel with the first capacitor. The equalisation phase masks nonlinearities arising in switches (S2) and thereby improves harmonic distortion.
    • 多位数模转换器由开关电容器布置实现,其中储存电容器(Cf)累积表示期望的模拟输出信号(Vout + / Vout-)的电荷。 另外的电容器(C0-CN)的数组至少与要转换的数据位数(D0-DN)相对应。 电容器(Cf,C0-CN)选择性地互相互连,并且以参考电压源(Vmid,Vdd,Vss)以相位重复的顺序相互连接,包括(i)其中所述另外的电容器被连接的采样相位(P2) (S3,S4),根据所述数据位的值选择参考电压,(ii)彼此并联连接所述另外的电容器(S2)的均衡相位(P6a),而不将它们与 第一电容器,之后是(iii)与第一电容器并联连接有并联的另外的电容器(S1,S5)的转移相位(P6b)。 均衡相屏蔽了开关(S2)中出现的非线性,从而改善了谐波失真。