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1. 发明申请

WO2007024815A2 SIGNALING SYSTEM WITH DATA CORRELATION DETECTION 审中-公开
标题翻译：具有数据相关检测的信号系统
公开(公告)号：WO2007024815A2
公开(公告)日：2007-03-01
申请号：PCT/US2006/032687
申请日：2006-08-21
申请人： RAMBUS INC. , STOJANOVIC, Vladimir, M. , HO, Andrew , CHEN, Fred, F. , LI, Simon
发明人： STOJANOVIC, Vladimir, M. , HO, Andrew , CHEN, Fred, F. , LI, Simon
CPC分类号： H04L25/03006
摘要： Conditionally updating equalization tap weights within an equalized signaling system based on a measure of correlation that indicates a difference between the number of received data values that have matching bits at a first pair of predetermined bit positions, and the number of received data values that have non-matching bits at the first pair of predetermined bit positions.
摘要翻译：基于指示在第一对预定比特位置具有匹配比特的接收数据值的数目之间的差异的相关性测量值以及具有非均衡信令系统的接收数据值的数量，在均衡信令系统内有条件地更新均衡抽头权重 - 在第一对预定位位置匹配位。

2. 发明申请

WO2007016274A2 RAM-DAC FOR TRANSMIT PREEMPHASIS 审中-公开
标题翻译：用于传输预留的RAM-DAC
公开(公告)号：WO2007016274A2
公开(公告)日：2007-02-08
申请号：PCT/US2006029241
申请日：2006-07-25
申请人： RAMBUS INC , HO ANDREW , CHEN FRED F , ZERBE JARED L
发明人： HO ANDREW , CHEN FRED F , ZERBE JARED L
IPC分类号： H04L25/03
CPC分类号： H04L25/03834 , H03H17/0294
摘要： Described are transmitters with RAM-DAC based pre-emphasis filters that can be updated adaptively without interfering with data transmission. The memory within the RAM- DAC is divided into active and inactive memory locations, in which active memory locations are those to be accessed in the near future, and consequently cannot be updated (written to) at a given time due without inducing a read/write conflict. One embodiment monitors incoming memory addresses to find an adequate time window for a write to take place without a read interference. Another embodiment includes two memory blocks with similar address space, one of which may be updated as the other is used to for data transmission. Some embodiments employ a RAM-DAC with reduced memory size and complexity.
摘要翻译：描述的是具有基于RAM-DAC的预加重滤波器的发射器，其可以自适应地更新而不干扰数据传输。 RAM-DAC内的存储器被分为有源和非活动存储器位置，其中有效存储器位置是在不久的将来被访问的存储器位置，因此不能在给定时间更新（写入），而不引起读/ 写冲突。一个实施例监视进入的存储器地址以找到足够的时间窗口，以便在没有读取干扰的情况下进行写入。另一个实施例包括具有相似地址空间的两个存储器块，其中之一可以被更新，而另一个用于数据传输。一些实施例采用具有减小的存储器大小和复杂度的RAM-DAC。

3. 发明申请

WO2005060193A2 HIGH SPEED SIGNALING SYSTEM WITH ADAPTIVE TRANSMIT PRE-EMPHASIS, REFLECTION CANCELLATION AND OFFSET CANCELLATION 审中-公开
标题翻译：具有自适应发射预先激活的高速信号系统，反射消除和偏移消除
公开(公告)号：WO2005060193A2
公开(公告)日：2005-06-30
申请号：PCT/US2004/042195
申请日：2004-12-16
申请人： RAMBUS INC. , STOJANOVIC, Vladimir, M. , HO, Andrew , BESSIOS, Anthony , CHEN, Fred, F. , ALON, Elad , HOROWITZ, Mark, A. , GARLEPP, Bruno, W.
发明人： STOJANOVIC, Vladimir, M. , HO, Andrew , BESSIOS, Anthony , CHEN, Fred, F. , ALON, Elad , HOROWITZ, Mark, A. , GARLEPP, Bruno, W.
IPC分类号： H04L25/49
CPC分类号： H04L25/03057 , H04L25/028 , H04L25/0292 , H04L25/03343 , H04L25/061 , H04L25/4906

4. 发明申请

WO2007024815A3 SIGNALING SYSTEM WITH DATA CORRELATION DETECTION 审中-公开
标题翻译：具有数据相关性检测的信号发送系统
公开(公告)号：WO2007024815A3
公开(公告)日：2007-04-19
申请号：PCT/US2006032687
申请日：2006-08-21
申请人： RAMBUS INC , STOJANOVIC VLADIMIR M , HO ANDREW , CHEN FRED F , LI SIMON
发明人： STOJANOVIC VLADIMIR M , HO ANDREW , CHEN FRED F , LI SIMON
IPC分类号： H04L25/03
CPC分类号： H04L25/03006
摘要： Conditionally updating equalization tap weights within an equalized signaling system based on a measure of correlation that indicates a difference between the number of received data values that have matching bits at a first pair of predetermined bit positions, and the number of received data values that have non-matching bits at the first pair of predetermined bit positions.
摘要翻译：基于指示在第一对预定比特位置处具有匹配比特的接收数据值的数量与具有非接收数据值的接收数据值的数量之间的差的相关性度量，在均衡信令系统内有条件地更新均衡抽头权重在第一对预定比特位置上匹配比特。

5. 发明申请

WO2007016274A3 RAM-DAC FOR TRANSMIT PREEMPHASIS 审中-公开
公开(公告)号：WO2007016274A3
公开(公告)日：2007-02-08
申请号：PCT/US2006/029241
申请日：2006-07-25
申请人： RAMBUS INC. , HO, Andrew , CHEN, Fred, F. , ZERBE, Jared, L.
发明人： HO, Andrew , CHEN, Fred, F. , ZERBE, Jared, L.
IPC分类号： H04L25/03
摘要： Described are transmitters with RAM-DAC based pre-emphasis filters that can be updated adaptively without interfering with data transmission. The memory within the RAM- DAC is divided into active and inactive memory locations, in which active memory locations are those to be accessed in the near future, and consequently cannot be updated (written to) at a given time due without inducing a read/write conflict. One embodiment monitors incoming memory addresses to find an adequate time window for a write to take place without a read interference. Another embodiment includes two memory blocks with similar address space, one of which may be updated as the other is used to for data transmission. Some embodiments employ a RAM-DAC with reduced memory size and complexity.

6. 发明申请

WO2004093144A2 PARTIAL RESPONSE RECEIVER 审中-公开
标题翻译：部分响应接收者
公开(公告)号：WO2004093144A2
公开(公告)日：2004-10-28
申请号：PCT/US2004/010980
申请日：2004-04-09
申请人： RAMBUS, INC. , STOJANOVIC, Vladimir, M. , HOROWITZ, Mark, A. , ZERBE, Jared, L. , BESSIOS, Anthony , HO, Andrew, C., C. , WEI, Jason, C. , TSANG, Grace , GARLEPP, Bruno, W.
发明人： STOJANOVIC, Vladimir, M. , HOROWITZ, Mark, A. , ZERBE, Jared, L. , BESSIOS, Anthony , HO, Andrew, C., C. , WEI, Jason, C. , TSANG, Grace , GARLEPP, Bruno, W.
IPC分类号： H01L
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A receive circuit for receiving a signal transmitted via an electrical signal conductor. A first sampling circuit generates a first sample value that indicates whether the signal exceeds a first threshold level, and a second sampling circuit generates a second sample value that indicates whether the signal exceeds a second threshold level. A first select circuit receives the first and second sample values from the first and second sampling circuits and selects, according to a previously generated sample value, either the first sample value or the second sample value to be output as a selected sample value.
摘要翻译：用于接收通过电信号导体发送的信号的接收电路。第一采样电路产生指示信号是否超过第一阈值电平的第一采样值，并且第二采样电路产生指示信号是否超过第二阈值电平的第二采样值。第一选择电路从第一和第二采样电路接收第一和第二采样值，并根据先前产生的采样值选择作为选择的采样值输出的第一采样值或第二采样值。

7. 发明申请

WO2007038536A2 IN MOLD MANUFACTURING OF AN OBJECT COMPRISING A FUNCTIONAL ELEMENT 审中-公开
标题翻译：包含功能元件的对象的模具制造
公开(公告)号：WO2007038536A2
公开(公告)日：2007-04-05
申请号：PCT/US2006/037531
申请日：2006-09-25
申请人： SIPIX IMAGING, INC. , LIAO, Chih-Yuan , HO, Andrew
发明人： LIAO, Chih-Yuan , HO, Andrew
IPC分类号： B29C45/00
CPC分类号： B29C45/14778 , B29C43/18 , B29C43/20 , B29C45/14811 , B29C45/14827 , B29C49/20 , B29C51/12 , B29K2033/20 , B29K2077/10 , B29K2715/006 , B29L2031/3061 , H01L21/565 , H01L2924/0002 , H05K1/0284 , H05K1/0393 , H05K3/0058 , H05K3/20 , H05K3/386 , H05K2201/09118 , H05K2203/1327 , H01L2924/00
摘要： This invention relates to an object having a functional element embedded in its top surface and processes for its manufacturing. The object is in general formed by molding, stamping, lamination or a combination thereof. The functional element is includes any electrical or mechanical elements that are capable of performing a function.
摘要翻译：本发明涉及具有嵌入在其顶表面中的功能元件的物体及其制造方法。该目的通常通过模制，冲压，层压或其组合形成。功能元件包括能够执行功能的任何电气或机械元件。

8. 发明申请

WO2006078845A3 HIGH-SPEED SIGNALING SYSTEMS WITH ADAPTABLE PRE-EMPHASIS AND EQUALIZATION 审中-公开
标题翻译：具有适应性前瞻性和均衡性的高速信号系统
公开(公告)号：WO2006078845A3
公开(公告)日：2007-02-15
申请号：PCT/US2006001944
申请日：2006-01-20
申请人： RAMBUS INC , ZERBE JARED L , CHEN FRED F , HO ANDREW , FARJAD-RAD RAMIN , POULTON JOHN W , DONNELLY KEVIN S , LEBOWITZ BRIAN
发明人： ZERBE JARED L , CHEN FRED F , HO ANDREW , FARJAD-RAD RAMIN , POULTON JOHN W , DONNELLY KEVIN S , LEBOWITZ BRIAN
IPC分类号： H04L25/03
CPC分类号： H04L27/01 , H04L1/0026 , H04L7/0025 , H04L7/0087 , H04L7/0337 , H04L25/0272 , H04L25/028 , H04L25/03057 , H04L25/03343 , H04L25/03885 , H04L25/497 , H04L2025/03503 , H04W52/20 , H04W52/225 , Y02B60/50
摘要： A signaling system includes a pre-emphasizing transmitter and an equalizing receiver coupled to one another via a high-speed signal path. The receiver measures the quality of data conveyed from the transmitter. A controller uses this information and other information to adaptively establish appropriate transmit pre-emphasis and receive equalization settings, e.g. to select the lowest power setting for which the signaling system provides some minimum communication bandwidth without exceeding a desired bit-error rate.
摘要翻译：一个信令系统包括一个预先强调的发射机和一个通过高速信号路径相互耦合的均衡接收机。接收机测量从发射机传送的数据的质量。控制器使用该信息和其他信息来自适应地建立适当的发送预加重和接收均衡设置，例如，选择信令系统提供一些最小通信带宽而不超过所需误码率的最低功率设置。

9. 发明申请

WO2004093144A3 PARTIAL RESPONSE RECEIVER 审中-公开
标题翻译：部分响应接收者
公开(公告)号：WO2004093144A3
公开(公告)日：2006-10-12
申请号：PCT/US2004010980
申请日：2004-04-09
申请人： RAMBUS INC , STOJANOVIC VLADIMIR M , HOROWITZ MARK A , ZERBE JARED L , BESSIOS ANTHONY , HO ANDREW C C , WEI JASON C , TSANG GRACE , GARLEPP BRUNO W
发明人： STOJANOVIC VLADIMIR M , HOROWITZ MARK A , ZERBE JARED L , BESSIOS ANTHONY , HO ANDREW C C , WEI JASON C , TSANG GRACE , GARLEPP BRUNO W
IPC分类号： H03H7/30 , H03H7/40 , H03K5/159 , H04L25/06 , H04L25/497
CPC分类号： H04L25/03057 , H04L7/0276 , H04L25/063 , H04L25/497 , H04L2025/03369 , H04L2025/03503
摘要： A receive circuit for receiving a signal transmitted via an electrical signal conductor. A first sampling circuit generates a first sample value that indicates whether the signal exceeds a first threshold level, and a second sampling circuit generates a second sample value that indicates whether the signal exceeds a second threshold level. A first select circuit receives the first and second sample values from the first and second sampling circuits and selects, according to a previously generated sample value, either the first sample value or the second sample value to be output as a selected sample value.
摘要翻译：用于接收通过电信号导体发送的信号的接收电路。第一采样电路产生指示信号是否超过第一阈值电平的第一采样值，并且第二采样电路产生指示信号是否超过第二阈值电平的第二采样值。第一选择电路从第一和第二采样电路接收第一和第二采样值，并根据先前产生的采样值选择作为选择的采样值输出的第一采样值或第二采样值。

10. 发明申请

WO2006078845A2 HIGH-SPEED SIGNALING SYSTEMS WITH ADAPTABLE PRE-EMPHASIS AND EQUALIZATION 审中-公开
标题翻译：具有适应性前瞻性和均衡性的高速信号系统
公开(公告)号：WO2006078845A2
公开(公告)日：2006-07-27
申请号：PCT/US2006/001944
申请日：2006-01-20
申请人： RAMBUS INC. , ZERBE, Jared L. , CHEN, Fred F. , HO, Andrew , FARJAD-RAD, Ramin , POULTON, John W. , DONNELLY, Kevin S , LEBOWITZ, Brian
发明人： ZERBE, Jared L. , CHEN, Fred F. , HO, Andrew , FARJAD-RAD, Ramin , POULTON, John W. , DONNELLY, Kevin S , LEBOWITZ, Brian
IPC分类号： H04L25/03
CPC分类号： H04L27/01 , H04L1/0026 , H04L7/0025 , H04L7/0087 , H04L7/0337 , H04L25/0272 , H04L25/028 , H04L25/03057 , H04L25/03343 , H04L25/03885 , H04L25/497 , H04L2025/03503 , H04W52/20 , H04W52/225 , Y02D70/00
摘要： A signaling system includes a pre-emphasizing transmitter and an equalizing receiver coupled to one another via a high-speed signal path. The receiver measures the quality of data conveyed from the transmitter. A controller uses this information and other information to adaptively establish appropriate transmit pre-emphasis and receive equalization settings, e.g. to select the lowest power setting for which the signaling system provides some minimum communication bandwidth without exceeding a desired bit-error rate.
摘要翻译：一个信令系统包括一个预先强调的发射机和一个通过高速信号路径相互耦合的均衡接收机。接收机测量从发射机传送的数据的质量。控制器使用该信息和其他信息来自适应地建立适当的发送预加重和接收均衡设置，例如，选择信令系统提供一些最小通信带宽而不超过所需误码率的最低功率设置。

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