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    • 7. 发明申请
    • METHOD AND APPARATUS FOR MATCHED QUANTUM ACCURATE FEEDBACK DACS
    • 匹配量子精确反馈DAC的方法和装置
    • WO2010014711A1
    • 2010-02-04
    • PCT/US2009/052107
    • 2009-07-29
    • NORTHROP GRUMMAN SYSTEMS CORPORATIONHERR, Quentin P.PESETSKI, Aaron A.PRZYBYSZ, John X.MILLER, Donald L.
    • HERR, Quentin P.PESETSKI, Aaron A.PRZYBYSZ, John X.MILLER, Donald L.
    • H03M3/02H03M3/04
    • H03M3/454H03M3/422H03M3/47
    • A second order superconductor delta-sigma analog-to-digital modulator having an input for receiving an analog signal, a first integrator coupled to the input, a second integrator cascaded with the first integrator, and a quantum comparator digitizing output from the second integrator reduces quantization noise by providing matched quantum accurate DACs in a feedback loop between output from the quantum comparator and input to the first integrator. The matched quantum accurate feedback DACs produce identically repeatable voltage pulses, may be configured for multi-bit output, may be time-interleaved to permit higher clocking rates, and may be employed in a balanced bipolar configuration to allow inductive input coupling. Bipolar feedback is balanced when gain of a first DAC exceeds gain of a matched, opposite polarity DAC by the amount of implicit feedback from the comparator into the second integrator.
    • 具有用于接收模拟信号的输入端的第二级超导体Δ-Σ模数转换器,耦合到输入端的第一积分器,与第一积分器级联的第二积分器和来自第二积分器的量子比较器数字化输出减小 通过在量子比较器的输出和第一积分器的输出之间的反馈回路中提供匹配的量子精确DAC来进行量化噪声。 匹配的量子精确反馈DAC产生相同可重复的电压脉冲,可以被配置用于多位输出,可以被时间交织以允许更高的时钟速率,并且可以采用平衡双极配置来允许电感输入耦合。 当第一个DAC的增益超过匹配的相反极性DAC的增益时,双极反馈被平衡,这是由比较器到第二个积分器的隐含反馈量。
    • 9. 发明申请
    • METHOD AND APPARATUS FOR SIGNAL INVERSION IN SUPERCONDUCTING LOGIC GATES
    • 超级逻辑门信号反演的方法与装置
    • WO2010132074A1
    • 2010-11-18
    • PCT/US2009/061866
    • 2009-10-23
    • NORTHROP GRUMMAN SYSTEMS CORPORATIONHERR, Quentin P.
    • HERR, Quentin P.
    • H03K19/195
    • H03K19/1954G06N99/002H03K19/1952
    • one embodiment, the disclosure relates to a single-flux quantum logic gate capable of providing output from one of the two inputs, which is also known as the A and NOT B gate. The logic gate includes a first input gate and a second input gate for respectively receiving a first input pulse and a second input pulse. An output gate is wired in parallel with the first input gate. A first Josephson junction and a second Josephson junction are connected to the first input gate and the second input gate, respectively. A cross-coupled transformer is also provided. The cross-coupled transformer diverts the first pulse from the output gate if the second pulse is detected at the second input gate. In an optional embodiment, the first Josephson junction has a first critical current which is selected to be less than the critical current of the second Josephson junction.
    • 一个实施例,本公开涉及能够提供来自两个输入之一的输出的单通量量程逻辑门,其也称为A和NOT B门。 逻辑门包括用于分别接收第一输入脉冲和第二输入脉冲的第一输入门和第二输入门。 输出门与第一输入门并联布线。 第一约瑟夫逊结和第二约瑟夫逊结分别连接到第一输入门和第二输入门。 还提供了交叉耦合变压器。 如果在第二输入门处检测到第二个脉冲,交叉耦合的变压器会将第一个脉冲从输出门转移。 在可选实施例中,第一约瑟夫逊结具有选择为小于第二约瑟夫逊结的临界电流的第一临界电流。